JPS6112230B2 - - Google Patents
Info
- Publication number
- JPS6112230B2 JPS6112230B2 JP49017858A JP1785874A JPS6112230B2 JP S6112230 B2 JPS6112230 B2 JP S6112230B2 JP 49017858 A JP49017858 A JP 49017858A JP 1785874 A JP1785874 A JP 1785874A JP S6112230 B2 JPS6112230 B2 JP S6112230B2
- Authority
- JP
- Japan
- Prior art keywords
- lsi
- circuit board
- metallization
- present
- cmos
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Electric Clocks (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Description
【発明の詳細な説明】
この発明は、LSI(大規模集積回路)素子を用
いた電子式腕時計に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic wristwatch using LSI (large scale integrated circuit) elements.
CMOS LSIと液晶表示装置の開発に伴い、電
子式デイジタル時計の技術開発が急ピツチに進
み、腕時計の分野にまで及んでいる。一般にこの
ような完全電子式のデイジタル腕時計は、水晶発
振器、CMOS―LSI、表示部、昇圧DC―DCコン
バータ等の部品を適当にアツセンブリーして構成
されている。特にこのアツセンブリー構成は、電
子式腕時計の必至条件である小型化に対して極め
て大きな意義を持つており、商品化成功へのかぎ
となつている。 With the development of CMOS LSI and liquid crystal display devices, the technological development of electronic digital watches has progressed rapidly, and has even reached the field of wristwatches. Generally, such completely electronic digital watches are constructed by appropriately assembling parts such as a crystal oscillator, CMOS-LSI, display section, and step-up DC-DC converter. In particular, this assembly structure has great significance for miniaturization, which is an essential condition for electronic wristwatches, and is the key to successful commercialization.
本発明はかかる点に関して為されたもので、特
にCMOS―LSI素子のアツセンブリー構成に特徴
を有する新規な構造の電子式腕時計を提供するも
のである。 The present invention has been made in view of this point, and particularly provides an electronic wristwatch with a novel structure characterized by the assembly structure of CMOS-LSI elements.
一般に、従来の電子式腕時計ではCMOS―LSI
素子は、所定のパツケージ内に挿入された後この
装置の基板に取り付けられる構成であり、従つて
LSI素子の多数(30〜50)のリードをプリント基
板に取り付ける非常に面倒な工程を必要とし、素
子製造工程の複雑化及び信頼性低化の要因となつ
ている。 In general, conventional electronic wristwatches use CMOS-LSI.
The element is configured to be inserted into a predetermined package and then attached to the board of this device, and thus
This requires a very troublesome process for attaching a large number (30 to 50) of leads of an LSI element to a printed circuit board, which becomes a factor in complicating the element manufacturing process and lowering reliability.
これに対し本願の発明では、LSI素子を直接回
路基板に取り付ける構成とする事に依つて、上記
の如き欠点を除いている。 In contrast, the invention of the present application eliminates the above drawbacks by attaching the LSI element directly to the circuit board.
以下に本発明にかかる電子式腕時計を、実施例
を挙げて詳細に説明する。 EMBODIMENT OF THE INVENTION Below, the electronic wristwatch according to the present invention will be described in detail by way of examples.
第1図は、液晶表示手段を取り付ける以前の本
発明一実施例装置の要部構成図である。今この第
1図に添つて上記装置の構成を説明すると、本装
置の回路基板1はセラミツク等から成る第1,第
2の絶縁基板2,3から成り、第1の絶縁基板2
の中央部を切り取つて凹部4が形成されている。
またこの絶縁基板2,3の表、裏面には所定の配
線パターンに従つてメタライズ5,5…が形成さ
れている。今メタライズ5aは基板1の上記凹部
4の底面に設けられたものメタライズ5bは第1
の絶縁基板2の上面に設けられたもの、メタライ
ズ5cは第2の絶縁基板3の下面に設けられたも
のとする。 FIG. 1 is a diagram illustrating a main part of an apparatus according to an embodiment of the present invention before a liquid crystal display means is attached. Now, the configuration of the above device will be explained with reference to FIG.
A recessed portion 4 is formed by cutting out the central portion.
Further, metallization 5, 5, . . . is formed on the front and back surfaces of the insulating substrates 2, 3 according to a predetermined wiring pattern. Now, the metallization 5a is provided on the bottom surface of the recess 4 of the substrate 1, and the metallization 5b is the first metallization 5b.
It is assumed that the metallization 5c is provided on the upper surface of the second insulating substrate 2, and the metallization 5c is provided on the lower surface of the second insulating substrate 3.
本発明装置では、以上の構成から成る回路基板
1の上記凹部4の底面に於いて、メタライズ5a
上にCMOS―LSI素子6を図に示す如く直接ダイ
ポンドする構成であり、該LSI素子6の各電極端
子は第1の絶縁基板2上にあらかじめ形成された
メタライズ5b,5b…にワイヤー7をもつてワ
イヤボンドされている。さらにこのCMOS―LSI
素子6は、第1の絶縁基板2上で、凹部4の周辺
を取り囲むように設けられたシール部材8と、板
状のキヤツプ9に依つて外部より報止される。第
2図,第3図は第1図に示した装置の平面図であ
り、特に第2図はシール部材8の、第3図は板状
キヤツプ9の形状の理解を容易にするための図面
である。今このシール部材8と板状のキヤツプ9
は、Auメツキしたコバールより成り、両者は半
田付けまたは溶接する事に依つて一体に接着され
る。本発明装置ではこの様にしてCMOS―LSI素
子6が直接回路基板1に取り付けられ、その後パ
ツケージングされる構造である。 In the device of the present invention, the metallization 5a is formed on the bottom surface of the recess 4 of the circuit board 1 having the above structure.
The structure is such that a CMOS-LSI element 6 is directly die-bonded as shown in the figure, and each electrode terminal of the LSI element 6 has a wire 7 connected to metallization 5b, 5b, . . . formed in advance on the first insulating substrate 2. It is wire bonded. Furthermore, this CMOS-LSI
The element 6 is sealed from the outside by a sealing member 8 provided on the first insulating substrate 2 so as to surround the periphery of the recess 4 and a plate-shaped cap 9. 2 and 3 are plan views of the device shown in FIG. 1, and in particular, FIG. 2 is a drawing to facilitate understanding of the shape of the sealing member 8, and FIG. 3 is a plan view of the shape of the plate-shaped cap 9. It is. Now this seal member 8 and plate-shaped cap 9
is made of Au-plated Kovar, and the two are bonded together by soldering or welding. The device of the present invention has a structure in which the CMOS-LSI element 6 is directly attached to the circuit board 1 in this manner, and then packaged.
また本装置では、回路基板1の下面のメタライ
ズ5c,5c…上に水晶発振子、銀電池、DC―
DCコンバータ等の各種部品がアツセンブリーさ
れており、上記CMOS―LSI素子6とともに電子
式腕時計の駆動回路部を構成する。第4図は、基
板1の下面の平面図で、メタライズ5c,5c…
の形状を示すために、上記水晶発振子、銀電池等
の部品を取り付ける以前の図面を示している。
尚、基板1の表面の電気的接続は、基板1に形成
したスルーホール10に依つて行つている。 In addition, in this device, a crystal oscillator, a silver battery, a DC-
Various parts such as a DC converter are assembled, and together with the CMOS-LSI element 6, it constitutes the drive circuit section of the electronic wristwatch. FIG. 4 is a plan view of the bottom surface of the substrate 1, with metallization 5c, 5c...
In order to show the shape of the device, the drawing is shown before parts such as the crystal oscillator and silver battery are attached.
Incidentally, electrical connections on the surface of the substrate 1 are made by through holes 10 formed in the substrate 1.
本装置に於いて時刻表示のための表示部には、
消費電力の極めて少ない液晶表示素子11が用い
られており、該素子11は第5図の断面図に示す
如くキヤツプ9上に装着され、LSI素子6及び基
板1下面に取り付けられた各種部品との電気的接
続は、液晶表示素子11の端部下面に導出された
液晶電極と、メタライズ5b,5b…とを導電性
ゴム等を材料とするソケツト12に依つて接続し
て行つている。 In this device, the display section for displaying the time includes:
A liquid crystal display element 11 with extremely low power consumption is used, and the element 11 is mounted on the cap 9 as shown in the cross-sectional view of FIG. Electrical connections are made by connecting the liquid crystal electrodes led out to the bottom surface of the ends of the liquid crystal display element 11 and the metallized layers 5b, 5b, . . . using sockets 12 made of conductive rubber or the like.
本発明装置は例えば以上の如き構成からなり、
LSI素子はあらかじめパツケージする事なく直接
回路基板に取り付けられているため、LSI素子を
あらかじめパツケージする工程を省略する事がで
き、しかもパツケージを基板に取り付けそのリー
ドと基板上の配線導体とを接続する工程をも必要
としない。従つて本発明にかかる電子式腕時計は
コストが低くかつ高い信頼性を持つている。また
本装置ではLSI素子を直接基板上に取付けている
ため不必要な空間を要せず、従つて装置自身の厚
さを極めてうすくする事ができる。 The device of the present invention has the above configuration, for example,
Since the LSI element is directly attached to the circuit board without being packaged in advance, the process of packaging the LSI element in advance can be omitted.Moreover, the package is attached to the board and its leads are connected to the wiring conductor on the board. No process is required. Therefore, the electronic wristwatch according to the present invention has low cost and high reliability. Furthermore, in this device, the LSI elements are mounted directly on the board, so unnecessary space is not required, and the thickness of the device itself can be made extremely thin.
第1図は本発明一実施例装置の要部構成図、第
2,第3,第4図は第1図に示す装置の構成説明
に供するための平面図、第5図は本発明一実施例
装置の断面図である。
1は回路基板、6はLSI素子、9はキヤツプ、
11は液晶表示素子を示す。
Fig. 1 is a configuration diagram of main parts of a device according to an embodiment of the present invention, Figs. 2, 3, and 4 are plan views for explaining the configuration of the device shown in Fig. 1, and Fig. 5 is a diagram showing an embodiment of the present invention. FIG. 2 is a cross-sectional view of an example device. 1 is a circuit board, 6 is an LSI element, 9 is a cap,
11 indicates a liquid crystal display element.
Claims (1)
形成された第1,第2の絶縁基板より成る回路基
板と、第1の絶縁基板の中央部を切り取ることに
より前記回路基板の凹部の底部に直接ダイボンド
され、前記配線パターンと電気的接続されるとと
もに、ボンデイング部及び配線パターンの接続部
が外部より封止されるLSI素子と、前記回路基板
にアセンブリーされ、かつ前記表裏の配線パター
ンと電気的接続される、表示部及び前記LSI素子
とともに駆動回路部を構成するその他電子部品と
からなる電子式腕時計。1. A circuit board consisting of first and second insulating boards on which wiring patterns are formed on the front and back sides via through holes, and die bonding directly to the bottom of the recess of the circuit board by cutting out the center of the first insulating board. an LSI element assembled on the circuit board and electrically connected to the wiring pattern and having a bonding part and a connecting part of the wiring pattern sealed from the outside; An electronic wristwatch comprising a display section and other electronic components that constitute a drive circuit section together with the LSI element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP49017858A JPS6112230B2 (en) | 1974-02-13 | 1974-02-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP49017858A JPS6112230B2 (en) | 1974-02-13 | 1974-02-13 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56125513A Division JPS5761983A (en) | 1981-08-10 | 1981-08-10 | Electronic wristwatch |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS50113264A JPS50113264A (en) | 1975-09-05 |
| JPS6112230B2 true JPS6112230B2 (en) | 1986-04-07 |
Family
ID=11955344
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP49017858A Expired JPS6112230B2 (en) | 1974-02-13 | 1974-02-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6112230B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6446921A (en) * | 1988-07-29 | 1989-02-21 | Sony Corp | Heat treatment furnace |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2628911A1 (en) * | 1976-06-28 | 1978-01-12 | Boehringer Ingelheim Lab | NEW SULFURIZED N-BENZYLAMINO ACIDS AND METHOD FOR THEIR PRODUCTION |
-
1974
- 1974-02-13 JP JP49017858A patent/JPS6112230B2/ja not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6446921A (en) * | 1988-07-29 | 1989-02-21 | Sony Corp | Heat treatment furnace |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS50113264A (en) | 1975-09-05 |
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