JPS6113597B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a drive circuit for a gas discharge panel, and more particularly to a drive circuit for a gas discharge panel that performs memory display by applying alternating sustaining voltage pulses.

A gas discharge panel, also known as a plasma display panel, has electrodes covered with a dielectric layer such as low-melting point glass that are placed opposite or adjacent to each other through a space filled with a discharge gas such as neon. By applying an alternating sustaining voltage pulse to the discharge point at the opposite point or adjacent point of the electrode, and applying a write pulse to the selected discharge point so that the discharge start voltage is higher than the discharge point, the discharge point will be A discharge occurs to form a wall voltage, and after that, the sum of the wall voltage and the sustaining voltage pulse becomes the discharge starting voltage, and a discharge occurs continuously, making it possible to memorize and display by combining selected discharge points.

Furthermore, when a pulse with a narrow pulse width or a pulse with a low peak value is applied as an erasing pulse, the erasing pulse causes a discharge, but does not lead to the formation of a wall voltage, resulting in an erasing action.

In order to drive such a gas discharge panel, the configuration shown in FIG. 1 is usually adopted. In the figure, PDP is a gas discharge panel with X and Y electrodes, DRVX and DRVY are drivers, SUSX,
SUSY is a common maintenance voltage circuit, and DECX and DECY are decoders. Common sustain voltage circuit SUSX, SUSY
A sustaining voltage pulse is continuously applied to the X and Y electrodes of the gas discharge panel PDP.When address information is added, the decoder
It is decoded by DECX and DECY, and the drivers DRVX and DRVY operate with the decoded output to write and write.
Selected X, Y in response to operation commands such as erasing
A write pulse or an erase pulse is applied to the electrodes from drivers DRVX and DRVY.

It has been proposed that the drivers DRVX and DRVY be configured to correspond to the X and Y electrodes, thereby reducing the load on the output transistors and the like to achieve greater integration. In that case,
The rising and falling currents of the sustain voltage pulse, write pulse, or erase pulse will flow through the output transistor, and since there are usually many variations in the rising and falling characteristics of transistors, each X,
This makes it difficult to apply equal sustaining voltage pulses to each of the Y electrodes.

An object of the present invention is to apply a sustaining voltage pulse to an electrode through a diode with relatively little variation in operating characteristics, and to facilitate integration. Examples will be described in detail below.

FIG. 2 shows the main circuit of the embodiment of the present invention, QX1 to QX7, QY1 to QY5 are transistors, QX1 and QY1 are first transistors, QX
3, QY2 is the second transistor, DX1~DX
3. DY1 to DY4 are diodes, DX1, DY1
is the first diode, DX2 and DY2 are the second diodes, Vxa and Vya are the superimposition voltages applied during write and erase operations, Xi, Yj (i, j = 1, 2, 3,
...) are output terminals, which are connected one-to-one to the X and Y electrodes of the gas discharge panel, respectively. V _s , V _SH ,
V _SM is a sustain voltage, a voltage applied during a write operation and a voltage applied during an erase operation, and DRVXi and DRVYi are drivers corresponding to the electrodes.

Figure 3 is a waveform diagram explaining the operation, where V _X1 and V _Y1 are the voltages applied to the selected X and Y electrodes, V _X2 and V _Y2 are the voltages applied to the non-selected X and Y electrodes, and V _A is the voltage applied to the selected X and Y electrodes. The voltages applied to the discharge points, V ₁₁ and V ₂₁ are the voltages applied to the half-selected discharge points, and V ₂₂ is the voltage applied to the non-selected discharge points.

At times other than writing and erasing, the decoder output dx applied to the driver DRVXi is “0” and
Transistor QX3 is off and the driver
The decoder output dy added to DRVYi is “1”
, and transistor QY2 is off. The sustaining voltage pulse is generated by the transistors QX4, QX5, QY3, and QY4 of the common sustaining voltage circuit operating according to the timing signal, and the diodes DX1 and DX.
2, output terminals via DY1 and DY2, respectively.
Applied from Xi and Yi to the electrodes of the gas discharge panel. Therefore, each electrode has a diode DX.
Since the sustaining voltage pulse is applied through 1 and DY1, substantially the same sustaining voltage pulse is applied to each electrode due to the small variation in the characteristics of the diode. The SUS period in FIG. 3 indicates the period during which the sustain voltage pulse is continuously applied as described above.

During the write period W, transistors QX6,
QY5 is turned on, a voltage of V _SH is applied to the X electrode, and the Y electrode is grounded via the diode DY3 and transistors QY1 and QY5. X, Y
The discharge point between the electrodes is a capacitive load and remains at the potential of V _SH even after the transistor operates as described above. Next, the outputs dx and dy of the decoder change according to the input address information, and one decode output dx for the selected electrode becomes "1" and the other decode output dy becomes "1". Therefore the driver
In DRVXi, transistor QX1 is turned on, transistor QX2 is turned off, and transistor QX3 is turned on, and the voltage of V _Xa superimposed on V _SH is applied to the selected X electrode. Further, since the voltage V _Xa is not applied to the unselected X electrodes, the level of V _SH remains maintained.

Also, in the driver DRVYj, the transistor
Since QY1 is on and transistor QY2 is off, the selected Y electrode is grounded. Also non-selected Y
For the electrode, the decode output dy becomes "0", so in the driver DRVYj corresponding to the unselected Y electrode, the transistor QY2 turns on and V _Y
A voltage of _a will be applied.

Next, when the decode outputs dx and dy return to their original states, the charge charged at the discharge point by the voltage of V _SH +V _Xa of the selected X electrode is discharged via diode DX3 and transistor QX2, and the applied voltage pulse falls, and the charge charged at the discharge point by the voltage of V _Ya of the unselected Y electrode is the diode DY
3. Discharge occurs through transistors QY1 and QY5, resulting in the fall of the applied voltage pulse.

_{Therefore , by selecting V _} Since they cancel each other out, only the voltage of V _SH is applied, and therefore no half-selection failure occurs.

In addition, as shown by V ₂₂ in Figure 3, to the non-selected discharge point, during a write operation, a pulse with a waveform consisting of V _SH and the respective levels obtained by subtracting V _Xa or V _Ya from V _SH is applied. Become something.

During the erase period E, at the timing when the transistor QX7 is turned on, the transistor QX3 is turned on according to the decode output dx, and the transistor of the driver DRVYj corresponding to the non-selected Y electrode is turned on.
_QY2 is turned on, and transistor QY5 is also turned on, so V _SM +V _Xa is applied to the selected X electrode, V _SM is applied to the non-selected
A voltage of V _Ya is applied to the electrodes, and an operation is performed in which the pulse starts falling immediately after the pulse rises so that the pulse width becomes narrow. Therefore, a narrow pulse of V _SM +V _Xa is applied as an erase pulse only to the selected discharge point.

The voltage V _SM mentioned above is superimposed to increase the level when reliable erasing cannot be performed with only the voltage _{V Xa level} . If operation is possible, transistor QX7 can be omitted.

Also, during the block erasure period BE or the total erasure period,
Since the erasing pulse is applied to a block or all electrodes, the erasing pulse can be formed by forming a pulse with a time difference between the voltages applied to the X electrode and the Y electrode.

Note that the transistor can be replaced with a switching element such as a thyristor, and depending on the characteristics of the gas discharge panel, the sustaining voltage V _s and the voltage V _SH applied during the write operation can be used together to switch the transistor, etc. It is also possible to reduce the number of elements.

As explained above, the present invention includes the common sustain voltage circuits SUSX, SUSY and the decoders DECX, DECY.
and a driver compatible with X electrode Xi and Y electrode Yj
DRVXi and DRVYj are equipped with a driver corresponding to the electrode, diodes DX1 and DY1 that apply a sustaining voltage to the electrode from a common sustaining voltage circuit, and switching elements for grounding such as transistors QX5 and QY4 of the common sustaining voltage circuit. diode to ground through
DX2, DY2, and transistors QX3, QY2 that operate based on the decoded output of the decoder and apply a write pulse or erase pulse to the electrode corresponding to the selected discharge point.
The characteristics of the diode have less variation compared to the characteristics of the transistor, so it is possible to apply the same sustaining voltage pulse to each electrode from the common sustaining voltage circuit. It will be possible. Therefore, since the same sustaining voltage pulse is applied to each discharge point of the gas discharge panel, there is an advantage that the operation of the gas discharge panel can be stabilized.

Furthermore, during write and erase operations, switching elements such as transistors QX3 and QY2, which superimpose voltages applied from the X electrode and Y electrode to a selected discharge point to form a write pulse or an erase pulse, generate a sustain voltage pulse. Since no current flows through the capacitor, a relatively small capacitance is sufficient, which has the advantage of making it easy to integrate the circuit.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a peripheral circuit of a gas discharge panel, FIG. 2 is a circuit diagram of a main part of an embodiment of the present invention, and FIG. 3 is a waveform diagram for explaining operation. DRVXi, DRVYj are electrode compatible drivers, QX1
~QX7, QY1~QY5 are transistors, DX1~
DX3 and DY1 to DY4 are diodes, and Xi and Yj are output terminals.

Claims (1)

[Claims] 1. In a drive circuit for a gas discharge panel having a plurality of X electrodes and Y electrodes, a common maintenance voltage circuit,
a decoder, and a driver corresponding to the X electrode and Y electrode, the driver including a first diode that applies a sustain voltage from the common sustain voltage circuit to the electrode, and a first diode that applies the sustain voltage from the common sustain voltage circuit to the common sustain voltage circuit. a second diode that is grounded via a grounding switching element; a first transistor that operates according to the decoded output of the decoder; 1. A drive circuit for a gas discharge panel, comprising a second transistor that applies a superimposed voltage from an emitter to the electrode to form a write pulse or an erase pulse.