JPS6115667B2 - - Google Patents
Info
- Publication number
- JPS6115667B2 JPS6115667B2 JP9339679A JP9339679A JPS6115667B2 JP S6115667 B2 JPS6115667 B2 JP S6115667B2 JP 9339679 A JP9339679 A JP 9339679A JP 9339679 A JP9339679 A JP 9339679A JP S6115667 B2 JPS6115667 B2 JP S6115667B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- double
- peak
- operational amplifier
- wave
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
- H02M7/02—Conversion of AC power input into DC power output without possibility of reversal
- H02M7/04—Conversion of AC power input into DC power output without possibility of reversal by static converters
- H02M7/12—Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/21—Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Rectifiers (AREA)
Description
【発明の詳細な説明】
本発明は両波整流方式に関し、特に増幅器の入
力側に出力整流信号のピーク値に応じた成分を帰
還するように構成することによりその出力振幅を
従来のものより非常に大きくするようにした両波
整流方式に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a double-wave rectification system, and in particular, by configuring the input side of an amplifier to feed back a component corresponding to the peak value of an output rectified signal, the output amplitude can be made much larger than that of conventional systems. The present invention relates to a double-wave rectification method in which the wave length is increased.
従来、バイポーラ信号をユニポーラ信号に変換
する場合、１例として第１図に示す如き両波整流
回路が使用されていた。 Conventionally, when converting a bipolar signal into a unipolar signal, a double-wave rectifier circuit as shown in FIG. 1 has been used as an example.
即ち、第２図イに示す如きバイポーラ信号V1
を第１図における入力端子Ａに印加する。該入力
信号V1は、ローパス・フイルタ１により高周波
分が除去されて第２図ロに示す交流信号に変換さ
れ、両波整流器２により両波整流信号に変換され
る。そして該両波整流信号が図示省略された演算
増幅器により増幅されて第２図ハに示す如き増幅
された振幅をもつ両波整流信号となり、1/2ピー
ク値検出回路３により上記演算増幅器の出力信号
の1/2ピーク値が検出される。そしてこれを基準
にしてバイポーラ・ユニポーラ信号変換回路４に
より第２図ハに示す如き両波整流信号のピーク値
の1/2をスライスレベルとして上記両波整流信号
がスライスされ、第２図ニに示すユニポーラの矩
形状出力信号V2を得ている。 That is, the bipolar signal V 1 as shown in FIG.
is applied to input terminal A in FIG. The input signal V 1 is converted into an alternating current signal shown in FIG. The double-wave rectified signal is then amplified by an operational amplifier (not shown) to become a double-wave rectified signal with an amplified amplitude as shown in FIG. The 1/2 peak value of the signal is detected. Then, using this as a reference, the bipolar/unipolar signal conversion circuit 4 slices the double-wave rectified signal with a slice level of 1/2 of the peak value of the double-wave rectified signal as shown in FIG. A unipolar rectangular output signal V 2 as shown is obtained.
しかしながら、従来の汎用演算増幅器を使用し
た両波整流回路は、接地電圧に対して正方向また
は負方向の一方的な信号しか得られない。そして
その最大出力振幅E1は演算増幅器の電源電圧で
決つてしまうためにその電源電圧以下の整流信号
しか得られないという欠点があつた。 However, a conventional double-wave rectifier circuit using a general-purpose operational amplifier can only obtain a unilateral signal in the positive or negative direction with respect to the ground voltage. Since the maximum output amplitude E 1 is determined by the power supply voltage of the operational amplifier, there is a drawback that only a rectified signal below the power supply voltage can be obtained.
それ故、第２図イに示すバイポーラ信号を同図
ニに示すユニポーラ信号に変換する場合、同図ハ
に示す汎用演算増幅器の出力信号を例えばピーク
値の1/2でスライスするものであるが、入力電圧
V1のレベルが変動した場合、スライス電圧がピ
ーク値の1/2の点からずれるという問題がある。
これは上記の如く汎用演算増幅器の電源電圧以下
の整流信号しか得られないために、小入力信号の
とき整流信号のレベルが小さくなり、外部素子の
影響が無視できないためである。 Therefore, when converting the bipolar signal shown in Figure 2A to the unipolar signal shown in Figure 2D, the output signal of the general-purpose operational amplifier shown in Figure 2C is sliced, for example, by 1/2 of the peak value. , input voltage
When the level of V 1 fluctuates, there is a problem in that the slice voltage deviates from the point that is 1/2 of the peak value.
This is because, as mentioned above, since only a rectified signal lower than the power supply voltage of the general-purpose operational amplifier can be obtained, the level of the rectified signal becomes small when the input signal is small, and the influence of external elements cannot be ignored.
したがつて本発明は、このような問題点を改善
するために最大出力振幅が従来の回路の２倍にな
るような両波整流方式を提供することを目的とす
るるものであり、そのために本発明の両波整流方
式では入力交流信号を両波整流する両波整流回路
と該両波整流回路により整流された信号が印加さ
れる増幅器を有する両波整流回路において、上記
増幅器から出力された出力電圧のピーク値を検出
するピーク検出手段と、該ピーク検出手段により
検出されたピーク電圧を上記増幅器の入力側に負
帰還する帰還手段を設けたことを特徴とする。 Therefore, an object of the present invention is to provide a double-wave rectification system in which the maximum output amplitude is twice that of the conventional circuit, in order to improve such problems. In the double-wave rectification method of the present invention, in a double-wave rectifier circuit that includes a double-wave rectifier circuit that double-wave rectifies an input AC signal and an amplifier to which a signal rectified by the double-wave rectifier circuit is applied, the signal output from the amplifier is The present invention is characterized in that it includes a peak detection means for detecting the peak value of the output voltage, and a feedback means for negatively feeding back the peak voltage detected by the peak detection means to the input side of the amplifier.
以下本発明の一実施例を第３図及び第４図にも
とづき説明する。 An embodiment of the present invention will be described below with reference to FIGS. 3 and 4.
第３図は本発明の一実施例回路構成図であり、
第４図はその動作説明図である。 FIG. 3 is a circuit configuration diagram of an embodiment of the present invention,
FIG. 4 is an explanatory diagram of the operation.
図中、１０は入力端子、１１，１２はダイオー
ド、１３は演算増幅器、１４はトランジスタ、１
５は抵抗、１６はコンデンサ、１７乃至１９はそ
れぞれ抵抗、２０は出力端子である。 In the figure, 10 is an input terminal, 11 and 12 are diodes, 13 is an operational amplifier, 14 is a transistor, 1
5 is a resistor, 16 is a capacitor, 17 to 19 are respective resistors, and 20 is an output terminal.
入力端子１０には、第２図ロに示されるローパ
スフイルタを経由した電圧が印加される。 A voltage is applied to the input terminal 10 through a low-pass filter shown in FIG. 2B.
演算増幅器１３の出力側には、トランジスタ１
４、抵抗１５及びコンデンサ１６により構成され
るピーク検出部が接続される。トランジスタ１４
のコレクタには演算増幅器１３の正の電源電圧で
あるVssが印加され、そのエミツタは、抵抗１５
とコンデンサ１６との並列回路に接続されてい
る。そして該抵抗１５の他端は上記演算増幅器１
３の負の電源電圧であるVccが印加されている。 A transistor 1 is connected to the output side of the operational amplifier 13.
4. A peak detection section composed of a resistor 15 and a capacitor 16 is connected. transistor 14
Vss, which is the positive power supply voltage of the operational amplifier 13, is applied to the collector of the operational amplifier 13, and its emitter is connected to the resistor 15.
and a capacitor 16 in a parallel circuit. The other end of the resistor 15 is connected to the operational amplifier 1.
Vcc, which is a negative power supply voltage of 3, is applied.
いま入力端子１０に第４イに示す交流信号V0
が印加されると、該交流信号V0はダイオード１
１及び１２により両波整流され、これが演算増幅
器１３により増幅される。そして該演算増幅器１
３の出力ピーク値がトランジスタ１４及び抵抗１
５、コンデンサ１６により構成されるピーク検出
部により検出される。そしてこのピーク検出部に
より検出されたピーク信号は抵抗１７により演算
増幅器１３の逆相入力端子に印加される。これに
より、第４図ロに示す如く、演算増幅器１３の出
力信号を負方向側にも振幅させることになる。こ
のとき抵抗１７の値を調節して演算増幅器１３の
出力信号を正方向ピーク値と負方向ピーク値とが
同じ値になるように帰還量を調節する。 The AC signal V 0 shown in No. 4 A is now input to the input terminal 10.
is applied, the AC signal V 0 passes through the diode 1
1 and 12 for double-wave rectification, which is amplified by an operational amplifier 13. and the operational amplifier 1
3 output peak value is transistor 14 and resistor 1
5. Detected by a peak detection section composed of a capacitor 16. The peak signal detected by the peak detection section is applied to the negative phase input terminal of the operational amplifier 13 by the resistor 17. As a result, as shown in FIG. 4B, the output signal of the operational amplifier 13 is caused to swing in the negative direction as well. At this time, the value of the resistor 17 is adjusted to adjust the feedback amount of the output signal of the operational amplifier 13 so that the positive direction peak value and the negative direction peak value become the same value.
これにより、ダイオード１１及び１２により両
波整流された信号が大きくて、レベル変動が生じ
ないような場合には、演算増幅器１３の出力信号
は、第４図ロに示す如く、正方向の電源電圧Vss
に非常に近い値となり、負方向のは負の電源電圧
−Vccに非常に近い値となり、従来の約２倍の大
きさのものを得ることができる。 As a result, when the signal double-wave rectified by the diodes 11 and 12 is large enough to cause no level fluctuation, the output signal of the operational amplifier 13 is adjusted to the power supply voltage in the positive direction, as shown in FIG. Vss
In the negative direction, the value is very close to the negative power supply voltage -Vcc, and it is possible to obtain a value that is about twice as large as that of the conventional one.
同様にして、レベルの非常に低い入力交流信号
が印加される場合でも、その出力信号のダイナミ
ツクレンジは従来の２倍の範囲となる。それ故、
小さな入力信号の場合でも大きなダイナミツクレ
ンジが得られるので、そのスライス点を正確に決
定することができる。 Similarly, even when an input AC signal with a very low level is applied, the dynamic range of the output signal is twice that of the conventional one. Therefore,
Since a large dynamic range can be obtained even in the case of a small input signal, the slice point can be determined accurately.
しかも、第３図及び第４図における実施例によ
れば、正方向の信号電圧と負方向の信号電圧の比
を等しくしてあるので、これを使用してバイポー
ラ信号をユニポーラ信号に変換する場合、1/2ス
ライス電圧が丁度接地電位と等しくなるので、上
記の如き構成のピーク検出部２１により、特別に
1/2ピーク検出回路を使用することなく、第５図
に示す如く、演算増幅器の出力電圧V3を直接バ
イポーラ・ユニポーラ信号変換回路２２に印加す
るのみで、第４図ハに示す如きユニポーラ信号を
得ることができる。それ故、入力信号のレベル変
動があつても、最大出力振幅を従来の２倍にとる
ことが可能となりかつ1/2ピーク検出回路を使用
することなく接地電位をスライス基準値としてス
ライスすることができるので、非常に正確なバイ
ポーラ・ユニポーラ変換を行なうことが可能とな
る。 Moreover, according to the embodiments shown in FIGS. 3 and 4, the ratio of the positive direction signal voltage and the negative direction signal voltage is made equal, so when converting a bipolar signal to a unipolar signal using this, , 1/2 slice voltage is exactly equal to the ground potential, so the peak detecting section 21 having the above-mentioned configuration specially detects
Without using a 1/2 peak detection circuit, as shown in FIG. 5, by simply applying the output voltage V3 of the operational amplifier directly to the bipolar/unipolar signal conversion circuit 22, a unipolar signal as shown in FIG. can be obtained. Therefore, even if the input signal level fluctuates, the maximum output amplitude can be doubled compared to the conventional one, and slicing can be performed using the ground potential as the slicing reference value without using a 1/2 peak detection circuit. This makes it possible to perform very accurate bipolar/unipolar conversion.
なお以上の説明では演算増幅器１３の出力信号
を、第４図ロに示す如く、正方向のピーク値と負
方向のピーク値の値が同一の場合について説明し
たが、抵抗１７の値を調節することにより、この
ピーク値の比は適宜調節することができるもので
ある。 In the above explanation, the output signal of the operational amplifier 13 has been explained for the case where the positive direction peak value and the negative direction peak value are the same as shown in FIG. This allows the ratio of peak values to be adjusted as appropriate.
結局以上説明の如く、本発明によれば増幅器の
出力信号のダイナミツクレンジを大きくすること
が可能になり、最大従来の２倍にまで大きくする
ことができるのでスライスレベルを正確に定める
ことが可能となり、しかも特別なスライスレベル
検出用手段を用いることなくユニポーラ信号を得
ることができる。 In the end, as explained above, according to the present invention, it is possible to increase the dynamic range of the output signal of the amplifier, up to twice that of the conventional one, so it is possible to accurately determine the slice level. Moreover, a unipolar signal can be obtained without using any special slice level detection means.
第１図は従来の両波整流回路を示し、第２図は
その要部の信号波形の説明図、第３図は本発明の
一実施例構成図を示し、第４図その動作説明図、
第５図は本発明を使用したバイポーラ・ユニポー
ラ信号変換方式を示す。
図中、１はローパス・フイルタ、２は両波整流
器、３は1/2ピーク値検出回路、４はバイポー
ラ・ユニポーラ信号変換回路、１１，１２はダイ
オード、１３は演算増幅器、１４はトランジス
タ、１５は抵抗、１６はコンデンサ、１７乃至１
９はそれぞれ抵抗、２１はピーク検出回路、２２
はバイポーラ・ユニポーラ信号変換回路それぞれ
示す。
FIG. 1 shows a conventional double-wave rectifier circuit, FIG. 2 is an explanatory diagram of the signal waveforms of its main parts, FIG. 3 is a configuration diagram of an embodiment of the present invention, and FIG. 4 is an explanatory diagram of its operation.
FIG. 5 shows a bipolar to unipolar signal conversion scheme using the present invention. In the figure, 1 is a low-pass filter, 2 is a double-wave rectifier, 3 is a 1/2 peak value detection circuit, 4 is a bipolar/unipolar signal conversion circuit, 11 and 12 are diodes, 13 is an operational amplifier, 14 is a transistor, and 15 is a resistor, 16 is a capacitor, 17 to 1
9 is a resistor, 21 is a peak detection circuit, 22
indicate bipolar and unipolar signal conversion circuits, respectively.
Claims (1)
該両波整流回路により整流された信号が印加され
る増幅器を有する両波整流回路において、上記増
幅器から出力された出力電圧のピーク値を検出す
るピーク検出手段と、該ピーク検出手段により検
出されたピーク電圧を上記増幅器の入力側に負帰
還する帰還手段を設けたことを特徴とする両波整
流方式。1. In a double-wave rectifier circuit that includes a double-wave rectifier circuit that double-wave rectifies an input AC signal and an amplifier to which a signal rectified by the double-wave rectifier circuit is applied, detecting the peak value of the output voltage output from the amplifier. 1. A double-wave rectification system characterized by comprising: a peak detection means for detecting the peak voltage; and a feedback means for negatively feeding back the peak voltage detected by the peak detection means to the input side of the amplifier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9339679A JPS5619383A (en) | 1979-07-23 | 1979-07-23 | Full-wave rectifying system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9339679A JPS5619383A (en) | 1979-07-23 | 1979-07-23 | Full-wave rectifying system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5619383A JPS5619383A (en) | 1981-02-24 |
| JPS6115667B2 true JPS6115667B2 (en) | 1986-04-25 |
Family
ID=14081133
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9339679A Granted JPS5619383A (en) | 1979-07-23 | 1979-07-23 | Full-wave rectifying system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5619383A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61137065U (en) * | 1985-02-15 | 1986-08-26 |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5899816A (en) * | 1981-12-09 | 1983-06-14 | Nec Corp | Rectifying circuit |
| US5381106A (en) * | 1992-10-28 | 1995-01-10 | Samsung Electronics Co., Ltd. | Clipper circuitry suitable for signals with fractional-volt amplitudes |
-
1979
- 1979-07-23 JP JP9339679A patent/JPS5619383A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61137065U (en) * | 1985-02-15 | 1986-08-26 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5619383A (en) | 1981-02-24 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| GB2189956A (en) | Isolation amplifier | |
| US2900506A (en) | Phase detector | |
| US3940681A (en) | Wide amplitude range detecting circuit | |
| US4685048A (en) | AC-DC transformation circuit | |
| US4247949A (en) | Signal strength detecting circuit | |
| JPS6115667B2 (en) | ||
| US3444456A (en) | Control circuit for low noise controlled rectifier systems | |
| US4460955A (en) | Stabilizing power supply apparatus | |
| US2234011A (en) | Photoelectric relay | |
| CN119154819A (en) | Radio frequency power detection circuit applied to power amplifier | |
| US4506169A (en) | Peak amplitude detector | |
| US4745309A (en) | Adjustable RMS circuit | |
| US3579094A (en) | Voltage-generating apparatus | |
| EP0087893A1 (en) | Peak amplitude detector | |
| GB1390510A (en) | Circuits adapted to produce output signals of constant slope | |
| US3938040A (en) | Apparatus for measuring a signal voltage including a current source with a control input on which said signal appears | |
| JPS5926671Y2 (en) | schmitt circuit | |
| JPH02250506A (en) | Bias circuit for diode detector | |
| US3551772A (en) | Closed control system having means responsive to the amplitude of selfoscillations to modify one or more parameters of the system | |
| SU1434237A1 (en) | Device for detecting presence of metal | |
| WO1988007286A1 (en) | Zener diode detector circuit | |
| US3381203A (en) | A-c to d-c converter | |
| JPS623858Y2 (en) | ||
| SU1226639A1 (en) | Pulse generator with doubling frequency | |
| JPH041524B2 (en) |