JPS6117142B2 - - Google Patents
Info
- Publication number
- JPS6117142B2 JPS6117142B2 JP55144908A JP14490880A JPS6117142B2 JP S6117142 B2 JPS6117142 B2 JP S6117142B2 JP 55144908 A JP55144908 A JP 55144908A JP 14490880 A JP14490880 A JP 14490880A JP S6117142 B2 JPS6117142 B2 JP S6117142B2
- Authority
- JP
- Japan
- Prior art keywords
- time
- probe card
- probe
- printed board
- charge
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
Landscapes
- Measuring Leads Or Probes (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Description
【発明の詳細な説明】
本発明は特にプローバーに装着されるプローブ
カードに関する。DETAILED DESCRIPTION OF THE INVENTION The present invention particularly relates to a probe card mounted on a prober.
一般に集積回路装置の製造工程で半導体ウエハ
ー上の集積回路チツプの電気的特性の試験はプロ
ーバーで行なわれる。集積回路チツプは年々高集
積度化されると共に多機能化が進みそれに伴い被
測定電極数も多電極化し測定に要する時間も増大
してきた。多電極化に対しては種々の固定プロー
ブ針によるプローブカード方式が考案されてい
る。しかし測定時間に関してはあまり考慮が払わ
れていない。集積回路装置の測定装置は高価であ
り、このためには、集積回路装置試験の精度を下
げることなく、高品質を保ちつつ、測定時間の短
縮化を計り、測定に要するコスト低減化を計るこ
とが望ましい。 Generally, in the manufacturing process of integrated circuit devices, the electrical characteristics of integrated circuit chips on a semiconductor wafer are tested using a prober. Integrated circuit chips have become more highly integrated and multifunctional year by year, and as a result, the number of electrodes to be measured has increased, and the time required for measurement has also increased. In order to increase the number of electrodes, various probe card systems using fixed probe needles have been devised. However, little consideration is given to measurement time. Measuring equipment for integrated circuit devices is expensive, and for this reason, it is necessary to shorten the measurement time and reduce the cost required for measurement while maintaining high quality without reducing the accuracy of integrated circuit device testing. is desirable.
本発明の目的は品質を落さずに測定時間の短縮
を計るものである。 An object of the present invention is to shorten measurement time without reducing quality.
集積回路装置の特性試験項目として一般に、電
源電圧マージン、入力電圧マージン、出力電圧マ
ージン、入出力リーク電流機能チエツク、チツプ
内蔵メモリー装置の保持時間のチエツクである。
上記試験項目で最も測定に時間を費すのは保持時
間のチエツクである。これはチツプ内蔵のメモリ
ー装置に任意の情報を書き込み一定時間情報が変
化しない事の確認の試験である。情報の書込みは
一定量の電荷Q0を金属（又は多結晶シリコン）−
二酸化シリコン膜−シリコン基板、又はＰ−Ｎ接
合からなる容量に貯える事である。保持時間のチ
エツクは書込み時の電荷Q0が一定時間経過後あ
る基準の電荷Q1以上を保持している事の確認の
チエツクである。書込まれた電荷Q0の損失の最
大の原因はＰ−Ｎ接合からのリークによるもので
ある。Ｐ−Ｎ接合リークにより書込まれた電荷は
１時間後
Q1＝Q0Be-Ａｔ／ｋＴ
Ａ，Ｂ＝定数Ｋ：ポルツマン定数Ｔ：温度ｔ：時
間なる関係式にて求められるＱtなる電荷に減少
する。外部から、光、熱等のエネルギーを与える
事により定数Ａは変化する、Ａは大きくあると電
荷Ｑtがある基準の電荷Q1になるまでの時間が短
かくなり、測定時間が減少する。熱による方法は
ウエハーの熱容量又はプローバー熱容量により、
熱の影響が外の測定項目まで及ぶので具合がわる
い、光を必要測定項目のみ照射する方法を用いれ
ば、影響は外の測定項目迄及ばさずに保持テスト
時間の短縮が計れる。 Characteristic test items for integrated circuit devices generally include power supply voltage margin, input voltage margin, output voltage margin, input/output leak current function check, and retention time check of chip-embedded memory devices.
Among the above test items, the one that takes the most time to measure is checking the retention time. This is a test to confirm that arbitrary information is written in the chip's built-in memory device and the information does not change for a certain period of time. Writing information transfers a certain amount of charge Q 0 to metal (or polycrystalline silicon) −
It is stored in a capacitor made of a silicon dioxide film-silicon substrate or a P-N junction. The retention time check is a check to confirm that the charge Q 0 during writing retains a certain reference charge Q 1 or more after a certain period of time has elapsed. The biggest cause of loss of written charge Q 0 is due to leakage from the PN junction. After one hour, the charge written by the P-N junction leak becomes Q t , which is determined by the relational expression Q 1 = Q 0 Be - At/kT A, B = constant K: Portzmann's constant T: temperature t: time. The charge decreases. The constant A changes by applying energy such as light or heat from the outside. If A is large, the time it takes for the charge Q t to reach a certain standard charge Q 1 becomes shorter, and the measurement time decreases. The thermal method depends on the heat capacity of the wafer or the heat capacity of the prober.
The effect of heat extends to external measurement items, which is unsatisfactory, but if a method is used in which only the necessary measurement items are irradiated with light, the retention test time can be shortened without affecting external measurement items.
本発明を図により説明する。第１図は本発明の
実施例のプローブカードの平面図である。第２図
は第１図のＡ−Ｂ線に於ける断面図である。予め
金属配線２がプリントされたプローブカード基板
１に測定用プローブ針３を固定させる。チツプ上
電極にプローブ針が接触している事を確認する為
の開孔部５の辺に発光装置４を装着し測定装置か
らの信号により任意の時間発光する様配線を行
う。この配線は対ブローバー用コネクタ６に接続
される。 The present invention will be explained with reference to the drawings. FIG. 1 is a plan view of a probe card according to an embodiment of the present invention. FIG. 2 is a sectional view taken along line A-B in FIG. 1. A measuring probe needle 3 is fixed to a probe card board 1 on which metal wiring 2 is printed in advance. A light emitting device 4 is attached to the side of the opening 5 to confirm that the probe needle is in contact with the electrode on the chip, and wiring is performed so that it emits light for an arbitrary period of time in response to a signal from the measuring device. This wiring is connected to the blow bar connector 6.
本発明によれば任意の時間、光照射状態でチツ
プの測定が可能であり又プローブカード開孔部に
発光装置を装着させる事で効果的な安定した発光
源が得られ品質を低下させる事なく測定時間の短
縮が容易に出来る様になる。 According to the present invention, it is possible to measure chips under light irradiation for any length of time, and by attaching a light emitting device to the probe card opening, an effective and stable light source can be obtained without deteriorating quality. Measurement time can be easily shortened.
第１図、第２図は夫々本発明の実施例のプロー
ブカードの平面図、断面図を示す。
尚図において、１……プローブカード基板、２
……プリント金属配線、３……プローブ針、４…
…発光装置、５……開孔、６……対プローバー用
コネクタ。
FIGS. 1 and 2 show a plan view and a sectional view, respectively, of a probe card according to an embodiment of the present invention. In the figure, 1...probe card board, 2
...Printed metal wiring, 3...Probe needle, 4...
...Light emitting device, 5...Open hole, 6...Connector for prober.
Claims (1)
リント板に取付けた複数のプローブ針を有し、該
複数のプローブ針の先端部上の該プリント板に開
孔部を設けたプローブカードに於て、特定試験項
目測定時に発光する装置を前記開孔部の辺に装着
し、測定装置からの信号により任意の時間に該発
光する装置が発光するように前記プリント板に配
線を設けた事を特徴とするプローブカード。1. In a probe card having a plurality of probe needles attached to a printed board corresponding to the electrode pattern of the wafer to be measured, and openings provided in the printed board above the tips of the plurality of probe needles, A device that emits light when measuring a specific test item is attached to the side of the opening, and wiring is provided on the printed board so that the device emits light at an arbitrary time in response to a signal from the measuring device. probe card.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55144908A JPS5768047A (en) | 1980-10-16 | 1980-10-16 | Probe card |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55144908A JPS5768047A (en) | 1980-10-16 | 1980-10-16 | Probe card |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5768047A JPS5768047A (en) | 1982-04-26 |
| JPS6117142B2 true JPS6117142B2 (en) | 1986-05-06 |
Family
ID=15373077
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55144908A Granted JPS5768047A (en) | 1980-10-16 | 1980-10-16 | Probe card |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5768047A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63196435U (en) * | 1987-06-04 | 1988-12-16 |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4812025B2 (en) * | 2006-08-11 | 2011-11-09 | セイコーインスツル株式会社 | Probe card with surface light source |
-
1980
- 1980-10-16 JP JP55144908A patent/JPS5768047A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63196435U (en) * | 1987-06-04 | 1988-12-16 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5768047A (en) | 1982-04-26 |
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