JPS6119154B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a television signal processing device, and in particular, the present invention relates to a television signal processing device, and in particular, to
The present invention relates to a still image signal processing device that obtains a still image signal of a value (1 bit).

Conventionally, this type of device determines whether the signal is an object signal or a background signal based on whether the signal is above or below a certain reference level from the camera signal obtained when the object is imaged with a television camera. It was converted into a binary signal. This device was specially applied for in 1973.
No. 151233. In this method, if noise is superimposed on the camera signal, pixel signals are generated in which the subject signal and background signal are determined differently for each frame. In addition, after converting to a binary signal, by using a 1-bit 1-frame (or field) storage circuit and taking the sum (OR) of the subject signals of several frames (fields), 1 frame (field) of 1 Method for obtaining bit still image signals (as shown in Japanese Patent Application No. 151236/1983)
There is. However, although this method can compensate for the deletion of the subject signal, it has the drawback that the effect of improving the S/N ratio is not sufficient.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a still image signal processing device with a good S/N ratio without the drawbacks of the conventional method.

According to the invention, each transmitter and receiver have 1 bit 1
It has a frame storage circuit, and uses this 1-bit/1-frame storage circuit to store the odd (even) fields of the binarized signal from the TV camera signal on the transmitting side. The S/N is improved by adding up the number of times the object signal has been generated for each pixel in the (even number) field for several frames, and using the pixel determined to have generated the object signal a certain number of times or more as the object signal. Then, after transmitting the 1-bit still image data of the odd (even) field, the S/N of the even (odd) field is improved in the same way using the same 1-bit, 1-frame storage circuit as the odd (even) field. The 1-bit still image data of the (odd) field is sent out, and the 1-bit still image data of the odd (even) field and the even (odd) field sent from the transmitter is sequentially stored in the 1-bit/1-frame memory circuit of the receiver. By receiving the signal, it is possible to transmit a 1-bit still image signal with an improved S/N ratio without using a storage circuit for improving the S/N ratio.

Next, the present invention will be described in detail with reference to the drawings showing one embodiment of the present invention. FIG. 1 is a diagram showing an embodiment of the present invention, in which the transmitting side includes a signal input terminal 1,
Binary signal conversion circuit 2, adder circuit 3, overflow suppressor 4, object signal generation number lower bit storage circuit 5, object signal generation number upper bit storage circuit 6, all "1" detection circuit 7, data output terminal 8, It is composed of a sending still image monitor terminal 9.

Next, the receiving side is composed of a data input terminal 10, an odd field/even field switch 11, an odd field storage circuit 12, an even field storage circuit 13, a field selection circuit 14, and a received still image output terminal 15.

Next, to explain the operation, a camera signal obtained by capturing a stationary object (text or figure) with a television camera is supplied to the signal terminal input 1, and the binary signal conversion circuit 2
Based on a certain level, it is determined whether the signal is an object signal or a background signal, and the signal is converted into a binary signal. The converted signal is sent to an adder circuit 3,
The signal passes through the overflow suppressor 4 and is stored in the low-order bit memory circuit 5 for the number of times the object signal has been generated, which has been cleared to all "0" in advance.Only for the pixel that generated the object signal in the first field of the odd field, the address corresponding to that pixel is stored. Write the number of object signal occurrences (1). Next, the binary signal conversion circuit 2
The object signal of the next odd field signal is obtained by adding 1 to the number of occurrences of the object signal at the same pixel position in the previous frame stored in the memory circuits 5 and 6 in the adder circuit 3 (binary), and overflowing.・The data added by the suppressor 4 is limited so as not to overflow in the storage circuit (overflowed data becomes "1, 1") in the storage circuit 5.
The lower bits of the addition data are stored in the storage circuit 6, and the upper bits of the addition data are stored in the storage circuit 6. Repeat this operation for several frames (more than 3 frames), all “1”
The detection circuit 7 outputs 1-bit still image signal data of an odd field to the output terminal 8 by using the pixels that are all "1" in the storage circuits 5 and 6 as an object signal.

Thereafter, the S/N of the camera signal from input terminal 1 is improved by 1 bit for even fields as well as for odd fields, and 1 bit still image signal data for even fields is output from output terminal 8.

The data input terminal 10 on the receiving side sequentially inputs the 1-bit still image signal of the odd field and the 1-bit still image signal of the even field sent from the output terminal 8 of the transmitting side. Odd field and even field still image data from a data input terminal 10 are switched and written into an odd field storage circuit 12 and an even field storage circuit 13. Memory circuit 1
The field selection circuit 14 sequentially selects odd fields and even fields from the data stored in 2 and 13 in accordance with the scan speed of the television monitor, and outputs a 1-bit 1-frame still image signal to the received still image output terminal 15. . Further, a sending still image monitor terminal 9 on the transmitting side outputs a signal for monitoring a 1-bit still image signal of 1 field of data to be sent.

Figure 2 is a diagram showing the order of data processing on the transmitting side, where T ₁ is the odd field S/N improvement processing time, T ₂
T3 indicates the odd field data transmission time, _T3 indicates the even field S/N improvement processing time, _T4 indicates the even field transmission time, and the passage of time is shown from left to right in the figure.

In addition, the memory circuits 5 and 6 on the transmitting side and receiving side in FIG.
and 12 and 13 can be used for both purposes by making them dual transmitter and receiver devices.

As explained above, the present invention has a storage circuit for 1 bit and 1 frame, and performs S/N improvement and data transmission in a time-sharing manner, thereby eliminating the need to add a storage circuit for S/N improvement. There is an advantage that a 1-bit still image signal of 1 frame with improved /N can be transmitted and received.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an embodiment of the present invention, and FIG. 2 is a diagram showing the order of data processing on the transmitting side. In the figure, 1...input terminal, 2...binary signal conversion circuit, 3...addition circuit, 4...overflow suppressor, 5...subject signal occurrence count lower bit storage circuit, 6...subject signal occurrence count upper bit storage circuit, 7... ...all "1" detection circuit, 8...data output terminal, 9...transmission still image monitor terminal, 10...data input terminal, 11...odd field/even field storage circuit, 12...odd field storage circuit, 1
3... Even field storage circuit, 14... Field selection circuit, 15... Received still image output terminal.

Claims (1)

[Claims] 1. A device for converting a stationary subject into a 1-pixel binary (1 bit) still image signal, comprising: a binary signal conversion circuit that binarizes an input image signal and divides it into a subject portion and a background portion; The present invention is characterized by comprising a determining means that receives a signal from a value signal conversion circuit and determines that a pixel represents an object part when the object part is represented more than a predetermined number of times between a plurality of predetermined frames for each pixel. Still image signal processing device.