JPS6126245B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION If an excessive voltage and current are applied to an output transistor in an amplifier, the transistor will be destroyed. Second
Figures T ₁ , T ₂ , and T ₃ illustrate the relationship between the collector-emitter voltage and the collector current that destroy this output transistor, which is generally called the ASO line. Here, the ASO line varies depending on the input signal frequency, and T ₁ corresponds to direct current, and as the input signal frequency increases, the ASO line moves from T ₁ →T ₂ →T ₃ .

Conventionally, a transistor protection circuit as shown in FIG. 1 has been used to prevent the output transistor from operating outside the area indicated by the ASO line.

In the figure, input terminals 1 and 2 are each NPN
and is connected to the bases of PNP transistors 3 and 4 and to the collectors of NPN and PNP transistors 15 and 16. The collectors of transistors 3 and 4 are connected to the power supply (+B) and (-
B), and the emitters are connected to the load end 7 via resistors 5 and 6, respectively. The bases of transistors 15 and 16 are connected to resistors 9 and 10, respectively.
It is connected to the emitters of the transistors 3 and 4 via resistors 11 and 12, and to the anodes and cathodes of diodes 13 and 14 via resistors 11 and 12. The cathodes and anodes of diodes 13 and 14 are grounded. The emitters of transistors 15 and 16 are connected to load terminal 7, and load 8 is connected between load terminal 7 and ground.

In the conventional example described above, the diode 13 operates when the emitter voltage of the transistor 3 is higher than the forward voltage of the diode, that is, when the collector-emitter voltage (hereinafter referred to as operating voltage) V _CE of the transistor 3 is lower than the power supply voltage V _B. Turns on. In this case, since the impedance of the diode is small, if it is ignored, a first bridge circuit is formed by the resistors 5, 9, 11 and the load end 8. If the balance of the first bridge is disrupted due to a short circuit in the load 8, a detection voltage is generated between the base and emitter of each transistor, turning on the transistor 15, and the input signal to be applied to the transistor 3 from the input terminal 1 is It is cut off and transistor 3 is protected. Now, assuming that the resistance values of resistors 5, 9, and 11 are R _E , R ₁ , and R _{2 ,} respectively, and the base-emitter voltage of transistor 15 is V _BE , the collector current I _C of transistor 3 for turning on transistor 15 is I _C =R ₁・V _B +R ₂・V _BE /R _E (R ₁ +R ₂ )
−R ₁ /R _E (R ₁ +R ₂ )·V _CE ...(1).

Also, the diode 13 is connected to the transistor 3, respectively.
When the emitter voltage of transistor 3 and 4 is less than the forward voltage of the diode, that is, the operating voltage of transistor 3 V _CE
is turned off when the voltage is higher than the power supply voltage _VB . In this case, the transistor 15 is turned on when the voltage drop across the resistor 5 resulting in the collector current I _C flowing through the transistor 3 exceeds a predetermined value. That is, when the collector current I _C exceeds a certain value, the transistor 15 is turned on.

Therefore, in this case, I _C =V _BE /R _E (2).

The protection line X shown in FIG. 2 illustrates the relationship between the operating voltage V _CE of the transistor 3 and the collector current I _C when the transistor 15 as described above is turned on, and is expressed by equations (1) and (2). Defined by.

In the above manner, the NpN output transistor 3 is protected. Note that the PNP protection transistor 16 that protects the PNP output transistor 4 also has a different power supply polarity, but its operation is the same, so a description thereof will be omitted. However, as mentioned above, since the protection line X does not move even when the frequency of the input signal increases, there is a drawback that the protection circuit operates at high frequencies even within the range in which the output transistor can operate with sufficient margin.

The present invention has been made to eliminate such drawbacks, and provides a protection circuit having a characteristic that the operating range of the output transistor becomes wider as the signal frequency becomes higher.

The present invention will be described in detail below with reference to Examples.

3 and 4 show one embodiment of the present invention, with FIG. 3 being a block diagram thereof and FIG. 4 being a detailed circuit diagram. In Fig. 3, when either of the detection signals from both the frequency response circuit B of the protection circuit of the power amplifier A and the short circuit detection circuit C that detects a short circuit in the load is input, the OR circuit E outputs the output voltage. occurs.

On the other hand, ASO circuit D detects whether the operating point of amplifier A exceeds ASOT ₁ at the lowest frequency of the input signal. When the voltage exceeds the voltage, an output voltage is generated.

Next, the AND circuit F calculates the AND of the outputs of the ASO circuit D and the OR circuit E. The control circuit G for cutting off the input signal is controlled by the output of the AND circuit F, and controls the power amplifier A at its output level.
Protects against frequency and short circuits.

Next, a more detailed explanation will be given with reference to FIG. In the figure, 1 and 2 are signal input terminals from the pre-driver stage, 3 and 4 are output transistors whose collectors are directly connected to the positive and negative power supplies, respectively, and whose emitters are connected to a common output terminal 7 via emitter resistors 5 and 6. They are coupled together and grounded via a load 8, forming an output stage of a power amplifier. Next, circuits other than the output stage described above are protection circuits of the present invention. Block B indicated by the broken line in the figure is a frequency response circuit for determining the frequency response of the protection circuit, and both the collector-emitter voltage V _CE and the emitter current I _C of the output transistor 3 are connected to the resistor 3.
5, 34 and load 8 (resistors 135, 134 and load 8 on the side of output transistor 4).
The detection output is sent to the transistor 40 via a detection circuit including a low-pass filter 36, a diode 37, a capacitor 38, and a resistor 39 (on the transistor 4 side, a low-pass filter 136', a diode 137, a capacitor 138, and a resistor 139). , 46 and 47 (transistors 140, 143 and 147 on the side of transistor 4) to obtain a detection output. The operation of the second bridge circuit described above is almost the same as the operation of the bridge circuit explained in the conventional example, so a detailed explanation will be omitted. When the collector-emitter voltage V _CE and collector current I _C are generated, a detection output is applied to the low-pass filter 36. The detection output from the low-pass filter 36 is weighted so that the higher the frequency, the smaller the output, and is applied to the detection circuit to convert it into a direct current. It is set to high level and becomes the frequency response detection output. Therefore, for output signals having low frequency components, a frequency response detection output is generated under almost the same conditions as the conventional protection line
For signals that do not include low-frequency components, the higher the frequency, the lower the detection sensitivity, so unless the collector-emitter voltage V _CE and collector current I _C are higher than the protection line X, a frequency response detection output will not be generated. Therefore, the response curve showing the relationship between collector-emitter voltage V _CE and collector current I _C that produces a frequency response detection output shifts to the right as the frequency increases, similar to T ₁ → T ₂ → T ₃ in Figure 2. Move.

Next, block C shows a load short circuit detection circuit, and the output voltage between the midpoint and ground is detected by resistors 27 and 28.
This signal is divided into DC voltages and detected by a detection circuit consisting of a diode 29, a capacitor 31, and a resistor 30, which converts the signal into a DC voltage.
An inverted output voltage is obtained by a switching circuit, and the switching transistor 32 is turned on when the load is short-circuited or at a low level, so a DC voltage is generated, and the output becomes 0 when a signal is output. By passing the outputs of the two frequency response detection circuits B and short circuit detection circuit C through an OR circuit E consisting of diodes 49 and 51, the frequency of the output of the second bridge circuit will be lowered or the output amplitude will be increased. The output of the OR circuit E outputs a DC voltage depending on whether the load is short-circuited or the load is short-circuited. The above detection circuit C can be used for both the NPN side (transistor 3 side) and PNP side (transistor 4 side) of the SEPP amplifier, and on the PNP side, its output is connected to the switching transistor 53 and the resistor 54 connected to its collector. This is achieved by an inverting switching circuit consisting of

Next, ASO detection circuit D consists of resistors 5, 9, 11 and diode 13 (on the transistor 4 side, resistors 6, 10, 12, and diode 1) with load 8 as one side.
4), which is the same as the bridge circuit in the conventional example shown in FIG. Through a switching circuit consisting of resistors 20 and 26), an output is obtained which generates a DC voltage only in the portion beyond the protection line X set by the first and second bridge circuits.

Next, the output of the OR circuit E which takes the OR of the frequency response circuit B and the short circuit detection circuit C, and the output of the ASO detection circuit D are connected to the diodes 57, 59, 61 and the resistor 5.
5 (diodes 58, 6 on the side of transistor 4)
0, 62 and resistor 56), and the output is output from the control transistor 15 of the control circuit G (1 on the transistor 4 side).
6).

Therefore, in this AND circuit F, a detection output is generated from the OR circuit E due to either the frequency or amplitude of the voltage detected by the second bridge circuit being low, or the load being short-circuited. AND circuit F
However, if there is no detection output from the ASO detection circuit D, the control transistor will not operate. Conversely, even if a detection output is generated from the ASO detection circuit D, it will not operate if the frequency is low or the level is small.

The operation of the present protection circuit with the above configuration is summarized as follows. When a load is short-circuited, the load short-circuit detection circuit C outputs a DC voltage regardless of the frequency, and the output of the OR circuit E also generates a DC voltage. Also ASO
The output for the detection circuit also reaches the limit region and generates a DC voltage, and the output of the AND circuit F outputs a DC voltage to conduct the control transistors 15 and 16 to limit the input signal and protect the power transistors 3 and 4. Next, when the frequency is lower than the frequency set by the frequency response circuit B, the output of the OR circuit E generates a DC voltage by the frequency response circuit B, and the ASO detection circuit D also generates an output, so the control transistor 15 of the limiting circuit G and 16 are turned on, and the input signal is restricted. This operation is the same as the result of the conventional method. Next, when the frequency is high and the level is low, the sensitivity of the frequency response circuit B is low as described above, so even if a detection output is generated from the ASO detection circuit D, the output of the frequency response circuit B becomes zero and the control circuit G does not operate.

As described above, frequency response circuit B generates a detection output under the same conditions as protection line B when the frequency is low, but as the frequency increases, the detection output is generated unless the collector-emitter voltage or collector current becomes higher. does not occur. In other words, as the frequency increases, the frequency is set by the frequency response circuit.
The ASO line moves to the right in FIG. 2 from T ₁ to T ₃ .

As described above, according to the present invention, the protection line that determines the start of the protection operation moves as the frequency increases, expanding the range in which the amplifier can operate normally, thereby preventing the protection circuit from operating unnecessarily and preventing distortion, etc. It is possible to obtain an excellent effect of less generation.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing a conventional amplifier protection circuit, Fig. 2 is an explanatory diagram of its operation, Fig. 3 is a block diagram showing the basic configuration of the present invention, and Fig. 4 shows a specific embodiment of the present invention. FIG. In the figure, B is a frequency response circuit, C is a short circuit detection circuit,
G is a limiting circuit.

Claims (1)

[Claims] 1. An output transistor whose emitter is connected to the load end, a protection transistor whose collector and emitter are connected to the base of the output transistor and the load end, respectively, and a first transistor provided between the emitter of the output transistor and ground. and a second voltage dividing circuit, a short circuit detection circuit for detecting a load short circuit, and a second voltage dividing circuit.
The voltage between the output terminal and the load terminal of the voltage divider circuit is weighted by a low-pass filter so that the higher the frequency, the lower the level.When the output exceeds a predetermined level, a second switching output is generated. means for obtaining the logical sum of the second switching output and the output of the short circuit detection circuit; An amplifier comprising means for generating a first switching output, and means for obtaining an AND of the logical sum and the first switching output, and controlling the protection transistor by the AND. protection circuit.