JPS6126253B2 - - Google Patents
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- Publication number
- JPS6126253B2 JPS6126253B2 JP55039093A JP3909380A JPS6126253B2 JP S6126253 B2 JPS6126253 B2 JP S6126253B2 JP 55039093 A JP55039093 A JP 55039093A JP 3909380 A JP3909380 A JP 3909380A JP S6126253 B2 JPS6126253 B2 JP S6126253B2
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- Japan
- Prior art keywords
- output
- phase
- signal
- amplitude
- interference wave
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
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- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Noise Elimination (AREA)
- Radio Transmission System (AREA)
Description
【発明の詳細な説明】
本発明は、無線通信において障害となる干渉波
を受信側で除去する装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a device that removes interference waves that cause interference in wireless communication on the receiving side.
従来のこの種の装置は第1図のように構成され
ており、1は主アンテナ、2は補助アンテナ、3
は振幅位相制御回路、4は合成器、5は相関検出
器である。主アンテナ1は希望波方向に向けら
れ、これに希望波の他の干渉波が漏れ込む。補助
アンテナ2は干渉波源方向に向けられ、干渉波の
みを受信する。補助アンテナ2は受信した干渉波
は、振幅位相制御回路3で主アンテナ1への入力
干渉波と等振幅で逆位相となるように制御して、
主アンテナ1による受信信号と合成することによ
つて干渉波が除去される。この振幅位相制御回路
3の制御信号は合成器4の出力と補助アンテナ2
で受信した干渉波との相関を相関検出器5によつ
て得る。この相関検出器5は、従来入力信号の周
波数変動に対して位相同期ループ(PLL)等を用
いて入力信号の安定化を行つた後、位相検波を行
い位相差情報を得ている。しかし、PLLを用いた
場合は無変調信号に対しては良好に動作するが、
PSK波あるいはFM波の様の搬送波成分のない場
合、あるいは搬送波成分があつてもスペクトルに
広がりを持つ場合はPLLが同期せず、所要の位相
差を得ることが困難となる。 A conventional device of this type is constructed as shown in Fig. 1, where 1 is a main antenna, 2 is an auxiliary antenna, and 3 is a main antenna.
4 is a synthesizer, and 5 is a correlation detector. The main antenna 1 is oriented in the direction of the desired wave, and other interference waves of the desired wave leak into it. The auxiliary antenna 2 is directed toward the interference wave source and receives only the interference wave. The interference wave received by the auxiliary antenna 2 is controlled by an amplitude phase control circuit 3 so that it has the same amplitude and opposite phase as the interference wave input to the main antenna 1.
Interference waves are removed by combining with the signal received by the main antenna 1. The control signal of this amplitude phase control circuit 3 is the output of the combiner 4 and the auxiliary antenna 2.
The correlation detector 5 obtains the correlation with the interference wave received at the . This correlation detector 5 conventionally stabilizes the input signal using a phase-locked loop (PLL) or the like against frequency fluctuations of the input signal, and then performs phase detection to obtain phase difference information. However, when using PLL, it works well for unmodulated signals, but
If there is no carrier component such as a PSK wave or FM wave, or if there is a carrier component but the spectrum is spread, the PLL will not synchronize and it will be difficult to obtain the required phase difference.
本発明は、これらの欠点を除去するために、補
助アンテナで受信した干渉波の振幅および位相を
周期的に別小変動位相と補償後の干渉波電力変動
の位相との差を得ることによつて、干渉波を抑圧
する干渉波補償装置を提供するものである。 In order to eliminate these drawbacks, the present invention periodically separates the amplitude and phase of the interference wave received by the auxiliary antenna by obtaining the difference between the phase of the small fluctuation and the phase of the interference wave power fluctuation after compensation. Accordingly, the present invention provides an interference wave compensation device that suppresses interference waves.
以下本発明を詳細に説明する。 The present invention will be explained in detail below.
第2図は本発明の実施例であつて、1は主アン
テナ、2は補助アンテナ、3は振幅位相制御回
路、4は合成器、6a,6bは電圧積算器、7は
低周波発振器、8a,8bは加算器、9は周波数
変換器、10は帯域通過波器、11は信号増幅
器、12は包絡線検出器、13は増幅器、14は
90゜移相器、15a,15bは位相検波器、16
は干渉波補償出力である。 FIG. 2 shows an embodiment of the present invention, in which 1 is a main antenna, 2 is an auxiliary antenna, 3 is an amplitude phase control circuit, 4 is a combiner, 6a, 6b are voltage integrators, 7 is a low frequency oscillator, 8a , 8b is an adder, 9 is a frequency converter, 10 is a bandpass waver, 11 is a signal amplifier, 12 is an envelope detector, 13 is an amplifier, 14 is a
90° phase shifter, 15a, 15b are phase detectors, 16
is the interference wave compensation output.
振幅位相制御回路3は振幅と位相を同時に制御
できるもので、ここではベクトル変調器を用いた
例について説明する。第3図はベクトル変調器の
概略構成図を示したものであり、17は補助アン
テナ2に接続される入力端子、18は信号分岐回
路、19a,19b,19c,19dは固定移相
器、20a,20b,20c,20dはPIN減衰
器、21は信号合成器、22a,22bは加算器
8a,8bからの各制御信号の入力端子、23は
合成器4に接続される出力端子である。 The amplitude and phase control circuit 3 can control amplitude and phase at the same time, and an example using a vector modulator will be described here. FIG. 3 shows a schematic configuration diagram of a vector modulator, in which 17 is an input terminal connected to the auxiliary antenna 2, 18 is a signal branch circuit, 19a, 19b, 19c, and 19d are fixed phase shifters, and 20a is a signal branch circuit. , 20b, 20c, and 20d are PIN attenuators; 21 is a signal combiner; 22a and 22b are input terminals for each control signal from the adders 8a and 8b; and 23 is an output terminal connected to the combiner 4.
第3図の回路において、補助アンテナ2からの
入力端子は、信号分岐回路18で4系統に分岐さ
れ、それぞれ固定移相器19a,19b,19
c,19dにより0、π/2、π、3π/2の位
相推移に与えられる。即ち、入力信号をIAej(
〓t+〓)〔但し、IA:振幅、Ω:入力信号角周波
数、β:初期位相〕とすると、固定移相器19
a,19b,19c,19dの各出力は次の様に
なる。 In the circuit shown in FIG. 3, the input terminal from the auxiliary antenna 2 is branched into four systems by a signal branching circuit 18, and each has a fixed phase shifter 19a, 19b, 19.
c, 19d gives phase shifts of 0, π/2, π, and 3π/2. That is, the input signal is I A e j(
〓 t+ 〓 ) [where I A : amplitude, Ω: input signal angular frequency, β: initial phase], the fixed phase shifter 19
The outputs of a, 19b, 19c, and 19d are as follows.
0相出力:IA/4ej(〓t+〓) (1)
π相出力:IA/4ej(〓t+〓+〓)
=−IA/4ej(〓t+〓) (3)
この後、PINダイオードを用いて減衰器20
a,20b,20c,20dにより、それぞれ
PINダイオードに流れる電流に応じてその出力振
幅が制御される。これら4信号を信号合成器21
で合成して出力する。0 phase output: I A /4e j( 〓 t+ 〓 ) (1) π phase output: I A /4e j( 〓 t+ 〓 + 〓 ) =-I A /4e j( 〓 t+ 〓 ) (3) After this, use the PIN diode to connect the attenuator 20.
a, 20b, 20c, 20d, respectively
The output amplitude is controlled according to the current flowing through the PIN diode. These four signals are transferred to a signal synthesizer 21
Combine and output.
第4図はPIN減衰器20a,20b,20c,
20dの各出力のベクトル図を示す。第4図aは
各ダイオードに電流を流さず、各減衰器20a,
20b,20c,20dの減衰量が0の場合であ
り、式(1)〜(4)の和より明らかなように各ベクトル
は打消し合い、ベクトル変調器出力は0となる。
しかし、減衰器20aおよび20cに接続された
入力端子22に制御電圧Aを印加すると、この制
御電圧Aが正の電圧の場合減衰器20aのみにA
に比例した電流が流れ、減衰量が増加する。この
とき減衰器20aの出力は制御電圧Aに応じて振
幅が減衰するから0相のベクトル〓1は次式とな
る。 Figure 4 shows PIN attenuators 20a, 20b, 20c,
A vector diagram of each output of 20d is shown. In FIG. 4a, no current flows through each diode, and each attenuator 20a,
This is a case where the attenuation amount of 20b, 20c, and 20d is 0, and as is clear from the sum of equations (1) to (4), the vectors cancel each other out, and the vector modulator output becomes 0.
However, when the control voltage A is applied to the input terminal 22 connected to the attenuators 20a and 20c, if the control voltage A is a positive voltage, the A
A current proportional to flows, and the amount of attenuation increases. At this time, since the amplitude of the output of the attenuator 20a is attenuated in accordance with the control voltage A, the zero-phase vector 〓 1 becomes the following equation.
〓1=1/4IA(1−KVA)ej(〓t+〓)(1)′
〔但し、KVは制御利得〕
このため、式(1)′、(2)〜(4)の和より、合成ベク
トルはπ方向成分のみが現われ、出力は−1/4KV
AIAej(〓t+〓)となる。即ち、制御信号の正負に
応じて減衰器20aまたは20cに流す電流を制
御することによつて、0、π方向のベクトルを制
御し、また減衰器20bまたは20dによつて
π/2、3π/2方向のベクトルを制御する。こ
の結果、ベクトル変調器入力端子の振幅および位
相を任意に制御して出力することができる。〓 1 = 1/4I A (1-K V A) e j ( 〓 t+ 〓 ) (1)' [However, K V is the control gain] Therefore, Equations (1)', (2) to (4) From the sum of , only the π-direction component appears in the composite vector, and the output becomes -1/4K V AI A e j( 〓 t+ 〓 ) . That is, by controlling the current flowing through the attenuator 20a or 20c depending on the positive or negative sign of the control signal, the vector in the 0 and π directions is controlled, and the vector in the 0 and π directions is controlled by the attenuator 20b or 20d. Controls vectors in two directions. As a result, the amplitude and phase of the vector modulator input terminal can be controlled and output as desired.
次に、このベクトル変調器を用いた場合の干渉
波補償装置について説明を行う。 Next, an explanation will be given of an interference wave compensation device using this vector modulator.
先ず、干渉波源に向けられた補助アンテナ2で
受信した信号(干渉波)〓Aは次の様に表わせる。 First, the signal (interference wave) A received by the auxiliary antenna 2 directed toward the interference wave source can be expressed as follows.
〓A=I0Aej(〓t+〓) (5)
〓Aは振幅位相制御回路3に入力され、0、π
方向ベクトルは電圧積算器6aの出力Aに低周波
発振器7の出力a cosωt〔但し、aは振幅、
ωは低周波発振器7の出力角周波数〕を加算器8
aで加算した電圧(A+a cosωt)で制御さ
れる。同様に、π/2、3π/2方向は(B+a
sinωtで制御される。この結果、ベクトル変
調器出力〓VMは次式となる。 〓 A = I 0A e j( 〓 t+ 〓 ) (5) 〓 A is input to the amplitude phase control circuit 3, and 0, π
The direction vector is the output A of the voltage integrator 6a and the output a cosωt of the low frequency oscillator 7 [where a is the amplitude,
ω is the output angular frequency of the low frequency oscillator 7] is added to the adder 8
It is controlled by the voltage (A+a cosωt) added by a. Similarly, the π/2 and 3π/2 directions are (B+a
It is controlled by sinωt. As a result, the vector modulator output 〓 VM becomes the following equation.
〓VM=−KVIA{(A+a cosωt)+j(B+a sinωt)}ej(〓t+〓)IA′ej(〓t+〓+〓) (6)
但し、
IA=I0A/4 (7)
IA′
=−KVIA√(+ )2+(+
a sinωt)2 (8)
φ=tan-1(B+a sinωt/A+a cosω
t)(9)
即ち、〓VMは第5図のベクトル図に示す様にP
点(−KVAIA、−jKVBIA)を中心に半径KVaIAの
円を描くように角周波数ωでベクトルの先端が回
転する。〓 VM = −K V I A {(A+a cosωt)+j(B+a sinωt)}e j( 〓 t+ 〓 ) I A ′e j( 〓 t+ 〓 + 〓 ) (6) However, I A = I 0A /4 (7) I A ′ = −K V I A √(+ ) 2 +(+
a sinωt) 2 (8) φ=tan -1 (B+a sinωt/A+a cosω
t) (9) That is, 〓 VM is P as shown in the vector diagram in Figure 5.
The tip of the vector rotates at the angular frequency ω so as to draw a circle with radius K V aI A around the point (-K V AI A , -jK V BI A ).
一方、希望波方向に向けられた主アンテナ1で
受信する干渉波〓Mは次の様に表わせる。 On the other hand, the interference wave 〓 M received by the main antenna 1 directed toward the desired wave direction can be expressed as follows.
〓M=IMej(〓t+〓) (10)
この〓Mと〓VMを合成器4において合成する
と、式(6)および(10)より次式が得られる。 〓 M =I M e j( 〓 t+ 〓 ) (10) When this 〓 M and 〓 VM are combined in the synthesizer 4, the following formula is obtained from formulas (6) and (10).
〓E=〓M+〓VM
=IMej(〓t+a)+IA′ej(〓t+〓+〓)
=I0ej(〓t+〓0 ) (11)
但し、
I0 2={IA′cos(β+φ)+IMcosα}2+{IA′ sin(β+φ)+IMsinα}2
=IM 2+KV 2IA 2(A2+B2+a2)+2IMIAKV{Acos(α+β)+Bsin(α−β)}
+2KV 2IA 2a(Acosωt+Bsinωt)−
2IMIAKVa cos(ωt−α+β) (12)
φ0=tan-1{IA′ sin(β+φ)+IM s
inα/IA′ cos(β+φ)+IMcosα}
(13)
合成ベクトル〓Eは第5図に示す様にR(A0IM
−KVAIA、j(B0IM−KVBIA))〔但し、A0=cos
(α−β)、B0=sin(α−β)〕を中心として半径
KVaIAの円を描く。このとき合成器4の出力〓E
の長さ、即ち振幅は〓Eの先端が原点0に近づく
とき最小となり、離れるとき最大となる。これは
ベクトル変調器出力〓VMが、主アンテナ1とする
干渉波〓Mと等振幅、逆位相のベクトル〓M′に近
づくときと、離れるときに一致する。即ち、ベク
トル〓Eの振幅変動の位相は、低周波発振器7の
出力a cosωtに比べて、〓VMの回転中心P(−
KVAIA、−jKVBIA)から〓M′の先端Q′(−A0IM、
−jB0IM)への方向に相当するθだけ位相差を持
つ。 〓 E =〓 M +〓 VM =I M e j( 〓 t+a) +I A ′e j( 〓 t+ 〓 + 〓 ) =I 0 e j( 〓 t+ 〓 0 ) (11) However, I 0 2 = {I A ′ cos (β + φ) + I M cos α} 2 + {I A ′ sin (β + φ) + I M sin α} 2 = I M 2 +K V 2 I A 2 (A 2 +B 2 +a 2 )+2I M I A K V {Acos(α+β)+Bsin(α−β)} +2K V 2 I A 2 a(Acosωt+Bsinωt)−
2I M I A K V a cos (ωt−α+β) (12) φ 0 =tan -1 {I A ′ sin(β+φ)+I M s
inα/I A ′ cos(β+φ)+I M cosα} (13) Composite vector = E is R(A 0 I M
−K V AI A , j (B 0 I M −K V BI A )) [However, A 0 = cos
(α−β), B 0 =sin(α−β)] and draw a circle with radius K V aI A as the center. At this time, the output of synthesizer 4〓 E
The length, that is, the amplitude of 〓 becomes the minimum when the tip of E approaches the origin 0, and becomes the maximum when it moves away from the origin. This coincides when the vector modulator output 〓 VM approaches and leaves the vector 〓 M ', which has the same amplitude and opposite phase as the interference wave 〓 M from the main antenna 1. That is, the phase of the amplitude fluctuation of the vector 〓
K V AI A , −jK V BI A ) to the tip Q′ of 〓 M ′ (−A 0 I M ,
−jB 0 I M ) has a phase difference of θ corresponding to the direction.
従つて、包絡線検出器12よつて合成器4の出
力〓Eの振幅を求める。即ち式(11)の実数部のみ考
えると、次式となる。 Therefore, the envelope detector 12 determines the amplitude of the output E of the synthesizer 4. That is, considering only the real part of equation (11), the following equation is obtained.
K1{Re(〓E)}2=K1I0 2 cos2(Ωt+φ0)=K1/2I0 2{1−cos(2Ωt+2φ0)} (14)
〔但し、K1は合成器より後段、包絡線検出器まで
の利得〕
これをアンプ13内の帯域波器等で入力端子
周波数の2倍成分および直流成分を除くと包絡線
検出器12の出力idは式(12)、(14)より次式とな
る。K 1 {Re(〓 E )} 2 = K 1 I 0 2 cos 2 (Ωt + φ 0 ) = K 1 /2I 0 2 {1−cos (2Ωt + 2φ 0 )} (14) [However, K 1 is from the synthesizer Gain up to the envelope detector in the subsequent stage] If this is removed by a bandpass filter or the like in the amplifier 13 to remove the twice the input terminal frequency component and the DC component, the output i d of the envelope detector 12 is given by equation (12), 14), the following formula is obtained.
id=K1I0 2/2
=K1{KV2IA 2a(A cosωt +B sinω
t)
−IMIAKVa cos(ωt
−α+β)} (15)
但し、第2図の実施例では周波数変換器9で中
間周波数に変換し、雑音が他の信号の影響を避け
るために帯域波器10で干渉波周波数成分のみ
を取り出し、適当なレベルに信号増幅器12で増
幅した後検波している。i d =K 1 I 0 2 /2 =K 1 {K V2 I A 2 a(A cosωt +B sinω
t) −I M I A K V a cos (ωt −α+β)} (15) However, in the embodiment shown in FIG. 2, the frequency is converted to an intermediate frequency by the frequency converter 9, and in order to avoid the influence of noise from other signals. Only the frequency component of the interference wave is extracted by a bandpass filter 10, amplified to an appropriate level by a signal amplifier 12, and then detected.
次に、包絡線検出器12の出力を増幅器13で
適当なレベルに増幅した後、低周波発振器7の出
力およびこれに90゜移相器14によつて90゜の位
相推移を与えた信号により、位相検波器15a,
15bにおいて位相検波を行うと次式となる。 Next, the output of the envelope detector 12 is amplified to an appropriate level by the amplifier 13, and then the output of the low frequency oscillator 7 and a signal obtained by giving a 90° phase shift to this by the 90° phase shifter 14 are used. , phase detector 15a,
When phase detection is performed in 15b, the following equation is obtained.
K2×id×a cosωt=K1K2KVIAa2/2〔KVIA(A−Acos2ωt
+Bsin2ωt)IM{cos(2ωt−α+β)−cos(−α+β)}〕 (16)
〔但し、K2は増幅器13および位相検波器15
a,15bの利得〕
さらに6内の低域波器で直流分のみを取り出
すと位相検波器15a,15bの出力ipd1は次
式となる。K 2 × i d × a cosωt=K 1 K 2 K V I A a 2 /2 [K V I A (A-Acos2ωt +Bsin2ωt) I M {cos (2ωt-α+β)-cos (-α+β)}] ( 16) [However, K 2 is the amplifier 13 and phase detector 15
Gains of a and 15b] Furthermore, if only the DC component is taken out by the low-frequency wave detector in 6, the output i pd1 of the phase detectors 15a and 15b becomes the following equation.
ipd1=K3IAa2/2{KVIAA−IM cos(α−
β)}
(17)
〔但し、K3=K1K2KV〕
さらに、低周波発振器7の出力を90゜位相推移
した信号による位相検波器15bの出力ipd2は
次式となる。i pd1 =K 3 I A a 2 /2 {K V I A A-I M cos(α-
β)} (17) [However, K 3 =K 1 K 2 K V ] Furthermore, the output i pd2 of the phase detector 15b based on a signal obtained by shifting the phase of the output of the low frequency oscillator 7 by 90° is given by the following equation.
ipd2=K3IAa2/2{KVIAB−IMsin(α−β
)}
(18)
一方、第5図のベクトル〓VMの回転中心Pおよ
び〓M′の先端Q′の座標から、θに関して次式が
得られる。i pd2 =K 3 I A a 2 /2 {K V I A B-I M sin(α-β
)} (18) On the other hand, from the coordinates of the rotation center P of the vector 〓 VM and the tip Q' of the vector 〓 M ′ in Fig. 5, the following equation can be obtained regarding θ.
cosθ=−IMcos(α−β)+AKVIA/l(19
)
sinθ=−IMsin(α−β)+BKVIA/l(20
)
l=√{−M (−)+V A}2+{−M (−)+V A}2 (21)
これより式(17)および式(18)は次の様に書
ける。cosθ= -IMcos (α-β)+ AKVIA / l (19
) sinθ= -IM sin(α-β)+BK VI A /l(20
) l=√{− M (−)+ V A } 2 +{− M (−)+ V A } 2 (21) From this, equations (17) and (18) can be written as follows.
ipd1=1/2K3IAa2・l cosθ (22)
ipd2=1/2K3IAa2・l sinθ (23)
ここで、lは式(21)から明らかな様に、ベク
トル〓VMの回転中心とベクトル〓M′の先端即ち、
P、Q′間の距離である。即ち位相検波器15
a,15bの各出力ipd1およびipd2はベクトル
変調器出力〓VMの回転中心から、主アンテナ1へ
の入力干渉波と等振幅、逆位相の信号ベクトル〓
M′の先端へ向かうベクトルの第5図の座標軸にお
ける実軸成分と虚軸成分である。 i pd1 = 1/2K 3 I A a 2・l cosθ (22) i pd2 = 1/2K 3 I A a 2・l sinθ (23) Here, l is the vector 〓 Rotation center of VM and vector 〓 Tip of M ′, that is,
This is the distance between P and Q'. That is, the phase detector 15
The outputs i pd1 and i pd2 of a and 15b are vector modulator outputs = signal vector from the rotation center of VM with equal amplitude and opposite phase to the input interference wave to main antenna 1 =
These are the real axis component and the imaginary axis component on the coordinate axes of FIG. 5 of the vector toward the tip of M '.
従つて、電圧積算器6a,6bにおいて、それ
までの出力電圧A,Bに位相検波器15a,15
bの各出力を符号変換して積算すると、電圧積算
器6a,6bの各出力は(A+K0l cosθ)、(B
+K0l sinθ)〔但し、K0=−(K3IAa2)/2〕とな
り、ベクトル変調器出力は〓VMの次の〓VM′に変
化する。 Therefore, in the voltage integrators 6a, 6b, the phase detectors 15a, 15 are applied to the output voltages A, B up to that point.
When each output of voltage integrator 6a, 6b is converted into sign and integrated, each output of voltage integrator 6a, 6b becomes (A+K 0 l cosθ), (B
+K 0 l sin θ) [However, K 0 =-(K 3 I A a 2 )/2], and the vector modulator output changes to 〓 VM ' next to 〓 VM .
〓VM′=−KVIA〔(A+K0l cosθ)+a cosω
t
+j{(B=K0l sinθ)+a sinωt}〕ej(
〓t+〓)
=IA″ej(〓t+〓+〓′) (24)
但し、
IA″=−KVIA√{(+0 )+2 }2+{(+0 )+
}2(25)
φ′=tan-1{(B+K0l sinθ)+a sinωt/(A+K0l cosθ)+a cosωt} (26)
即ち、〓V′MはP′(−KVIA(A+K0l cosθ)、
−KVIA(B+K0l sinθ))を中心として半径K
VaIAの円を描く様にベクトルの先端が回転し、こ
の回転中心がベクトル〓M′に近付く。この動作を
続ける結果、最終的に、ベクトル変調器出力〓VM
の先端は〓M′の先端、即ちQ′(A0IM、−B0IM)を
中心に半径KVaIAの円を描き、〓VMと主アンテナ
1の入力干渉波〓Mとの合成ベクトル〓Eは原点0
を中心に回転する長さKVaIAのベクトルとなる。
従つて、aを適当に小さい値を選べば、合成器4
の出力の干渉波〓Eは十分小さい電力となり、干
渉波を抑圧することができる。〓 VM ′=-K V I A [(A+K 0 l cosθ)+a cosω
t +j{(B=K 0 l sinθ)+a sinωt}]e j(
〓 t+ 〓 ) =I A ″e j( 〓 t+ 〓 + 〓′ ) (24) However, I A ″=−K V I A √{(+ 0 )+2 } 2 +{(+ 0 )+
} 2 (25) φ′=tan -1 {(B+K 0 l sinθ)+a sinωt/(A+K 0 l cosθ)+a cosωt} (26) That is, 〓 V ′ M is P′(−K V I A (A+K 0 l cosθ),
−K V I A (B+K 0 l sinθ)) and the radius K
The tip of the vector rotates as if drawing a circle of V aI A , and the center of rotation approaches the vector 〓 M ′. As a result of continuing this operation, the vector modulator output 〓 VM
The tip of 〓 draws a circle with radius K V aI A centered on the tip of 〓 M ′, that is, Q′ (A 0 I M , −B 0 I M ), and 〓 VM and the input interference wave of main antenna 1 〓 M and The resultant vector 〓 E is the origin 0
It becomes a vector of length K V aI A rotating around .
Therefore, if a is chosen to be a suitably small value, the synthesizer 4
The output interference wave 〓 E has a sufficiently small power and can suppress the interference wave.
以上は、第2図における振幅位相制御回路3を
第3図に示すベクトル変調器を使用する場合につ
いて説明した。振幅位相制御回路は他にも以下に
示す構成によつても実現可能である。 The above has described the case where the vector modulator shown in FIG. 3 is used as the amplitude phase control circuit 3 in FIG. 2. The amplitude phase control circuit can also be realized by the configuration shown below.
第6図は他の振幅位相制御回路3の一構成例で
あつて、17は入力端子、22a,22bは制御
信号入力端子、25は信号分岐回路、26a,2
6bはミクサ、27は90゜移相器、29は信号合
成器、23は出力信号である。補助アンテナで受
信した干渉波〓Aは入力端子17に入力され信号
分岐回路25で2系統に分岐される。一方の信号
はミクサ26aに入力され、もう一方は90゜移相
器27で90゜の位相推移を与えられた後、ミクサ
26bに入力される。このときのミクサ26a,
26bへの入力信号は式(5)より、各々(I0A/
2)ej(〓t+〓)、j(I0A/2)ej(〓t+〓)と
表わせる。一方、ミクサ26a,26bには制御
信号(A+a cosωt)、(B+a sinωt)も
また制御信号入力端子22a,22bから入力さ
れる。従つてミクサ26aの出力は
KMI0A/2(A+a cosωt)ej(〓t+〓)(27)
(但し、KMはミクサの感度)となり、ミクサ26
bの出力は
j・KMI0A/2・(B+a sinωt)ej(〓t+〓)
(28)
となる。これらのミクサ出力信号は、信号合成器
29で合成され、出力端子23からの出力され
る。従つて、出力端子23に現われる信号〓1は
次の様になる。 FIG. 6 shows a configuration example of another amplitude phase control circuit 3, in which 17 is an input terminal, 22a, 22b are control signal input terminals, 25 is a signal branch circuit, 26a, 2
6b is a mixer, 27 is a 90° phase shifter, 29 is a signal combiner, and 23 is an output signal. The interference wave A received by the auxiliary antenna is input to the input terminal 17 and branched into two systems by the signal branching circuit 25. One signal is input to mixer 26a, and the other signal is given a 90 degree phase shift by 90 degree phase shifter 27 and then input to mixer 26b. Mixer 26a at this time,
From equation (5), the input signals to 26b are each (I 0A /
2) It can be expressed as e j( 〓 t + 〓 ) , j(I 0A /2) e j( 〓 t+ 〓 ) . On the other hand, control signals (A+a cosωt) and (B+a sinωt) are also input to the mixers 26a and 26b from control signal input terminals 22a and 22b. Therefore, the output of the mixer 26a is K M I 0A /2(A+a cosωt)e j( 〓 t+ 〓 ) (27) (where K M is the sensitivity of the mixer), and the output of the mixer 26 is
The output of b is j・K M I 0A /2・(B+a sinωt) e j( 〓 t+ 〓 ) (28). These mixer output signals are combined by a signal combiner 29 and output from an output terminal 23. Therefore, the signal 〓1 appearing at the output terminal 23 is as follows.
〓1=KMI0A/2{(A+a cosωt)
+j(B+a sinωt)}ej(〓t+〓) (29)
ここで、KM、I0Aは定数であるから式(6)と同
一形となり、ベクトル変調器と同一効果が得られ
る。但し、このとき第2図は合成器4はベクトル
変調器の場合は和回路であつたが、差回路とする
必要がある。〓 1 =K M I 0A /2 {(A+a cosωt) +j(B+a sinωt)}e j( 〓 t+ 〓 ) (29) Here, since K M and I 0A are constants, it has the same form as equation (6) Therefore, the same effect as a vector modulator can be obtained. However, in this case, in FIG. 2, the combiner 4 is a sum circuit when it is a vector modulator, but it needs to be a difference circuit.
さらに、第7図は可変減衰器(または増幅器)
および可変移相器を使用した場合の振幅位相制御
回路3の構成例にあつて、17は入力端子、22
a,22bは制御信号入力端子、32は可変位相
器、33は可変減衰器(または増幅器)、35は
信号変換回路、23は出力端子である。補助アン
テナで受信した干渉波は入力端子17により入力
され、可変移相器32で位相を制御され、可変減
衰器(または増幅器)33で振幅を制御される。
この制御信号は次の様に得られる。制御信号入力
端子22aから入力する制御信号(A+a cos
ωt)と22bから入力する制御信号(B+a
sinωt)は信号変換回路35によつて次の様に
演算される。即ち、可変減衰器(または増幅器)
33の制御信号S1および可変移相器32の制御信
号S2は次の様になる。 Furthermore, Figure 7 shows a variable attenuator (or amplifier)
In the configuration example of the amplitude phase control circuit 3 when using a variable phase shifter, 17 is an input terminal, 22
a, 22b are control signal input terminals, 32 is a variable phase shifter, 33 is a variable attenuator (or amplifier), 35 is a signal conversion circuit, and 23 is an output terminal. The interference wave received by the auxiliary antenna is input through the input terminal 17, its phase is controlled by a variable phase shifter 32, and its amplitude is controlled by a variable attenuator (or amplifier) 33.
This control signal is obtained as follows. The control signal input from the control signal input terminal 22a (A+a cos
ωt) and the control signal input from 22b (B+a
sinωt) is calculated by the signal conversion circuit 35 as follows. i.e. variable attenuator (or amplifier)
The control signal S 1 of the variable phase shifter 33 and the control signal S 2 of the variable phase shifter 32 are as follows.
S1=√(+ )2+(+
t)2 (30)
S2=tan-1(B+a sinωt/A+a cosωt
)=φ(31)
さらに、制御信号S1によつてこれに比例した振
幅が得られるように可変減衰器(または増幅器)
33を制御し、S2に比例した位相推移が得られる
様に可変移相器32を制御する。この結果、出力
端子23には出力信号〓2が現われる。S 1 =√(+) 2 +(+
t) 2 (30) S 2 = tan -1 (B+a sinωt/A+a cosωt
) = φ (31) Furthermore, a variable attenuator (or amplifier) is used so that an amplitude proportional to this can be obtained by the control signal S1 .
33, and the variable phase shifter 32 is controlled so as to obtain a phase shift proportional to S2 . As a result, an output signal 〓 2 appears at the output terminal 23 .
〓2=I0A=√(+ )2+(+ )2ej(〓t+〓+〓) (32)
この出力信号〓2もやはり式(6)の〓VMに比例し
た信号となり、ベクトル変調器と同一効果が得ら
れる。但し、この場合も第2図の合成器4は差回
路とする。 〓 2 = I 0A = √ (+ ) 2 + (+ ) 2 e j( 〓 t+ 〓 + 〓 ) (32) This output signal 〓 2 is also a signal proportional to 〓 VM in equation (6), and is vector modulated. You can get the same effect as a vessel. However, in this case too, the synthesizer 4 in FIG. 2 is a difference circuit.
以上説明したように、本発明によれば補償後の
干渉波の電力の変化のみで補助アンテナ受信信号
の振幅、位相の制御情報を得るため、入力信号の
変調方式によらず、位相および振幅を同時に制御
でき、直接的に最適値に制御可能であるため、応
答速度が速という利点がある。 As explained above, according to the present invention, control information for the amplitude and phase of the auxiliary antenna reception signal is obtained only by changes in the power of the interference wave after compensation. Since they can be controlled simultaneously and directly controlled to the optimum value, there is an advantage that the response speed is fast.
第1図は従来の干渉波補償装置の構成図、第2
図は本発明装置の一実施例の構成図、第3図は本
発明に用いる振幅位相制御回路の一例としてのベ
クトル変調器の構成図、第4図はベクトル変調器
の減衰器出力のベクトル図、第5図は干渉波補償
装置の各信号のベクトル図、第6図は本発明に用
いる振幅位相制御回路の他の一例であつてミクサ
を使用した場合の構成図、第7図は本発明に用い
る振幅位相制御回路のさらに他の一例であつて可
変減衰器(または増幅器)および可変移相器を使
用した場合の構成図である。
1……主アンテナ、2……補助アンテナ、3…
…振幅位相制御回路、4……合成器、5……相関
検出器、6a,6b……電圧積算器、7……低周
波発振器、8a,8b……加算器、9……周波数
変換器、10……帯域通過波器、11……信号
増幅器、12……包絡線検出器、13……増幅
器、14……90゜移相器、15a,15b……相
相検出器、16……干渉波補償出力、17……入
力端子、18……信号分岐回路、19a,19
b,19c,19d……固定移相器、20a,2
0b,20c,20d……PIN減衰器、21……
信号合成器、22……制御信号入力端子、23…
…出力端子、25……信号分岐回路、26a,2
6b……ミクサ、27……90゜移相器、29……
信号合成器、32……可変移相器、33……可変
減衰器(または増幅器)、35……信号変換回
路。
Figure 1 is a configuration diagram of a conventional interference wave compensation device;
Fig. 3 is a block diagram of an embodiment of the device of the present invention, Fig. 3 is a block diagram of a vector modulator as an example of an amplitude phase control circuit used in the present invention, and Fig. 4 is a vector diagram of the attenuator output of the vector modulator. , FIG. 5 is a vector diagram of each signal of the interference wave compensator, FIG. 6 is another example of the amplitude phase control circuit used in the present invention, and is a configuration diagram when a mixer is used, and FIG. 7 is a diagram of the configuration of the present invention. FIG. 4 is a configuration diagram of still another example of the amplitude phase control circuit used in the present invention, in which a variable attenuator (or amplifier) and a variable phase shifter are used. 1...Main antenna, 2...Auxiliary antenna, 3...
... Amplitude phase control circuit, 4 ... Synthesizer, 5 ... Correlation detector, 6a, 6b ... Voltage integrator, 7 ... Low frequency oscillator, 8a, 8b ... Adder, 9 ... Frequency converter, 10... Bandpass wave generator, 11... Signal amplifier, 12... Envelope detector, 13... Amplifier, 14... 90° phase shifter, 15a, 15b... Phase phase detector, 16... Interference Wave compensation output, 17...Input terminal, 18...Signal branch circuit, 19a, 19
b, 19c, 19d...Fixed phase shifter, 20a, 2
0b, 20c, 20d...PIN attenuator, 21...
Signal synthesizer, 22... Control signal input terminal, 23...
...Output terminal, 25...Signal branch circuit, 26a, 2
6b...mixer, 27...90° phase shifter, 29...
Signal synthesizer, 32... variable phase shifter, 33... variable attenuator (or amplifier), 35... signal conversion circuit.
Claims (1)
アンテナと、該補助アンテナ出力の振幅および位
相を制御信号により制御する振幅位相制御回路
と、前記制御信号を発生するために電圧積算器な
らびに低周波発振器およびこれらの出力を加算す
る加算器を組合せた回路と、前記振幅位相制御回
路の出力を前記主アンテナによる受信信号を合成
する合成器と、該合成器の出力から干渉波周波数
帯域を取り出す帯域波手段と、該帯域波手段
の出力の電力を検出する包絡線検波器と、該包絡
線検波器の出力と前記低周波発振器の出力とを同
期検波した検波出力を前記電圧積算器に出力する
同期検波器とから構成され、前記補助アンテナに
よる受信信号の振幅および位相を前記制御信号に
より周期的に微小変動させた信号と前記主アンテ
ナによる受信信号の合成出力をとり出し、該合成
出力における干渉波電力変動の位相と前記低周波
発振器の出力位相との差を得て、この位相差によ
る電圧を前記電圧積算器により積算し、さらに該
積算器の出力と前記低周波発振器の出力を前記加
算器により加算して前記制御信号を作成して、前
記干渉波を前記合成器の出力側において補償する
ことを特徴とする干渉波補償装置。1 A main antenna for communication, an auxiliary antenna for receiving interference waves, an amplitude phase control circuit that controls the amplitude and phase of the output of the auxiliary antenna using a control signal, a voltage integrator and a low voltage integrator for generating the control signal. A circuit that combines a frequency oscillator and an adder that adds the outputs of these, a synthesizer that synthesizes the output of the amplitude phase control circuit with a signal received by the main antenna, and extracts an interference wave frequency band from the output of the synthesizer. a band wave means, an envelope detector for detecting the power of the output of the band wave means, and a detection output obtained by synchronously detecting the output of the envelope detector and the output of the low frequency oscillator to the voltage integrator. and a synchronous detector, which extracts a combined output of a signal in which the amplitude and phase of the signal received by the auxiliary antenna are periodically slightly fluctuated by the control signal, and a signal received by the main antenna, and The difference between the phase of the interference wave power fluctuation and the output phase of the low frequency oscillator is obtained, the voltage due to this phase difference is integrated by the voltage integrator, and the output of the integrator and the output of the low frequency oscillator are An interference wave compensating device, characterized in that the control signal is created by adding the signals using an adder, and the interference wave is compensated on the output side of the combiner.
Priority Applications (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3909380A JPS56136039A (en) | 1980-03-28 | 1980-03-28 | Interference compensator |
| DE3110602A DE3110602C2 (en) | 1980-03-28 | 1981-03-18 | Interference compensation system |
| GB8108894A GB2072995B (en) | 1980-03-28 | 1981-03-20 | Interference compensation system |
| CA000373585A CA1167158A (en) | 1980-03-28 | 1981-03-23 | Interference compensation system for radio communication |
| US06/248,464 US4384366A (en) | 1980-03-28 | 1981-03-27 | Interference compensation system |
| FR8106258A FR2479619A1 (en) | 1980-03-28 | 1981-03-27 | INTERFERENCE COMPENSATION SYSTEM |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3909380A JPS56136039A (en) | 1980-03-28 | 1980-03-28 | Interference compensator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS56136039A JPS56136039A (en) | 1981-10-23 |
| JPS6126253B2 true JPS6126253B2 (en) | 1986-06-19 |
Family
ID=12543456
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3909380A Granted JPS56136039A (en) | 1980-03-28 | 1980-03-28 | Interference compensator |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS56136039A (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3224768A1 (en) * | 1982-07-02 | 1984-01-05 | Philips Patentverwaltung Gmbh, 2000 Hamburg | ARRANGEMENT FOR INTERRUPTING SIGNALS |
| EP0289617B1 (en) * | 1986-10-22 | 1994-01-12 | Kokusai Denshin Denwa Co., Ltd | An interference cancellation system |
| JPS63105532A (en) * | 1986-10-22 | 1988-05-10 | Kokusai Denshin Denwa Co Ltd <Kdd> | Interference wave suppressing system |
| JPH0775326B2 (en) * | 1991-12-07 | 1995-08-09 | 防衛庁技術研究本部長 | Receiver |
| KR100548321B1 (en) * | 2003-01-07 | 2006-02-02 | 엘지전자 주식회사 | In-Phase Synthetic Diversity Receiver Apparatus and Method |
-
1980
- 1980-03-28 JP JP3909380A patent/JPS56136039A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS56136039A (en) | 1981-10-23 |
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