JPS6128113B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement of a timer circuit for a resistance welding machine, and by increasing the energization time limit to an integral multiple of the AC power supply period (this is also called synchronization), the biased magnetization of the transformer can be reduced. This aims to prevent this and improve welding quality.

Conventionally, the time limit setting in this type of circuit is generally done by setting a time limit using a digital switch, presetting this value in an up-down counter, and subtracting this preset value by one digit at each AC power supply cycle. It was given a time limit until it reached 0, but it was said that the price was higher than an asynchronous timer because digital switches were expensive, and if the time limit was long, many counters were required. There were flaws.

In contrast, the present invention does not use a digital switch as a time limit setting device, but uses an analog control element such as a variable resistor to form an asynchronous time limit on the power supply, and this is controlled via a simple synchronous control circuit. This is an attempt to obtain a time limit that is synchronized with the AC power cycle very easily and at a low cost.

An example of the configuration of the circuit of the present invention is shown in FIG. 1 below. In the figure, 1 is a time setting device such as a variable resistor, and 2 is an analog switch. The selection of this analog switch 2 is determined by the output state of each bit of a ring counter 3 composed of a shift register and a gate circuit, and the selected value of the time limit setter 1 is transferred to a time limit setting circuit 4 composed of a timer IC or the like. A time limit (digital signal) is formed. 5
is a one-shot circuit that converts this timed digital signal into a clock pulse, and is connected to the clock input of the ring counter 3. A starting pulse is also input to the clock input of the ring counter 3 as shown in the figure.

Now, due to the starting pulse, the bit output Q _S state of the ring counter 3 becomes "H" level as shown in Fig. 2, and the analog switch 2 connected to this Q _S is selected, and as described above, The time limit is set as a digital signal according to the value of the time limit setter 1 at this time (see FIG. 2).

On the other hand, the one-shot circuit 5 generates a short pulse by capturing the point in time when the digital signal shown in FIG. 2 changes from the "H" level to the "L" level (see FIG. 2). This pulse causes the bit output Q _W of the ring counter 3 to go to the "H" level, and the time limits are sequentially advanced in the same manner as shown in FIG. By the way, these time limits, that is, each bit output of the ring counter 3 (Q _S , Q _W , Q _H , Q _R )
Of course, is completely asynchronous with the AC power cycle.

Here, if Q _W is the welding energization time, in order to synchronize this time, a photocoupler is used instead of the transformer 6, which inputs the AC power voltage to the pulse conversion circuit 7 via the transformer 6, as shown in FIG. etc. is also possible. Specifically, the pulse conversion circuit 7 includes:
For example, it can be configured with a half-wave rectifier circuit, a comparator, etc. Therefore, the output signal waveform of the pulse conversion circuit 7 is shown in FIG.

Now, when this signal in Fig. 3 is used as a clock signal and is connected to a D-type flip-flop circuit 8 which uses the Q _W signal as a D (data) input signal, the relationship between its bit output (in Fig. 1) and Q _W will be as shown in FIG. 3, and synchronization will be achieved.

In the above, synchronization of only Q _W was described, but it is also possible to synchronize Q _S , Q _H , and Q _R , and synchronization of two or more time periods is also possible by increasing the number of D-type flip-flop circuits 8. Of course it is possible. According to the power synchronization time limit setting circuit of the present invention as described above, time limit setting and synchronization can be performed extremely easily and at low cost. When the circuit of the present invention was applied to a timer of a resistance welding machine, biased magnetization of the transformer could be completely prevented, and the welding quality was also good.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram of an embodiment of the power synchronization time limit setting circuit according to the present invention, Fig. 2 is a voltage waveform diagram of each part of the time limit setting of the circuit, and Fig. 3 is a voltage waveform diagram of each part of the time limit setting of the same circuit. It is. 1...Time setter, 2...Analog switch,
3...Ring counter, 4...Time limit setting circuit, 5
...One-shot circuit, 6...Transformer, 7...
Power synchronization circuit (pulse conversion circuit), 8...D type flip-flop circuit.

Claims (1)

[Claims] 1. A ring counter that selects an analog switch, a time limit setting circuit that sets a time limit based on the value of a time limit setter connected to the analog switch,
A one-shot circuit that forms a clock signal for the ring counter based on the output signal of the time limit setting circuit, a power synchronization circuit that forms one pulse for each cycle of the AC power supply, and an output signal of the power synchronization circuit. A clock input signal is used as a D (data) input signal, and a bit output signal of the ring counter is used as a D (data) input signal.
A power supply synchronization time setting circuit characterized by consisting of a type flip-flop circuit.