JPS6130736B2 - - Google Patents
Info
- Publication number
- JPS6130736B2 JPS6130736B2 JP53118224A JP11822478A JPS6130736B2 JP S6130736 B2 JPS6130736 B2 JP S6130736B2 JP 53118224 A JP53118224 A JP 53118224A JP 11822478 A JP11822478 A JP 11822478A JP S6130736 B2 JPS6130736 B2 JP S6130736B2
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- conductivity type
- type region
- window
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
Landscapes
- Electrodes Of Semiconductors (AREA)
- Formation Of Insulating Films (AREA)
Description
【発明の詳細な説明】
本発明は半導体装置及びその製造方法にかかり
特にPN接合をガラス絶縁膜にて表面安定化を施
こし、局部的に金属の突出電極を形成せしめた半
導体装置及びその製造方法の改良に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device and a method for manufacturing the same, and in particular to a semiconductor device in which the surface of a PN junction is stabilized with a glass insulating film and metal protruding electrodes are formed locally, and the manufacturing thereof. Concerning improvements in methods.
DHD(Double Heatsink Diode)形のダイオー
ドペレツトは、例えば第1図に示すように構造を
有し、次のような方法で製造される。すなわち、
絶縁膜2の拡散窓3を有するN型シリコン基板1
に於いて、拡散窓3にP形不純物を選択的に熱拡
散してP+形領域4を形成せしめ、N形シリコン
基板1中にP+N接合5を形成する。一方他主面に
はN形不純物を熱拡散してN+形領域6を形成す
る。続いて前記N+形領域6の全面にカソード電
極8を形成すると共に、拡散窓3から露出した
P+形領域4の上に選択的にアノード電極7を形
成する。この後、アノード電極7部に負電位を与
えて銀メツキを選択的に盛上げ突出電極9を形成
し、第1図に示すようなダイオードペレツト10
が得られるのである。 A DHD (Double Heatsink Diode) type diode pellet has a structure as shown in FIG. 1, for example, and is manufactured by the following method. That is,
N-type silicon substrate 1 having a diffusion window 3 of an insulating film 2
In this step, P type impurities are selectively thermally diffused into the diffusion window 3 to form a P + type region 4, and a P + N junction 5 is formed in the N type silicon substrate 1. On the other hand, an N + type region 6 is formed on the other main surface by thermally diffusing N type impurities. Next, a cathode electrode 8 is formed on the entire surface of the N + type region 6, and the cathode electrode 8 is formed on the entire surface of the N + type region 6, and the
An anode electrode 7 is selectively formed on the P + type region 4 . Thereafter, a negative potential is applied to the anode electrode 7 portion to selectively build up the silver plating to form the protruding electrode 9, and form a diode pellet 10 as shown in FIG.
is obtained.
しかし、前記の構造のダイオードペレツト10
をDHD形のガラスケースに熱封止した際、例え
ばスラグリードの材質にジユメツト線(表面にホ
ウ砂を被覆している)を使用している為に、特に
高耐圧品(100V以上)に特性劣化が生じ易い。
この原因として前記ホウ砂中に含まれるナトリウ
ムがガラス封止時に気化し、酸化膜中の正電荷が
増加する為に耐圧が低下すると考えられる。その
結果、組立歩留低下となり、又信頼度が低下する
という欠点があつた。 However, the diode pellet 10 with the above structure
When heat-sealed in a DHD type glass case, for example, because the slug lead material is a composite wire (the surface is coated with borax), it has special characteristics especially for high voltage products (over 100V). Deterioration is likely to occur.
The reason for this is thought to be that the sodium contained in the borax evaporates during glass sealing and the positive charge in the oxide film increases, resulting in a decrease in breakdown voltage. As a result, there were drawbacks such as a decrease in assembly yield and a decrease in reliability.
従つて、本発明の目的は前述の従来のようなダ
イオードペレツト構造によるガラス封止時の特性
劣化を解消し、表面安定化膜としてガラス絶縁膜
を有する半導体装置及びその製造方法を提供する
ことである。 SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a semiconductor device having a glass insulating film as a surface stabilizing film and a method for manufacturing the same, which eliminates the deterioration of characteristics during glass sealing due to the conventional diode pellet structure described above. It is.
本発明の特徴は酸化膜をマスクとしたプレーナ
型のPN主接合を形成した後、PN接合端より内側
に酸化膜を残存せしめ他の酸化膜を除去し、PN
接合端を含むシリコン露出部の全面にガラス絶縁
膜を被覆せしめた後、前記の酸化膜の一部に窓を
開け、該窓部に金属層及び盛上げ電極を形成した
ことである。 The feature of the present invention is that after forming a planar type PN main junction using an oxide film as a mask, the oxide film remains inside the PN junction edge and other oxide films are removed.
After covering the entire surface of the exposed silicon portion including the bonding end with a glass insulating film, a window was opened in a portion of the oxide film, and a metal layer and a raised electrode were formed in the window.
次に図面を参照して本発明による半導体装置及
びその製造方法について詳細に説明する。 Next, a semiconductor device and a method for manufacturing the same according to the present invention will be described in detail with reference to the drawings.
第2図a乃至第2図eに本発明にかかるDHD
形ダイオードペレツトの製造工程を示す。第2図
aに於いて、N形シリコン基板11に熱酸化法に
よつて酸化膜12を形成せしめ、フオトエツチン
グ法により拡散窓13を穿孔せしめ熱拡散法によ
りP形不純物を拡散窓13に選択的に拡散し、
P+形領域14を形成せしめN形シリコン基板1
1中にPN接合15を形成する。 Figures 2a to 2e show the DHD according to the present invention.
This figure shows the manufacturing process of shaped diode pellets. In FIG. 2a, an oxide film 12 is formed on an N-type silicon substrate 11 by a thermal oxidation method, a diffusion window 13 is bored by a photoetching method, and a P-type impurity is selected in the diffusion window 13 by a thermal diffusion method. spread,
N type silicon substrate 1 forming P + type region 14
A PN junction 15 is formed in 1.
次に第2図bに於いて、前記半導体基板の一主
面にフオトエツチング法によりP+形領域14の
一部のみに酸化膜12を残存せしめ、PN接合端
16を露出する如くに他の酸化膜12をエツチン
グ除去する。 Next, in FIG. 2b, an oxide film 12 is left on only a part of the P + type region 14 on one main surface of the semiconductor substrate by photoetching, and another layer is formed so as to expose the PN junction end 16. The oxide film 12 is removed by etching.
第2図cに於いて、上記半導体基板のシリコン
の露出部表面に硼硅酸を主成分とするガラス粒子
を例えば電気泳動法によつて選択的に電着せしめ
ガラス粒子層を形成する。次に前記半導体基板を
500〜800℃で約1〜2時間加熱焼成し、前記ガラ
ス粒子層を熔融しガラス絶縁膜17を約10〜20ミ
クロンの厚さに形成せしめ、前記PN接合端16
の表面安定化処理を施こす。 In FIG. 2c, glass particles containing borosilicate as a main component are selectively electrodeposited on the surface of the exposed silicon portion of the semiconductor substrate by, for example, electrophoresis to form a glass particle layer. Next, the semiconductor substrate is
The glass particle layer is melted by heating and baking at 500 to 800°C for about 1 to 2 hours to form a glass insulating film 17 with a thickness of about 10 to 20 microns.
Apply surface stabilization treatment.
次に第2図dに於いて、前記半導体基板の一主
面上にフオトレジスト膜を被覆せしめ、フオトエ
ツチング法により前記P+形領域14上の酸化膜
12の一部に窓18を穿孔せしめると同時に他面
の酸化膜12をエツチングし除去する。上の酸化
膜12は次の工程のオーミツク形成にとつてパタ
ーン精度を向上さすのに大きな役割を果すと共
に、ガラス絶縁膜17のサイドエツチ防止と金属
層の密着強度の向上にとつて非常に重要である。 Next, in FIG. 2d, a photoresist film is coated on one main surface of the semiconductor substrate, and a window 18 is formed in a part of the oxide film 12 on the P + type region 14 by photoetching. At the same time, the oxide film 12 on the other side is etched and removed. The upper oxide film 12 plays a major role in improving pattern accuracy in the next process of ohmic formation, and is also very important in preventing side etching of the glass insulating film 17 and improving the adhesion strength of the metal layer. be.
次に第2図eに於いて、前記半導体基板の一主
面の窓18と他面に一般的な蒸着法によつて金属
層19,19′を形成せしめる。次に、該半導体
基板の一主面の窓18上の金属層19部に電気メ
ツキ法により負電位を与えて、例えば銀メツキを
選択的に盛上げ突出電極20を例えば60〜80ミク
ロンの高さに形成し、第2図dに示すようなダイ
オードペレツト21が得られるのである。 Next, in FIG. 2e, metal layers 19 and 19' are formed on the window 18 on one main surface of the semiconductor substrate and on the other surface by a general vapor deposition method. Next, a negative potential is applied to a portion of the metal layer 19 on the window 18 on one principal surface of the semiconductor substrate by electroplating to selectively build up silver plating, for example, to form the protruding electrode 20 to a height of, for example, 60 to 80 microns. A diode pellet 21 as shown in FIG. 2d is obtained.
第3図は本発明の一実施例によつて得られたダ
イオードペレツト(半導体装置)21をDHD型
電極構造のガラススリーブに封止した実装例を示
す。ダイオードペレツト21はガラススリーブ2
2内に封入され、同軸状に配置された金属端子2
3及び24によつて加圧接触されている。 FIG. 3 shows a mounting example in which a diode pellet (semiconductor device) 21 obtained according to an embodiment of the present invention is sealed in a glass sleeve having a DHD type electrode structure. Diode pellet 21 is attached to glass sleeve 2
Metal terminal 2 enclosed within 2 and arranged coaxially
3 and 24 are in pressure contact.
金属端子23及び24にガラススリーブ22の
内壁を融着せしめることによりダイオードペレツ
ト21を気密封止することが出来る。 By fusing the inner wall of the glass sleeve 22 to the metal terminals 23 and 24, the diode pellet 21 can be hermetically sealed.
以上のように本発明は、半導体基板一主面上の
酸化膜に複数個の拡散窓を設け、この窓から基板
中に基板と逆導電形の不純物を拡散して多数のプ
レーナ形PN接合を形成し、P+形領域の一部のみ
酸化膜を残存せしめ、PN接合端を露出する如く
に他の酸化膜を除去しシリコン表面を露出する工
程と、前記一主面のPN接合端を含むシリコン露
出部にガラス絶縁膜を被着せしめる工程と、前記
一主面上のP+形領域上の酸化膜の一部に窓を設
け、該窓と他面の全面に金属層を形成する工程
と、前記窓部の金属層上に選択的に突出電極を形
成する工程とを含むものであるから、ガラス絶縁
膜が厚く表面安定化膜として安定しており、酸化
膜のようにシリコンとの界面や酸化膜中に存在す
る正電荷の移動、或は酸化膜の不完全さ等がない
為、又外部からの汚染に対して安定している為高
耐圧発生に優利である。よつて組立歩留の向上及
び高信頼度の半導体装置が得られる。 As described above, the present invention provides a plurality of diffusion windows in the oxide film on one main surface of a semiconductor substrate, and diffuses impurities of the opposite conductivity type to the substrate from these windows into the substrate to form a large number of planar PN junctions. forming a silicon surface, leaving only a part of the oxide film in the P + type region, and removing the other oxide film to expose the silicon surface so as to expose the PN junction end, and the PN junction end on the one main surface. A step of depositing a glass insulating film on the silicon exposed portion, and a step of providing a window in a part of the oxide film on the P + type region on the one main surface, and forming a metal layer on the window and the entire surface of the other surface. and a step of selectively forming protruding electrodes on the metal layer of the window, the glass insulating film is thick and stable as a surface stabilizing film, and does not form an interface with silicon like an oxide film. Because there is no movement of positive charges existing in the oxide film or imperfections in the oxide film, and because it is stable against external contamination, it is advantageous in generating high breakdown voltages. As a result, the assembly yield can be improved and a highly reliable semiconductor device can be obtained.
第1図は従来技術による半導体装置の断面図で
ある。第2図a乃至第2図eは本発明の一実施例
を工程順に示した断面図である。第3図は本発明
一実施例の半導体装置をダブルヒートシンクに実
装した場合を示す断面である。
尚、図中に於いて、1,11……N形シリコン
基板、2,12……酸化膜、3,13……拡散
窓、4,14……P+形領域、5,15……PN接
合、16……PN接合端、17……ガラス絶縁
膜、18……窓、19,19′……金属層、20
……突出電極、21……ダイオードペレツト、2
2……ガラススリーブ、23,24……金属端子
である。
FIG. 1 is a sectional view of a semiconductor device according to the prior art. FIGS. 2a to 2e are cross-sectional views showing an embodiment of the present invention in the order of steps. FIG. 3 is a cross-sectional view showing a case where a semiconductor device according to an embodiment of the present invention is mounted on a double heat sink. In the figure, 1, 11...N type silicon substrate, 2, 12... Oxide film, 3, 13... Diffusion window, 4, 14...P + type region, 5, 15... PN Junction, 16... PN junction end, 17... Glass insulating film, 18... Window, 19, 19'... Metal layer, 20
... Protruding electrode, 21 ... Diode pellet, 2
2...Glass sleeve, 23, 24...Metal terminals.
Claims (1)
逆導電型領域と、該半導体基板と該逆導電型領域
とで構成されるPN接合の前記一主面に露出せる
端部を被覆するガラス絶縁膜と、前記逆導電型領
域上に設けられた絶縁膜と、該絶縁膜に設けられ
た前記一主面に達する穴部と、該穴部に設けられ
た金属膜と、該金属膜上の突出電極とを有したこ
とを特徴とする半導体装置。 2 一導電型の半導体基板一主面より選択的に逆
導電型領域を形成する工程と、前記逆導電型領域
上の一部に絶縁膜を残存せしめ、他の絶縁膜を除
去せしめる工程と、前記絶縁膜が除去された前記
一主面上をガラス保護膜にて被覆する工程と、前
記絶縁膜の一部に窓を穿孔する工程と、前記窓に
金属層を被着し、該金属層に突出電極層を形成す
る工程とを含むことを特徴とする半導体装置の製
造方法。[Claims] 1. An opposite conductivity type region provided on one main surface of a semiconductor substrate of one conductivity type, and exposed on the one main surface of a PN junction formed of the semiconductor substrate and the opposite conductivity type region. a glass insulating film covering the end portion of the insulating film, an insulating film provided on the opposite conductivity type region, a hole provided in the insulating film reaching the one principal surface, and a metal provided in the hole. A semiconductor device comprising a film and a protruding electrode on the metal film. 2. A step of selectively forming an opposite conductivity type region from one main surface of a semiconductor substrate of one conductivity type, and a step of leaving an insulating film on a part of the opposite conductivity type region and removing the other insulating film, a step of covering the one principal surface from which the insulating film has been removed with a glass protective film; a step of drilling a window in a part of the insulating film; and a step of depositing a metal layer on the window; 1. A method of manufacturing a semiconductor device, comprising: forming a protruding electrode layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11822478A JPS5544756A (en) | 1978-09-25 | 1978-09-25 | Semiconductor and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11822478A JPS5544756A (en) | 1978-09-25 | 1978-09-25 | Semiconductor and manufacture thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5544756A JPS5544756A (en) | 1980-03-29 |
| JPS6130736B2 true JPS6130736B2 (en) | 1986-07-15 |
Family
ID=14731286
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11822478A Granted JPS5544756A (en) | 1978-09-25 | 1978-09-25 | Semiconductor and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5544756A (en) |
-
1978
- 1978-09-25 JP JP11822478A patent/JPS5544756A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5544756A (en) | 1980-03-29 |
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