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JPS6131426B2 - - Google Patents
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JPS6131426B2 - - Google Patents

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Publication number
JPS6131426B2
JPS6131426B2 JP5492681A JP5492681A JPS6131426B2 JP S6131426 B2 JPS6131426 B2 JP S6131426B2 JP 5492681 A JP5492681 A JP 5492681A JP 5492681 A JP5492681 A JP 5492681A JP S6131426 B2 JPS6131426 B2 JP S6131426B2
Authority
JP
Japan
Prior art keywords
output signal
demodulator
signal
level
pass filter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP5492681A
Other languages
Japanese (ja)
Other versions
JPS56157869A (en
Inventor
Korona Kabotsuto Richaado
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tektronix Inc
Original Assignee
Tektronix Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tektronix Inc filed Critical Tektronix Inc
Publication of JPS56157869A publication Critical patent/JPS56157869A/en
Publication of JPS6131426B2 publication Critical patent/JPS6131426B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R23/00Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
    • G01R23/16Spectrum analysis; Fourier analysis
    • G01R23/20Measurement of non-linear distortion

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Electric Properties And Detecting Electric Faults (AREA)
  • Measurement Of Resistance Or Impedance (AREA)
  • Amplifiers (AREA)
  • Monitoring And Testing Of Transmission In General (AREA)

Description

【発明の詳細な説明】 本発明は、相互変調歪分析器(以下IDAと略
す)、特に変化する入力レベルに自動的に調整さ
れる相互変調歪の測定器に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an intermodulation distortion analyzer (hereinafter abbreviated as IDA), and more particularly to an intermodulation distortion measuring instrument that is automatically adjusted to changing input levels.

標準化した相互変調歪測定(SMPTE―IM)方
法により、オーデイオ装置の歪特性を効果的に測
定できる。相互変調とは、非直線素子を介して2
以上の周波数を伝送するとき、これら2種以上の
基本波及び高調波周波数の和及び差に応じた周波
数がこの非線形回路素子から発生することであ
る。このように、2種の周波数が可聴周波数装置
の入力端に印加されると、これら2種の基本波ば
かりでなく、一般に基本波と高調波関係にない和
及び差の周波数も出力端に現われる。
The standardized intermodulation distortion measurement (SMPTE-IM) method can effectively measure the distortion characteristics of audio equipment. Intermodulation is the intermodulation of two
When transmitting the above frequencies, frequencies corresponding to the sum and difference of these two or more types of fundamental wave and harmonic frequencies are generated from this nonlinear circuit element. Thus, when two types of frequencies are applied to the input end of an audio frequency device, not only these two types of fundamental waves but also sum and difference frequencies, which generally have no harmonic relationship with the fundamental wave, appear at the output end. .

一般的IDAは、信号発生部及び分析器の2つの
基本部分より成る。信号発生部は、高及び低周波
の2種の信号を発生し、これらの周波数を所定の
割合で混合して被試験装置(以下DUTという)
の入力端に印加する。分析部は、DUTの出力端
に接続され、DUTが発生する相互変調歪を百分
率で測定する。
A typical IDA consists of two basic parts: a signal generator and an analyzer. The signal generator generates two types of signals, high and low frequency, and mixes these frequencies at a predetermined ratio to output the device under test (hereinafter referred to as DUT).
is applied to the input terminal of The analyzer is connected to the output end of the DUT and measures the intermodulation distortion generated by the DUT in percentage.

信号発生部が供給する2種の信号周波数は、振
幅比を普通4:1に設定し、低周波数を高周波数
より12dB高い振幅とする。上記の比は使用に応
じて可変でき、例えば1:1の比であつてもよ
い。発生する低周波数は、普通40〜100Hzであり
中でも60Hzが一般的である。一方、高周波数は、
4000〜100000Hzの任意の値でよいが代表的には
7000Hzである。
The amplitude ratio of the two signal frequencies supplied by the signal generator is usually set to 4:1, with the lower frequency having an amplitude 12 dB higher than the higher frequency. The above ratio can be varied depending on the use and may be, for example, a 1:1 ratio. The low frequencies generated are usually between 40 and 100 Hz, with 60 Hz being the most common. On the other hand, high frequencies
Any value between 4000 and 100000Hz is acceptable, but typically
It is 7000Hz.

しかし、被試験増幅器の減衰度又は利得は、周
波数の関数であるから上記の比を更に変えること
になる。したがつて、分析部の入力レベルを時々
手動で調整しなければならないという欠点があ
る。
However, the attenuation or gain of the amplifier under test, which is a function of frequency, will further change this ratio. Therefore, there is a drawback that the input level of the analysis section must be manually adjusted from time to time.

したがつて、本発明の目的は、操作が容易な相
互変調歪分析器を提供することである。
It is therefore an object of the present invention to provide an intermodulation distortion analyzer that is easy to operate.

本発明の他の目的は、相互変調歪分析器の自動
レベル制御手段を提供することである。
Another object of the invention is to provide automatic level control means for an intermodulation distortion analyzer.

本発明のその他の目的及び効果は、添付図を参
照して行なう以下の説明より明らかとなるであろ
う。
Other objects and effects of the present invention will become apparent from the following description with reference to the accompanying drawings.

本発明のIDAは、SMPTE―IM法による相互変
調歪の自動測定を可能にした装置である。
SMPTE―IM法を用いて歪測定をするとき、低周
波数信号(60Hz)及び高周波数信号(7000Hz)を
所定比で混合してDUTに印加する。高周波数信
号の近くに生じる低周波数信号の側波帯が歪を表
わす。高周波数信号に対する低周波数信号の標準
振幅比は4:1であるが、1:1の比も更に厳密
な試験にしばしば使用される。DUTの減衰度又
は利得は周波数の関数であるため、その比を変え
てしまう。したがつて、本発明のIDAは、入力信
号レベルの変化に対して自動的に分析部を調整す
る。
The IDA of the present invention is a device that enables automatic measurement of intermodulation distortion using the SMPTE-IM method.
When measuring distortion using the SMPTE-IM method, a low frequency signal (60Hz) and a high frequency signal (7000Hz) are mixed at a predetermined ratio and applied to the DUT. Sidebands of the low frequency signal that occur near the high frequency signal represent distortion. The standard amplitude ratio of low frequency signals to high frequency signals is 4:1, although 1:1 ratios are often used for more rigorous testing. Since the DUT's attenuation or gain is a function of frequency, it changes the ratio. Therefore, the IDA of the present invention automatically adjusts the analyzer to changes in input signal level.

上記の自動調整は、復調信号の直流レベルと等
価な搬送波レベルを検出し、信号処理段の初めに
電圧制御増幅器を用いて自動レベル制御ループを
形成することによつて達成される。発生した歪出
力は、SMPTE―IM法で用いられる高周波数信号
のレベルと自動的に比較される。
The automatic adjustment described above is achieved by detecting a carrier level equivalent to the DC level of the demodulated signal and forming an automatic level control loop using a voltage controlled amplifier at the beginning of the signal processing stage. The generated distortion output is automatically compared to the level of the high frequency signal used in the SMPTE-IM method.

IDAは当業者には周知であるが、本発明の理解
を助けるために、その基本分析動作を簡単に説明
する。第1図は、代表的なIDAを示す。第1a図
は、IDAの相互変調信号発生部10及び分析部3
0の2部分を示す。DUT20は、増幅器として
図示しているが実際には任意の可聴周波数装置又
は回路でもよい。信号発生部10は、2つの周波
数例えば60Hz及び7000Hzの信号を発生し、これら
の信号を4:1の比で混合し、信号路15を介し
てDUT20に印加する。DUT20からの歪信号
は、信号路25を介して分析部30に印加され
る。分析部30は、歪信号を分析して歪率(%)
を決定する。
Although IDA is well known to those skilled in the art, its basic analysis operations will be briefly described to aid in understanding the present invention. Figure 1 shows a typical IDA. FIG. 1a shows the intermodulation signal generator 10 and analyzer 3 of the IDA.
Two parts of 0 are shown. Although shown as an amplifier, DUT 20 may actually be any audio frequency device or circuit. The signal generator 10 generates signals of two frequencies, for example, 60 Hz and 7000 Hz, mixes these signals in a ratio of 4:1, and applies the mixed signal to the DUT 20 via a signal path 15. The distortion signal from the DUT 20 is applied to the analysis section 30 via the signal path 25. The analysis unit 30 analyzes the distortion signal and determines the distortion rate (%).
Determine.

第1b図は、第1a図に示す従来のIDAの分析
部30の更に詳細なブロツク図である。DUT2
0の歪出力は、信号路25を介して高域通過フイ
ルタ31に印加される。フイルタ31の出力端は
増幅器32に接続され、増幅器32の出力端は復
調器33に接続される。復調器33の出力は、直
流阻止コンデンサ34を介して低域通過フイルタ
35に印加された後、デジタル電圧計(以下
DVMという)36に印加される。復調器33
は、従来回路例えば全波もしくは半波整流器又は
同期整流器のようなものでよい。
FIG. 1b is a more detailed block diagram of the analysis section 30 of the conventional IDA shown in FIG. 1a. DUT2
A distortion output of 0 is applied via signal path 25 to high pass filter 31 . The output end of the filter 31 is connected to an amplifier 32, and the output end of the amplifier 32 is connected to a demodulator 33. The output of the demodulator 33 is applied to a low-pass filter 35 via a DC blocking capacitor 34, and then a digital voltmeter (hereinafter referred to as
DVM) 36. Demodulator 33
may be a conventional circuit such as a full-wave or half-wave rectifier or a synchronous rectifier.

動作を説明すると、DUT20の歪出力は信号
路25を介して分析部の入力端に印加される。分
析部の入力端には高域通過フイルタ31が設けら
れ、このフイルタは60Hz成分及びその高調波成分
を除去して7000Hzの歪成分のみを通過させ、通過
した信号は増幅器32によつて増幅される。
In operation, the distorted output of the DUT 20 is applied to the input end of the analysis section via the signal path 25. A high-pass filter 31 is provided at the input end of the analysis section, and this filter removes the 60 Hz component and its harmonic components and passes only the 7000 Hz distortion component.The passed signal is amplified by the amplifier 32. Ru.

増幅器32の出力は、次に復調器33例えば上
記の如く全波整流器に印加される。全波整流作用
により、高周波成分は7000Hzから14000Hzにな
る。
The output of amplifier 32 is then applied to a demodulator 33, such as a full wave rectifier as described above. Due to full-wave rectification, the high frequency component changes from 7000Hz to 14000Hz.

14000Hz成分は低域通過フイルタ35を通過す
る際に除去され、60Hz成分により生じた復調包絡
線のみが通過する。フイルタ35の出力は、リツ
プル電圧又は脈動直流電圧信号である。この信号
に一定直流レベルがあつても、直流阻止コンデン
サ34により除去される。DVM36は、リツプ
ル電圧の振幅を測定して表示する。DVM36
は、歪率又はdBを直読しうるように校正でき
る。
The 14000 Hz component is removed when passing through the low-pass filter 35, and only the demodulation envelope generated by the 60 Hz component passes. The output of filter 35 is a ripple voltage or pulsating DC voltage signal. Even if this signal has a constant DC level, it is removed by the DC blocking capacitor 34. DVM 36 measures and displays the amplitude of the ripple voltage. DVM36
can be calibrated so that the distortion factor or dB can be read directly.

更に、分析部30の動作を説明するために、次
の条件を仮定する。すなわち、DUT20として
無歪増幅器を使用し、高及び低周波数並びに振幅
比は上述の例と同様であり、DUT20の出力は
無歪であつて信号発生部10の出力とほぼ同じで
ある、とする。
Furthermore, in order to explain the operation of the analysis section 30, the following conditions are assumed. That is, assume that a distortion-free amplifier is used as the DUT 20, the high and low frequencies and amplitude ratios are the same as in the above example, and the output of the DUT 20 is distortion-free and approximately the same as the output of the signal generator 10. .

無歪信号は、高域通過フイルタ31を通過して
60Hz成分を除去の後、増幅器32及び復調器33
に印加される。DUT20は上記の仮定により歪
を発生しないので、7000Hz成分は60Hz成分により
変調されない。したがつて、復調器の出力は、尖
頭振幅の等しい14000Hzの信号となる。
The undistorted signal passes through a high-pass filter 31.
After removing the 60Hz component, the amplifier 32 and demodulator 33
is applied to Since the DUT 20 does not generate distortion based on the above assumption, the 7000Hz component is not modulated by the 60Hz component. Therefore, the output of the demodulator is a 14000 Hz signal with equal peak amplitude.

直流阻止コンデンサ34は、信号の直流成分を
除去し、後に低域通過フイルタ35により除去さ
れる高周波数成分のみを通過させる。よつて、フ
イルタ35からの出力は無く、DVM36には歪
は表示されない。
The DC blocking capacitor 34 removes the DC component of the signal and passes only the high frequency component which is later removed by the low pass filter 35. Therefore, there is no output from the filter 35, and no distortion is displayed on the DVM 36.

上述のIDAを使用する代表的可聴周波数装置の
相互変調歪を測定する手順は、次のとおりであ
る。相互変調信号発生部の出力端をDUTの入
力端に接続する。DUTの出力端を相互変調分
析部の入力端に接続する。信号発生部を所望の
周波数の組合わせに設定する。組合わせ信号を
所望の出力レベルを生じる如きレベルにして
DUTの入力端に印加する。分析部の利得を手
動で調整して適当な搬送電流レベルとする。
DVMにより相互変調歪率を測定して表示を読
む。
The procedure for measuring intermodulation distortion of a typical audio frequency device using the IDA described above is as follows. Connect the output end of the intermodulation signal generator to the input end of the DUT. Connect the output end of the DUT to the input end of the intermodulation analysis section. Set the signal generator to the desired frequency combination. Adjust the combined signal to a level that produces the desired output level.
Applied to the input end of the DUT. Manually adjust the analyzer gain to obtain the appropriate carrier current level.
Measure the intermodulation distortion rate using DVM and read the display.

本発明のIDAは、上記の段階における手動利
得調整操作を除去することにより従来の装置を改
良したものである。本発明の好適な実施例を第2
図のブロツク図に示す。
The IDA of the present invention improves on prior devices by eliminating manual gain adjustment operations at the above steps. A second preferred embodiment of the invention
This is shown in the block diagram in Figure.

第2図を第1図と比較すると、増幅器32は電
圧制御増幅器32′に置換されている。この増幅
器32′は、マグローヒル・ブツク・カンパニー
が1974年に出版したジヨン・マーカスによる「ガ
イドブツク・オブ・エレクトロニツク・サーキツ
ト」に記載された従来の電圧制御増幅器でよい。
更に、復調器33の出力及び基準電圧VREFの差
を積分して制御電圧42を発生する積分器40が
付加される。VREFは、信号発生部10の出力信
号における高周波数成分のレベルを表わす。復調
器33の出力の直流レベルは、搬送波すなわち高
周波数成分レベルに等しい。
Comparing FIG. 2 with FIG. 1, amplifier 32 has been replaced by voltage controlled amplifier 32'. The amplifier 32' may be a conventional voltage controlled amplifier as described in the "Guidebook of Electronic Circuits" by John Marcus, published by McGraw-Hill Book Company in 1974.
Furthermore, an integrator 40 is added that integrates the difference between the output of the demodulator 33 and the reference voltage V REF to generate a control voltage 42 . V REF represents the level of high frequency components in the output signal of the signal generating section 10. The DC level of the output of the demodulator 33 is equal to the carrier wave, that is, the high frequency component level.

本発明のIDAの動作は、上述の動作と同様であ
るので、改良点のみについて述べる。上述のよう
に試験信号の高周波数及び低周波数成分のレベル
比は種々であるが、本発明は、その比を正確に保
つように搬送波レベルを常時監視して信号発生部
からの信号の高周波数成分のレベルと比較する。
これれらの信号の差は、増幅器32′の利得を増
加又は減少させるため、積分器40により積分さ
れ増幅器32′の利得調整部に制御電圧42とし
て印加される。比較された2信号が等しければ、
制御電圧は0であつて増幅器32′の利得は変わ
らない。
Since the operation of the IDA of the present invention is similar to that described above, only the improvements will be described. As mentioned above, the level ratio of the high frequency and low frequency components of the test signal varies, but the present invention constantly monitors the carrier wave level so as to maintain the ratio accurately, and adjusts the high frequency of the signal from the signal generator. Compare with ingredient levels.
The difference between these signals is integrated by an integrator 40 and applied as a control voltage 42 to the gain adjustment section of the amplifier 32' to increase or decrease the gain of the amplifier 32'. If the two compared signals are equal,
The control voltage is zero and the gain of amplifier 32' remains unchanged.

以上説明したとおり、本発明は、電圧制御増幅
器32′と復調器33と復調器33の出力信号及
び基準信号を印加しその出力信号により増幅器3
2′の利得を制御する積分器40とでサーボルー
プを形成しているので、復調器33のの出力端の
搬送波レベルは自動的に一定に維持され、搬送波
レベルを手動でいちいち調整する必要がなく、常
に正確な相互変調歪率を試験用高周波数信号レベ
ルに対する比率(%)で表示することができる。
As explained above, the present invention applies the output signals and reference signals of the voltage controlled amplifier 32', the demodulator 33, and the demodulator 33, and uses the output signals to
Since a servo loop is formed with the integrator 40 that controls the gain of the demodulator 33, the carrier wave level at the output end of the demodulator 33 is automatically maintained constant, and there is no need to manually adjust the carrier wave level one by one. The intermodulation distortion factor can always be displayed accurately as a ratio (%) to the test high frequency signal level.

なお、以上は本発明の好適な実施例について述
べたが、本発明の要旨を逸脱することなく回路、
タイミング等に種々の変更、変形をしうること
は、当業者には明らかであろう。したがつて、本
発明は、そのような種々の変更・変形をも含むも
のである。
Although preferred embodiments of the present invention have been described above, circuits,
It will be obvious to those skilled in the art that various changes and modifications can be made to timing and the like. Therefore, the present invention includes such various changes and modifications.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の従来例を示すブロツク図、第
2図は本発明の好適な実施例を示すブロツク図で
ある。 20……被試験装置、31……高域通過フイル
タ、32′……可変利得増幅器、33……復調
器、34……コンデンサ、35……低域通過フイ
ルタ、36……表示手段、VREF……基準電圧、
40……積分器。
FIG. 1 is a block diagram showing a conventional example of the present invention, and FIG. 2 is a block diagram showing a preferred embodiment of the present invention. 20...Device under test, 31...High pass filter, 32'...Variable gain amplifier, 33...Demodulator, 34...Capacitor, 35...Low pass filter, 36...Display means, V REF ...Reference voltage,
40... Integrator.

Claims (1)

【特許請求の範囲】[Claims] 1 所定の振幅比関係にある高及び低周波数信号
を被試験装置に供給して得た出力信号が供給され
る高域通過フイルタと、該高域通過フイルタの出
力信号が供給される可変利得増幅器と、該可変利
得増幅器の出力信号が供給される復調器と、該復
調器の出力信号がコンデンサを介して供給される
低域通過フイルタと、上記復調器の出力信号及び
上記高周波数信号の電圧レベルに等しい基準電圧
の差電圧を積分する積分器と、該低域通過フイル
タの出力信号レベルを表示する表示手段とを具
え、上記積分器の出力信号により上記可変利得増
幅器の利得を制御し、上記復調器の出力信号の直
流レベルを上記基準電圧にほぼ等しくすることを
特徴とする相互変調歪分析器。
1. A high-pass filter to which an output signal obtained by supplying high- and low-frequency signals having a predetermined amplitude ratio relationship to the device under test is supplied, and a variable gain amplifier to which the output signal of the high-pass filter is supplied. a demodulator to which the output signal of the variable gain amplifier is supplied; a low pass filter to which the output signal of the demodulator is supplied via a capacitor; and a voltage of the output signal of the demodulator and the high frequency signal. an integrator for integrating a voltage difference between reference voltages equal to the level, and display means for displaying the output signal level of the low-pass filter, and controlling the gain of the variable gain amplifier by the output signal of the integrator; An intermodulation distortion analyzer characterized in that the DC level of the output signal of the demodulator is made approximately equal to the reference voltage.
JP5492681A 1980-04-11 1981-04-10 Analyzer for mutually modulated distortion Granted JPS56157869A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US13994080A 1980-04-11 1980-04-11

Publications (2)

Publication Number Publication Date
JPS56157869A JPS56157869A (en) 1981-12-05
JPS6131426B2 true JPS6131426B2 (en) 1986-07-19

Family

ID=22488995

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5492681A Granted JPS56157869A (en) 1980-04-11 1981-04-10 Analyzer for mutually modulated distortion

Country Status (6)

Country Link
JP (1) JPS56157869A (en)
CA (1) CA1164066A (en)
DE (1) DE3114244C2 (en)
FR (1) FR2480438A1 (en)
GB (1) GB2073895B (en)
NL (1) NL8101783A (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03111595U (en) * 1990-03-02 1991-11-14

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Publication number Priority date Publication date Assignee Title
DE19813703A1 (en) * 1997-07-28 1999-02-04 Rohde & Schwarz A measuring method and apparatus for measuring the distortion of a high frequency power amplifier and equalization method and equalizer for automatically equalizing a high frequency power amplifier
US6239657B1 (en) 1998-03-27 2001-05-29 Rohde & Schwarz Gmbh & Co. Kg Method and device for measuring the distortion of a high-frequency power amplifier and method and means for automatically equalizing a high-frequency power amplifier
GB2353365A (en) * 1999-06-24 2001-02-21 Mitel Semiconductor Ltd Cross-channel interference
KR100318901B1 (en) * 2000-03-22 2001-12-29 윤종용 Apparatus for controlling inter modulation distortion(imd) in cdma rf terminal equipment

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US3176238A (en) * 1962-12-21 1965-03-30 Collins Radio Co Voltage equalizing circuit for constant gain during switching of agc circuit
GB2004428B (en) * 1977-09-16 1982-03-31 Plessey Co Ltd Receiver circuit arrangement

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03111595U (en) * 1990-03-02 1991-11-14

Also Published As

Publication number Publication date
FR2480438B1 (en) 1984-02-10
DE3114244A1 (en) 1982-04-29
NL8101783A (en) 1981-11-02
GB2073895A (en) 1981-10-21
CA1164066A (en) 1984-03-20
FR2480438A1 (en) 1981-10-16
GB2073895B (en) 1983-11-02
DE3114244C2 (en) 1985-11-14
JPS56157869A (en) 1981-12-05

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