JPS6133498B2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention displays the number of programs in which a character signal exists using a color bar or the like when receiving a character signal that is superimposed over 1H or several H within a vertical blanking period. Accordingly, it is an object of the present invention to provide a device in which the reception status when selecting a program can be understood at a glance.

EMBODIMENT OF THE INVENTION Hereinafter, the present invention will be described in detail with reference to the drawings showing one embodiment thereof.

First of all, Fig. 1 is a block diagram showing the general configuration of the entire system. 1 is a video detection circuit of a television receiver, and 2 is a circuit for transmitting multiplexed information such as characters and graphics.
A video signal is obtained in which a value information signal is superimposed on a horizontal scanning period during a vertical retrace period. 2, since the transmitted binary information signal is subject to waveform distortion due to the frequency characteristics of the transmission system and various distortions, the received signal is sliced at an appropriate level, etc.
This is a waveform shaping circuit that shapes a predetermined binary signal waveform as shown in the figure. 3 is a sync separation circuit, 4 is a color subcarrier (SC) regeneration circuit, and 5 is a sync separation circuit 3.
vertical sync pulse and horizontal sync pulse from 2
To extract the signal during the period when the value information signal is superimposed (for example, the 20th H during the vertical retrace period)
A circuit that generates a 1H width gate pulse, 6 is sc
Various clock pulses such as a sampling clock for sampling the received binary information signal based on the color subcarrier etc. from the reproduction circuit 4 and a memory clock for writing and reading the received signal into the main memory. This is a circuit that generates

7 is a sampling circuit, and 2 is a waveform shaping circuit 2.
The received binary information signal, which has been shaped into a value waveform, is sampled using a sampling clock, and it is serial-parallel converted and output as an 8-bit parallel output. Reference numeral 8 denotes a detection circuit that detects a framing code (FC) signal of a specific code in the binary information signal from the output signal of the sampling circuit 7, and uses the detection output to control the clock generation circuit 6 to generate a clock. control the phase of That is, in the clock generation circuit 6, the FC
During the period until the signal is detected, the clock run in (CRI) signal placed at the beginning of the received binary information signal is used to generate a sampling clock synchronized with it, and the FC signal is detected. After that, the color subcarrier from the sc reproduction circuit 4 is multiplied and divided, and the frequency division phase is controlled by the FC detection output to generate 8/5 fsc synchronized with the color subcarrier and the FC detection output. Generates clocks for reception and main memory.

Reference numeral 9 denotes a control circuit for controlling writing and reading of pattern data in the binary information signal into the main memory 10, and this part is realized using a processing calculation means such as a microcomputer.

This device is equipped with a digital page memory having a storage capacity of one page as the main memory for storing pattern data in the received binary signal and displaying images of characters and figures as multiplexed information. 13 is a CRT for displaying information images. Here, as the multiplexed information to be received and displayed, if the image of that one page is horizontally
Assuming that character information or graphic information is composed of 248-bit picture elements and 204 horizontal scanning lines in the vertical direction, the main memory 10 has a storage capacity of at least 50,592 (=248 x 204) bits or more. It has the following. Here, since the sampling circuit 7 is of an 8-bit parallel output type, eight 8K-bit memories are used in parallel as the main memory 10, and when reading data, parallel to serial conversion is performed before outputting. It is better to make it .

On the other hand, numeral 12 is a program selection circuit for specifying what you wish to receive from the types of multiplexed broadcasts (hereinafter referred to as programs), such as multiple types of text information and graphic information that are multiplexed and transmitted on television broadcast signals. ,
When a program is selected by a viewer, an 8-bit code signal representing the program is generated, and this is applied to the W/R control circuit 9, which controls only the pattern data of the binary information signal of the selected program. memory 1
This is a command to read and display from 0.

Furthermore, 11 is a reception status display circuit that generates a video signal for displaying the reception status of the multiplexed information signal being transmitted, which is a feature of the present invention;
14 is a control circuit for those displays.

FIG. 2 shows an aspect of the binary information signal multiplexed into the television signal received in the present invention. As shown in A, this binary information signal is superimposed on any horizontal scanning period during the vertical retrace period of the television signal, here the 20th H, and depending on the signal content, B ,C,D
There are three types such as. B is PCP (Page
This control packet signal is sent to the first field of each multiplexed information prior to transmitting the binary information signal for one page. C is CCP
(Color Control Packet) signal, which is sent to the first field prior to transmitting a binary information signal for one line of character or graphic information to be transmitted and displayed. However, this CCP signal is omitted when an information image of characters or figures is displayed only in black and white. Furthermore, D is PDP (Pattern Data
This is a 248-bit pattern data signal for one line in the horizontal direction of an information image of characters and figures to be transmitted and displayed. this
In the PDP signal, the data identification signals DI ₁ and DI ₂ are inserted into the control signal part, 4 bits each, 8 bits in total (excluding the parity bit).
indicates which line from the top of the information image of one page the pattern data signal belongs to.

The transmission mode of these signals is determined by the Radio Technology Council No. 4.
This is similar to what was written in the subcommittee's report for 1978.

Now, when a multiplexed information program that the program selection circuit 12 in FIG. When the program number signals PR ₁ and PR ₂ in The CCP signal and PDP signal for one page of the designated program are selectively received, and the pattern data for that one page is sequentially written and stored in the main memory 10. Thereafter, the pattern data stored in the first main memory 10 is read out in synchronization with the raster scanning of the CRT 13 and supplied to the CRT 13, so that the multiplexed information image of one page of the specified program is displayed on the screen at a constant rate. Display in a stationary state for a period of time. When the display of that page is finished and a binary information signal containing pattern data for a new page is transmitted in the same designated program, the program number signals PR ₁ and PR ₂ will match in this case as well, so that pattern will be transmitted. The data is stored in the main memory 10 and the image of the new page is displayed on the CRT 13. In this way, each time a new binary information signal of a designated program is transmitted, its pattern data is stored in the main memory 10 and displayed for a fixed period of time.

In the above explanation, one PCP signal is followed by a CCP signal for one page of the program.
Although the above description assumes that only PDP signals are transmitted continuously, multiplexed information signals of other programs or pages may be partially interrupted and transmitted in the middle of these signals. In that case, the interrupt signal has a second
A specific interrupt code signal is attached to the service identification/interrupt identification signal SI/IN part of each signal in Figures B, C, and D, so by detecting this, it is possible to determine the interrupt signal. What is necessary is to detect whether it exists or not.

Hereinafter, the present invention will be described in detail with reference to illustrative drawings.

In FIG. 3, the code signal recording control circuit 22
A sampling clock of 5.727272MHz is input from terminal 18 and received data is input from terminal 19. After detecting FC and SI/IN, DI ₁ , DI ₂ ,
Each timing signal shown in a2 to a5 of FIG. 4 synchronized with _PR1 and _PR2 and an output a1 which is an 8-bit parallel signal corrected for errors and made into a 4-bit parallel signal are output. The PCP detection circuit 23
After DI ₁ and DI ₂ shown in a1 in the figure are latched at the rising edge of a2 and a3, respectively, they are converted to 8 bits at the falling edge of the a3 pulse.
DI is being detected. In the C55 method, DI is “FF”
When , it indicates PCP, and the PCP detection circuit 23, which is composed of a latch, a comparator, etc., outputs a signal that goes to the "H" level as shown in a6 in synchronization with the falling edge of a3 in FIG.

The PR detection circuit latches PR ₁ and PR ₂ , respectively, according to the timings a4 and a5 in FIG.
The bits are added bit by bit to create an 8-bit program number code.

The recording control circuit 24 gates the "H" level part of FIG. 4 a6 outputted by the PCP detection circuit and the pulse of FIG. 4 a8 outputted by the code signal recording control circuit 22, The program number is recorded in the buffer memory 28 at the rising edge of a8.

The memory control circuit 32 controls the buffer memory 2.
8 is read out and compared with the program number already recorded in the storage circuit, and if the same number is not found, it is recorded in the continuation of each program in the storage circuit 33.

Typically, a microprocessor is used for this type of processing.

At the beginning of the process, the memory control circuit 32 sets the clear terminal of the counter 31 to the "L" level, and sets all outputs of the counter 31 to the "L" level.
Therefore, flip-flops 35, 37, 39
The D terminal of is at “L” level, and the PCP detection circuit 2
3, when the PCP signal is detected and changes to "H" level, all the outputs of the flip-flops become "L" level, and the outputs generated in the timing generation circuit 34 as shown in FIG. 5 b2 and b3, H
In synchronization with pulse b1, timing signals T ₁ to Tn with the same duty but out of phase, and in synchronization with V pulse C1 as shown in FIG. 6 C2 and C3, with the same duty and out of phase, respectively. The outputs of the AND gates 41, 42, and 43 to which the shifted timing signals T1 to Tn are applied are at "L" level, and the position indicated by T1 is the CRT 13.
The screen becomes completely black. The memory control circuit 32 controls the contents of the memory circuit 33 and the buffer memory 2.
8 are the same, or when the output of the counter 25 reaches the "H" level, the counter 31
A clock is output to the counter, and the output of the counter is set to "H", "L", and "L" from the LSB. As a result, the S-P conversion circuit 30 converts the signal that goes to the "H" level only in the 13th H input to the terminal 20 into S-P with the H pulse input to the terminal 21, and 21H
The selection circuit 29 selects one of the eight signals to be at the "H" level for each of the 8H periods, and the signal supplied to the 22 becomes "H" only in the 15th H.
The signal changes to .

The above process is repeated sequentially from the 14th H to the 21st H by changing the output of the counter 31, and finally the data is shifted to the flip-flops 3638 and 40 at the timing of the rise of the PCP detection signal, and the data is shifted to the AND circuits 44 to 40 respectively. 46 and add each signal in OR circuits 47, 48, and 49, the signals of the bars color-coded by each scan H are output to terminal 5.
1, 52, 53, respectively R, G, B
becomes.

Further, even if there is no character signal for each H, by providing a counter 25 and counting V pulses, processing for another horizontal scanning period can be performed after a certain field interval. Although not shown in this configuration diagram, it is also easy to clear all flip-flops 35 to 40 after the 14th to 21st processes are completed and repeat the above operation.

As described above, according to the present invention, the number of programs that can be received can be displayed using a color bar or the like, so that it is possible to obtain something that is easy to understand and useful.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a teletext receiver according to an embodiment of the present invention, FIG. 2 is a waveform diagram of an example of a teletext multiplex signal received by the same device, and FIG. 3 is a detailed block diagram of the main parts of the same device. 4, 5, and 6 are waveform diagrams of each part. 1... Video detection circuit, 2... Waveform shaping circuit, 3
... Synchronization separation circuit, 4... Color subcarrier regeneration circuit,
5... Gate pulse generation circuit, 6... Clock generation circuit, 7... Sampling circuit, 8... FC detection circuit, 9... W/R control circuit, 10... Main memory, 11... Reception status display circuit , 12...Program selection circuit, 13...CRT, 14...Display control circuit.

Claims (1)

[Scope of Claims] 1. In a device that receives and displays teletext etc. that are multiplexed and sent during the vertical blanking period of a television video signal, signals of a plurality of horizontal scanning periods within the vertical blanking period are sequentially searched. Then, the number of received teletext signals is displayed graphically on the CRT by counting specific control signals in the text signal during a certain period of time and displaying the number of teletext signals received on the CRT graphically with a length proportional to the number of control signals. A teletext receiver characterized by: 2. The teletext receiver according to claim 1, wherein when creating a signal to be displayed on the CRT, the displayed color is changed in each of a plurality of horizontal scanning periods during vertical blanking. .