JPS6135754B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an image quality adjustment circuit for an image recording apparatus using a recording tube such as a pinch tube or an optical fiber tube.

A conventional video amplifier has a configuration as shown in FIG. is adjusted, and the coupling capacitor 4
The signal is amplified by a transistor 5 via a transistor 5, and is applied to a recording tube 6, causing a face plate 7 to emit light, thereby recording on photographic paper or an electrostatic recording medium. The video signal applied to the recording tube 6 usually has negative image information (black information emits light on the face), and the copy transferred with photographic paper or electrostatic recording material is a positive image. It's starting to happen. FIG. 2 shows the signal voltage applied to the recording tube 6.

In an image recording device using such a recording tube, the level of the video signal is generally proportional to the density (as a value from the white level), as shown in Figure 3.
Gradation is expressed. However, if the gradation is expressed correctly, the background will look rather distracting, and noise components such as shading will also be included. Therefore, if you want to know only the necessary information, for example, if you want to compress the video into only white and black information, correctly expressing the gradation will have disadvantageous results. In other words, unlike soft copies, hard copies rarely have applications that require delicate density.
Clarity of information is often required, and accurate representation of gradation is a disadvantage.

On the other hand, if only two values, black and white, can be expressed, accurate image reproduction cannot be performed.

The present invention was made to solve these conventional problems, and its purpose is to enhance the black and white levels of a video signal as desired, and to faithfully reproduce correct gradation as necessary. An object of the present invention is to provide an image quality adjustment circuit that can (in other words, arbitrarily vary gradation).

In order to achieve the above object, the present invention provides an amplifier circuit that amplifies a video signal having image information, and an amplifier circuit that lowers the gain of the amplifier circuit when the video signal becomes larger than a first value, and A gain control circuit that lowers the gain of the amplifier circuit when the gain becomes smaller than a value, a level adjustment circuit that provides linearity of the output voltage of the video signal, and a ratio of the outputs of these gain control circuits and level adjustment circuits are adjusted. and adjustment means for inputting the signal to the amplifier circuit.

Embodiments of the present invention will be described below with reference to the accompanying drawings.

FIG. 4 shows an embodiment of an image adjustment circuit according to the present invention. In this embodiment, the input terminal 11 is
It receives a video signal having image information, and is connected to the base of the video signal amplification transistor 12. The collector of the transistor 12 is connected to a bias power supply terminal 13 ( _Vcc1 ), and the emitter is grounded via a resistor 14.

The emitter of transistor 12 is also connected to a level adjustment circuit LV and a gain control circuit GC. The level adjustment circuit LV includes a resistor 15, one end of which is connected to the emitter of the transistor 11, and this resistor 1.
A resistor 16 connected between the other end of 5 and the ground point.
This divides the emitter output voltage of the transistor 12 while maintaining linearity.

The gain control circuit GC is connected to the bias power supply terminal 13
(Resistor 17 inserted between _Vcc1 and ground point
(resistance value R ₁₇ ) and resistor 18 (resistance value R ₁₈ ), and also the bias power supply terminal 13 (V _cc1 )
A resistor 19 (resistance value
A series circuit of R ₁₉ ) and a resistor 20 (resistance value R ₂₀ );
a resistor 21 whose one end is connected to the emitter of the transistor 12; a diode 22 whose anode is connected to the other end of the resistor 21 and whose cathode is connected to the ground point of the resistors 17 and 18;
1, and a diode 23 whose cathode is connected to the other end of the diode 23 and whose anode is connected to the connection point between the resistors 19 and 20.
= V _cc1 R ₁₈ /R ₁₇ +R ₁₈ ), the diode 22 is energized, a parallel circuit of resistors 17 and 18 is inserted as a load for the transistor 12, and the gain of the transistor 12 is reduced. 2
3 cathode side voltage (i.e. video signal) is the second
If the voltage is smaller than the voltage value (V2=V _cc1 R ₂₀ /R ₁₉ +R ₂₀ ), the diode 23 is energized and the transistor 1 is turned on.
The gain of transistor 12 is reduced by inserting resistors 19 and 20 in parallel as two loads.

The variable resistor 25 adjusts the degree of contribution of the transistor 12 of the gain control circuit GC to the gain, and one end thereof is connected to the output end of the level adjustment circuit LV, that is, the other end of the resistor 15, and the resistor 24 via bias power supply terminal 13 ( _Vcc1 )
The other end is connected to the cathode of the diode 23 of the gain control circuit GC, and the variable output end is connected to the base of the transistor 26.

The collector of the transistor 26 is connected to the bias power supply terminal 13 ( _Vcc1 ), and the emitter is connected via a contrast adjustment resistor 27. The variable output terminal of the contrast adjustment resistor 27 is connected to a transistor 29 via a coupling capacitor 28.
connected to the base of. The base of the transistor 29 is connected to the bias power supply terminal 3 via a resistor 30.
1 ( _Vcc2 ) and the resistor 32
grounded through. The emitter of the transistor 29 is connected to a resistor 33, a resistor 34, and a capacitor 35.
and grounded through a parallel circuit. The collector of the transistor 29 is connected to the bias power supply terminal 31 (V _cc2 ) via a parallel circuit of a resistor 36 and a coil 37 and a series circuit of a resistor 38 and a coil 39.
connected to. Further, the collector of the transistor 29 is connected to the recording tube 40 through a parallel circuit of a resistor 36 and a coil 37, so that the adjusted video signal of the recording tube 40 is inputted, and the recording tube 40 is connected to the collector of the transistor 29. is configured to cause the face plate 41 to emit light in accordance with the input video signal.

In the embodiment of FIG. 4 configured in this way, if the variable output end of the variable resistor 25 is slid upward in the diagram so that the output end of the level adjustment circuit LV is connected to the base of the transistor 26, The video signal is amplified by the transistor 12, divided appropriately by the level adjustment circuit LV,
The signal is amplified by the transistors 26 and 29 and applied to the recording tube 40, causing the face plate 41 to emit light. At this time, the gain control circuit GC is the transistor 1
2, the input voltage and output voltage of this image quality adjustment circuit maintain linearity (in other words, they have a proportional relationship), and the relationship is as shown in FIG.

Next, slide the variable output terminal of the variable resistor 25 downward in the diagram, and connect the resistor 2 of the gain control circuit GC.
When the other end of the input terminal 11 is connected to the base of the transistor 26, the video signal applied to the input terminal 11 is amplified by the transistor 12 and given to the gain control circuit GC. Resistor 21 and diode 2
The video signal level at the connection point with resistor 1
Voltage divided by 7 and 18 (V1=V _cc1
R ₁₈ /R ₁₇ +R ₁₈ ), the diode 22 conducts and the resistor 1 acts as a load for the transistor 12.
Since 7 and 18 are connected in parallel, the gain decreases. On the other hand, if the video signal level at the connection point between resistor 21 and diode 23 is smaller than the voltage divided by resistors 19 and 20 (V2=V _cc1 R ₂₀ /R ₁₉ +R ₂₀ ), diode 23 resistors 19 and 20 are placed in parallel as a load for the conducting transistor 12, which also reduces the gain. Therefore, the relationship between the video input voltage and the video output voltage in this case is as shown in FIG.

Therefore, in this case, the video output voltage is compressed as shown in FIG. 7 in the region where the video input voltage is smaller than V2in (the input voltage of the transistor 12 corresponding to the second voltage value), and the copy density hardly changes and is approximately It is black. Further, the video output voltage is compressed even in a region where the video input voltage is higher than V1in (the input voltage of the transistor 12 corresponding to the first voltage value), and the copy density hardly changes and is almost white.

In addition, when the position of the variable output end of the variable resistor 25 is set to an intermediate position between the upper limit and the lower limit, the video signal provided from the transistor 12 via the level adjustment circuit LV (the linearity of the input video signal is maintained). signal) and a video signal (a signal having a non-linear relationship with the input video signal) provided via the gain control circuit GC are mixed by a variable resistor 25, amplified by transistors 26 and 29, and then sent to a recording tube 40.
Enter. In this case, the relationship between the video input voltage and the video output voltage is intermediate between the relationships shown in FIGS. 5 and 6, as shown in FIG. 8b. In addition, the 8th
In the figure, a is the relationship between the input voltage and output voltage in Figure 5, and c
shows the relationship between the input voltage and the output voltage in FIG.

In this way, by adjusting the variable resistor 25, (1) the linearity of the video input signal and the video output signal is maintained to faithfully reproduce the correct gradation, and (2) the video input signal is The value of V1in and the second value
If it is not between V2in and V2in, it is possible to reduce the gain and compress the video signal to emphasize the black level and white level, or (3) to obtain a gradation intermediate between (1) and (2) above. can. Note that in the above embodiment, the diodes 22, 2
3. Although the gain control circuit is configured by the resistors 17, 18, 19, and 20, the present invention is not limited thereto, and the gain control circuit can be configured using thyristors, transistors, and the like. In short, anything that can reduce the gain of the amplifier when the input signal is not within a predetermined range may be used.

In addition, in the above embodiment, a variable resistor is used,
We choose to emphasize the black level and white level of the video signal, reproduce the correct gradation, and provide gradation in between these two, but in addition to variable resistors, we use appropriate analog adder circuits and switches. etc. may also be used.

A level adjustment circuit that provides linearity of the video signal,
Equipped with a gain control circuit that compresses the video signal and an adjustment means that adjusts the ratio of these outputs and inputs it to the amplifier circuit, it emphasizes the black and white levels of the video signal and eliminates background noise, shunting, and other defects. This has the effect of removing necessary information, emphasizing the black and white levels of the video signal as desired, and faithfully reproducing the correct gradation as necessary (in other words, the gradation can be arbitrarily varied). .

[Brief explanation of the drawing]

Figure 1 is a circuit diagram showing a conventional video amplifier, Figure 2 is a circuit diagram showing a conventional video amplifier.
Figure 3 is an explanatory diagram showing the video output signal obtained by the circuit in Figure 1, Figure 3 is an explanatory diagram showing the relationship between the video output signal and density of the circuit in Figure 1, and Figure 4 is the image quality adjustment according to the present invention. A circuit diagram showing one embodiment of the circuit, FIG. 5 shows the relationship between the video input voltage and the video output voltage when the variable output terminal of the variable resistor 25 of the circuit shown in FIG. 4 is slid upward. 6 is an explanatory diagram showing the relationship between the video input voltage and the video output voltage when the variable output terminal of the variable resistor 25 of the circuit shown in FIG. 4 is slid downward as far as possible, and FIG. is an explanatory diagram showing the video output voltage when the variable output end of the variable resistor 25 of the circuit of FIG. 4 is slid downward as far as it will go, and FIG. FIG. 3 is an explanatory diagram showing the relationship between the video output voltage and the video input voltage when the end is set at an intermediate position. LV...Level adjustment circuit, GC...Gain control circuit, 1
2, 26, 29...transistor, 15, 16, 1
7, 18, 19, 20, 21...Resistor, 22, 2
3...diode, 25...variable resistor, 40...recording tube.

Claims (1)

[Claims] 1. An amplifier circuit that amplifies a video signal having image information, and when the video signal becomes larger than a first value, the gain of the amplifier circuit is lowered, and when the video signal becomes smaller than a second value. a gain control circuit that lowers the gain of the amplifier circuit; a level adjustment circuit that provides linearity of the output voltage of the video signal; and a ratio of the outputs of these gain control circuits and level adjustment circuits that are adjusted and input to the amplifier circuit. An image quality adjustment circuit comprising an adjustment means for adjusting the image quality.