JPS6138859B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for forming electrodes of a planar semiconductor device.

In semiconductor devices such as integrated circuits, a metal wiring layer is usually deposited on an insulating film formed on the surface of a semiconductor substrate to connect each element formed on the substrate. Since disconnection of the layer due to electromigration occurs at the step portion at the edge of the electrode window formed in the insulating film, it is necessary to avoid steep steps at the electrode window portion as much as possible.

Taking this point into consideration, the conventional electrode forming method is as shown in the process diagram shown in FIG.

That is, as shown in FIG. 1A, a p-type silicon substrate 3 is formed with an n ⁺ silicon layer 1 and has a silicon dioxide (SiO ₂ ) film 2 with a thickness of about 1 μm on the surface.
In forming the electrode of the n ⁺ silicon layer 1, first, a primary electrode window 4 is formed on the silicon dioxide (SiO ₂ ) film 2 on the n ⁺ silicon layer 1 of the substrate, and then the steps shown in FIG. As shown in
A PSG film 5 with a thickness of about 0.5 μm is deposited by the CVD method, and then the substrate is _heated to
The PSG film 5 is melted by heating to 1100° C., and the steep step formed at the edge of the electrode window 4 relative to the n ⁺ silicon layer 1 is transformed into a gentle slope shape 6 as shown in FIG. 1C. Fix it.

Thereafter, as shown in FIG.
After forming a secondary electrode window 7 having a diameter smaller than that of the next electrode window, a metal aluminum wiring layer 8 with a thickness of about 1 μm electrically connected to the n ⁺ silicon layer 1 is coated on the substrate by vapor deposition or the like. It was a method of making him wear clothes.

However, in the conventional method, as mentioned above, the substrate
Silicon dioxide (SiO ₂ ) film 2 on n ⁺ silicon layer 1
The steep step of the primary electrode window 4 formed in the PSG
In order to heat the substrate to a high temperature of 1050 to 1100°C when repairing with film 5, the active impurity layer formed on the substrate (n ⁺ silicon layer 1 in the above example) is deformed due to thermal diffusion of impurities. There was a problem that the electrical characteristics of the semiconductor element formed in the semiconductor device changed.

In view of the above-mentioned problems, the present invention provides a method for forming an electrode without a step difference without changing the electrical characteristics of the device in manufacturing a planar semiconductor device.

That is, in the present invention, when forming electrodes of a planar semiconductor element, the surface of a semiconductor substrate after element formation is covered with a semiconductor polycrystalline layer of high resistivity, and impurities are added to the surface layer of the semiconductor polycrystalline layer by ion implantation. After that, a predetermined location of the semiconductor polycrystalline layer is locally heated with a laser to form a conductive layer electrically connected to a predetermined layer of an element formed on the semiconductor substrate on the semiconductor polycrystalline layer in the portion. The device is characterized in that the electrodes of the device are taken out from the upper surface of the semiconductor polycrystalline layer covering the device.

The present invention will be explained in detail below with reference to Examples.

FIG. 2 is a process explanatory diagram of an embodiment of the present invention in manufacturing a planar semiconductor device.

That is, the present invention first includes, for example, as shown in FIG. 2A.
After removing the silicon dioxide (SiO ₂ ) film formed on the surface of the p-type silicon substrate 3 on which the n ⁺ silicon layer 1 is formed by a diffusion method or the like using hydrofluoric acid (HF) or the like, a protective film is placed on the substrate. As a result, a polycrystalline silicon layer 9 having a thickness of about 5000 Å and containing no impurities and having a high specific resistance is deposited by thermal decomposition of monosilane (SiH ₄ ).

Next, as shown in FIG. 2B, phosphorus ⁺ (P ⁺ ) ions 10 are implanted into the entire surface of the polycrystalline silicon layer 9 of the substrate at an implantation energy of 150 KeV and an implantation amount of 1×10 ¹⁵ /cm ² . 2000 on the surface layer of polycrystalline silicon layer 9
An n-type impurity doped layer 11 is formed to a depth of about 3000 Å.

Thereafter, as shown in FIG.
A narrowly focused YAG laser beam 13 of 10 to 50 MW/cm ² is applied to the electrode forming part 12 for the n ⁺ silicon layer 1.
The electrode forming portion 12 is irradiated for 30 nanoseconds to locally heat it, thereby forming a good conductive layer made of a recrystallized layer of silicon containing phosphorus (P) in the portion.

In this case, since the n-type impurity doped layer other than the electrode forming portion is not heated, it maintains a high specific resistance and has the effect as a protective film.

Next, as shown in FIG. 2D, the conductive layer 14 is applied to the n ⁺ silicon layer 1 on the protective film formed of the polycrystalline silicon layer 9 having the n-type impurity doped layer 11 of the substrate. 1 electrically connected through
A metal aluminum wiring layer 8 having a thickness of approximately μm is formed by vapor deposition or the like to complete the electrode wiring.

Although the above embodiments have been described with respect to a semiconductor device using silicon as a substrate, the method of the present invention can also be applied to manufacturing a plaio-type semiconductor device using a - group compound semiconductor as a substrate.

As explained above, the method of the present invention is applicable to the electrode connection portion of the active impurity layer formed on the semiconductor substrate in the manufacture of a planar semiconductor device.
Since it can be drawn out onto the surface protective film of a substrate made of polycrystalline silicon with high resistivity, it is possible to connect the metal wiring layer to the active impurity layer without any steps, and it is possible to connect the metal wiring layer with the active impurity layer without any steps. Since the occurrence of wire breakage is prevented, it is extremely effective in improving the manufacturing yield and reliability of semiconductor devices such as integrated circuits.

[Brief explanation of the drawing]

FIG. 1 is a process explanatory diagram of a conventional electrode forming method, and FIG. 2 is a process explanatory diagram of an embodiment of the present invention. In the figure, 1 is an n ⁺ silicon layer, 2 is a silicon dioxide film, 3 is a p-type silicon substrate, 4 is a primary electrode window, 5 is a PSG film, 6 is a slope shape, and 7 is a secondary electrode window. , 8 is a metal aluminum wiring layer, 9 is a polycrystalline silicon layer, 10 is phosphorus ⁺ ion, 11 is n
12 is an electrode forming part, 13 is a laser beam, and 14 is a conductive layer.

Claims (1)

[Claims] 1 When forming electrodes of planar semiconductor devices,
After forming an element, the surface of the semiconductor substrate is covered with a high resistivity semiconductor polycrystalline layer, and impurities are added to the surface layer of the semiconductor polycrystalline layer by ion implantation. By locally heating the semiconductor polycrystalline layer through light irradiation and forming a conductive layer electrically connected to a predetermined layer of the element formed on the semiconductor substrate, the electrodes of the element can be connected to the element. A method for manufacturing a semiconductor device, characterized in that the semiconductor device is taken out from the upper surface of a covering semiconductor polycrystalline layer.