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JPS6138871B2 - - Google Patents
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JPS6138871B2 - - Google Patents

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Publication number
JPS6138871B2
JPS6138871B2 JP54123530A JP12353079A JPS6138871B2 JP S6138871 B2 JPS6138871 B2 JP S6138871B2 JP 54123530 A JP54123530 A JP 54123530A JP 12353079 A JP12353079 A JP 12353079A JP S6138871 B2 JPS6138871 B2 JP S6138871B2
Authority
JP
Japan
Prior art keywords
compound semiconductor
guard ring
semiconductor layer
layer
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54123530A
Other languages
Japanese (ja)
Other versions
JPS5646570A (en
Inventor
Kazuo Sakai
Juichi Matsushima
Shigeyuki Akiba
Akinari Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
KDDI Corp
Original Assignee
Kokusai Denshin Denwa KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kokusai Denshin Denwa KK filed Critical Kokusai Denshin Denwa KK
Priority to JP12353079A priority Critical patent/JPS5646570A/en
Priority to US06/187,744 priority patent/US4383266A/en
Priority to GB8031240A priority patent/GB2060257B/en
Publication of JPS5646570A publication Critical patent/JPS5646570A/en
Publication of JPS6138871B2 publication Critical patent/JPS6138871B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F30/00Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors
    • H10F30/20Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors
    • H10F30/21Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation
    • H10F30/22Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes
    • H10F30/225Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes the potential barrier working in avalanche mode, e.g. avalanche photodiodes
    • H10F30/2255Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes the potential barrier working in avalanche mode, e.g. avalanche photodiodes in which the active layers form heterostructures, e.g. SAM structures

Landscapes

  • Light Receiving Elements (AREA)

Description

【発明の詳細な説明】 本発明はヘテロ接合を有するアバランシエ・ホ
ト・ダイオードの構造に係り、特に光検出領域の
周辺部におけるブレークダウンを防止する目的で
設けられたガードリングの構造の改良に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to the structure of an avalanche photodiode having a heterojunction, and particularly to an improvement in the structure of a guard ring provided for the purpose of preventing breakdown at the periphery of a photodetection region.

各種の半導体光検出器の中でも、アバランシ
エ・ホト・ダイオード(以下「APD」と略す)
は、高感度、広帯域な特性を有する受光素子であ
り、光通信用部品として広く用いられている。
Among various semiconductor photodetectors, avalanche photodiodes (hereinafter abbreviated as "APD")
is a light-receiving element with high sensitivity and broadband characteristics, and is widely used as an optical communication component.

APDはpn接合に逆バイアス電圧を加えて、高
電界下でなだれ増倍を生じさせて光電流の増幅を
行う。このため光電流のなだれ増倍が起る前に、
光検出領域の周辺部に電界が集中し、そこでブレ
ークダウンを起す欠点がある。
APD amplifies photocurrent by applying a reverse bias voltage to the pn junction and causing avalanche multiplication under a high electric field. Therefore, before avalanche multiplication of photocurrent occurs,
The disadvantage is that the electric field concentrates around the periphery of the photodetection area, causing breakdown there.

従来から上述の欠点を解決するために、特に
GeやSiによる一元のAPDにみられるように、光
検出領域の周辺にガードリングと呼ばれる環状層
を設けたAPDが提案されている。第1図はこの
従来例を示す図でaは截断面を含む斜視図、bは
断面図である。これらの図において、1は高濃度
n形半導体基板、2は低濃度n形半導体、3は高
濃度p形半導体による光検出領域であり、2と
pn接合を構成する。4はp形半導体によるガー
ドリング、5は絶縁体、6,7は電極金属であ
る。この従来例では、ガードリング4のキヤリア
濃度を光検出領域3のキヤリア濃度に比べて低く
し、ガードリング4での電界を下げ、光電流増倍
時に光検出領域3の周辺部でブレークダウンが起
らないようにしている。なお、ガードリング4の
作製には拡散手段が用いられている。
Traditionally, in order to solve the above-mentioned drawbacks, especially
APDs have been proposed in which an annular layer called a guard ring is provided around the photodetection region, as seen in the one-dimensional APDs made of Ge or Si. FIG. 1 is a diagram showing this conventional example, in which a is a perspective view including a cut section, and b is a cross-sectional view. In these figures, 1 is a high-concentration n-type semiconductor substrate, 2 is a low-concentration n-type semiconductor, and 3 is a photodetection region made of a high-concentration p-type semiconductor.
Configure a p-n junction. 4 is a guard ring made of a p-type semiconductor, 5 is an insulator, and 6 and 7 are electrode metals. In this conventional example, the carrier concentration of the guard ring 4 is made lower than that of the photodetection region 3, the electric field in the guard ring 4 is lowered, and breakdown occurs at the periphery of the photodetection region 3 during photocurrent multiplication. I'm trying not to wake up. Note that a diffusion means is used to manufacture the guard ring 4.

一方最近では、光通信に有効な波長帯として1
〜1.7μm帯が注目され、これに使用されるAPD
としてIn1-xGaxAsyP1-y(0.42y≦x≦0.5y、かつ
0<y≦1)の組成式で表わされる四元又は三元
のAPDが作製されるようになつた。この
In1-xGaxAsyP1-y系においても光検出領域の周辺
でブレークダウンを起しやすいという問題はなお
残在し、この問題を解決する一つの手法として第
1図に示した従来例と同様にガードリングを設け
ることが考えられる。しかしながら、
In1-xGaxAsyP1-y系においては、低濃度のp型領
域を従来と同様に拡散法で形成することが極めて
難しく、光検出領域とガードリングのキヤリア濃
度差を充分とれず、ガードリングのうち特に曲率
の大きな部分に電界が集中しそこでブレークダウ
ンを起してしまう欠点がある。
On the other hand, recently, 1 wavelength band has been recognized as effective for optical communication.
~1.7μm band is attracting attention, and APD used for this band
A quaternary or ternary APD expressed by the composition formula In 1-x Ga x As y P 1-y (0.42y≦x≦0.5y and 0<y≦1) has come to be manufactured. . this
Even in the In 1-x Ga x As y P 1-y system, there still remains the problem that breakdown tends to occur around the photodetection region, and one method to solve this problem is shown in Figure 1. It is conceivable to provide a guard ring as in the conventional example. however,
In the In 1-x Ga x As y P 1-y system, it is extremely difficult to form a low-concentration p-type region using the conventional diffusion method, and it is necessary to maintain a sufficient carrier concentration difference between the photodetection region and the guard ring. However, the electric field concentrates on the part of the guard ring that has a particularly large curvature, causing breakdown there.

本発明は、上述の欠点に鑑みなされたもので、
ガードリングの曲率の大なる部分を禁止帯幅の大
きな半導体の中に形成することにより、そこでの
ブレークダウン電圧を大きくせしめブレークダウ
ンを防ぐことを可能にしたアバランシエ・ホト・
ダイオードを提供するものである。
The present invention has been made in view of the above-mentioned drawbacks.
By forming a large part of the guard ring's curvature in a semiconductor with a large forbidden band width, the breakdown voltage there can be increased and breakdown can be prevented by making it possible to prevent breakdown.
It provides diodes.

以下、図面を用いて本発明を詳細に説明する。 Hereinafter, the present invention will be explained in detail using the drawings.

第2図は本発明の一実施例であるAPDの断面
を示す図である。17はn+−InP基板、18はn
−1n1-pGapAsqP1-q(0.42q≦p≦0.50q、かつ0
≦q≦1)層(第2の半導体層)、19はn−
In1-xGaxAsyP1-y(0.42y≦x≦0.50y、かつ0≦
y≦1)層(第1の半導体層)、20はp+
In1-xGaxAsyP1-y層で層19とpn接合を形成する
光検出領域、21,22はp型半導体によるガー
ドリング、5は絶縁物、6,7は電極金属であ
る。ガードリング21,22をさらに説明する
と、21は層19と同一組成のp形半導体であり
p−In1-xGaxAsyP1-yで示され、22は層18と
同一組成のp形半導体でp−In1-pGapAsqP1-q
示される。また矢印線で示した25はガードリン
グの曲率の大なる部分を示している。本実施例の
特徴は層18の禁制帯幅を層19の禁制帯幅より
大きくとり、さらに、ガードリングを構成するp
形領域を層18の中まで達するように形成し、ガ
ードリングの曲率の大なる部分25を層18の中
に存在させていることである。
FIG. 2 is a cross-sectional view of an APD that is an embodiment of the present invention. 17 is n + −InP substrate, 18 is n
−1n 1-p Ga p As q P 1-q (0.42q≦p≦0.50q, and 0
≦q≦1) layer (second semiconductor layer), 19 is n-
In 1-x Ga x As y P 1-y (0.42y≦x≦0.50y, and 0≦
y≦1) layer (first semiconductor layer), 20 is p +
In 1-x Ga x As y P 1-y layer forms a p-n junction with the layer 19; 21 and 22 are guard rings made of p-type semiconductor; 5 is an insulator; and 6 and 7 are electrode metals. . To further explain the guard rings 21 and 22, 21 is a p-type semiconductor having the same composition as the layer 19 and is represented by p-In 1-x Ga x As y P 1-y , and 22 is a p-type semiconductor having the same composition as the layer 18. It is a p-In 1-p Ga p As q P 1-q type semiconductor. Further, 25 indicated by an arrow line indicates a large portion of the curvature of the guard ring. The feature of this embodiment is that the forbidden band width of the layer 18 is made larger than the forbidden band width of the layer 19, and
The shaped region is formed to reach into the layer 18, and the large curvature portion 25 of the guard ring is located within the layer 18.

一般に他の条件が同じであれば禁制帯幅の大な
る半導体の方がブレークダウン電圧の大きいこと
が知られている。従つて、ガードリングを光検出
領域と同一組成の半導体中にのみ形成した従来例
に比べると、本実施例のようにガードリングを禁
制帯幅の大なる半導体の中まで延長した方がガー
ドリングの曲率の大なる部分25のブレークダウ
ン電圧は大きくなり、ブレークダウンを有効に防
ぐことができる。
It is generally known that, other conditions being the same, a semiconductor with a larger forbidden band width has a larger breakdown voltage. Therefore, compared to the conventional example in which the guard ring is formed only in a semiconductor having the same composition as the photodetection region, it is better to extend the guard ring into the semiconductor with a large forbidden band width as in this example. The breakdown voltage of the portion 25 where the curvature is large becomes large, and breakdown can be effectively prevented.

次に本実施例の製造方法を説明する。n+−InP
基板17上に液相エピタキシヤル法でn−
In1-pGapAsqP1-q(0.42q≦p≦0.50q、かつ0≦
q≦1)層18、n−In1-xGaxAsyP1-y(0.42y≦
x≦0.50y、かつ0≦y≦1)層19を順次成長
する。この際In1-pGapAsqP1-q層18の禁制帯幅
の方をIn1-xGaxAsyP1-y層19の禁制帯幅より大
きくする。次に絶縁体5となるSiO2膜をスパツ
タリング又は気相化学反応法等で、このウエハー
上に堆積する。その後、ガードリングを形成する
部分の上のSiO2膜をフオト・エツチング技術で
除去し、SiO2膜をマスクとしてZnを熱拡散して
ガードリング21,22を形成する。次に光検出
領域部分の上のSiO2膜もフオト・エツチング技
術を用いて除去し、SiO2膜をマスクとしてZnを
熱拡散して光検出領域を形成する。二度の熱拡散
が終つた段階で、Zn拡散したガードリング部分
の先端はIn1-pGapAsqP1-q層18中にあり、又光
検出領域のpn接合はIn1-xGaxAsyP1-y層19中に
あるようにする。その後、無反射被膜形成のため
SiO2膜を再び堆積した後、上部電極取出しの
為、ガードリング部分の上のSiO2膜を除去す
る。真空蒸着及びフオト・エツチング技術を用い
て上部電極9を形成する。次にInP基板17の裏
側を研磨した後、真空蒸着して下部電極7を形成
する。最後に電極の熱処理を行つて、APDが完
成する。
Next, the manufacturing method of this example will be explained. n + −InP
n- is deposited on the substrate 17 by liquid phase epitaxial method.
In 1-p Ga p As q P 1-q (0.42q≦p≦0.50q, and 0≦
q≦1) layer 18, n-In 1-x Ga x As y P 1-y (0.42y≦
x≦0.50y and 0≦y≦1) layers 19 are sequentially grown. At this time, the forbidden band width of the In 1-p Ga p As q P 1-q layer 18 is made larger than that of the In 1-x Ga x As y P 1-y layer 19 . Next, a SiO 2 film that will become the insulator 5 is deposited on this wafer by sputtering or a vapor phase chemical reaction method. Thereafter, the SiO 2 film on the portion where the guard rings are to be formed is removed by photo-etching, and the guard rings 21 and 22 are formed by thermally diffusing Zn using the SiO 2 film as a mask. Next, the SiO 2 film above the photodetection area is also removed using photo-etching technology, and the Zn is thermally diffused using the SiO 2 film as a mask to form the photodetection area. At the stage where the second thermal diffusion is completed, the tip of the guard ring portion where Zn has been diffused is in the In 1-p Ga p As q P 1-q layer 18, and the pn junction in the photodetection area is in the In 1-x Ga x As y P 1-y in the layer 19. After that, to form a non-reflective coating.
After depositing the SiO 2 film again, the SiO 2 film above the guard ring portion is removed to take out the upper electrode. Upper electrode 9 is formed using vacuum deposition and photo-etching techniques. Next, after polishing the back side of the InP substrate 17, the lower electrode 7 is formed by vacuum deposition. Finally, the electrodes are heat-treated to complete the APD.

次に他の実施例について説明する。第2図の例
ではガードリング21,22は禁制帯幅の異なる
半導体を用いて構成していたが、ガードリングを
同一組成の半導体を用いて構成してもよい。この
場合 ガードリングを構成する半導体の禁制帯幅
は、ガードリングと接する半導体の禁制帯幅より
大きくする必要がある。第3図に、この実施例に
よるAPDの断面図を示す。本実施例のAPDの製
造方法として、ガードリングを結晶成長法により
形成する例を述べておく。n+−InP基板17上に
液相エピタキシヤル法でn−In1-pGapAsqP1-q
(0.42q≦p≦0.50q、かつ0≦q≦1)層18、
n−In1-xGaxAsyP1-y(0.42y≦x≦0.50y、かつ
0≦y≦1)層19を順次成長する。この際
In1-pGapAsqP1-qの禁制帯幅の方を
In1-xGaxAsyP1-yの禁制帯幅より大きくする。次
にSiO2膜をスパツタリング又は気相化学反応法
等で、このウエハー上に堆積する。その後、ガー
ドリングを形成するSiO2膜をフオト・エツチン
グ技術で除去し、SiO2膜をマスクとして、層1
8の途中まで層18、層19を選択的に除去し、
その後p−In1-lGalAsnP1-n(0.42m≦l≦
0.50m、かつ0≦m≦1)層27を選択的に成長
して、ガードリングとする。ガードリング部分の
In1-lGalAsnP1-nの禁制帯幅は層18、層19の
禁制帯幅より大きくする。次に光検出領域部分の
上のSiO2膜をフオト・エツチング技術を用いて
除去し、SiO2膜をマスクとしてZnを熱拡散して
光検出領域を形成する。その後、無反射被膜形成
の後、電極形成、熱処理を行つてAPDが完成す
る。
Next, other embodiments will be described. In the example shown in FIG. 2, the guard rings 21 and 22 are constructed using semiconductors having different forbidden band widths, but the guard rings may be constructed using semiconductors having the same composition. In this case, the forbidden band width of the semiconductor forming the guard ring needs to be larger than the forbidden band width of the semiconductor in contact with the guard ring. FIG. 3 shows a sectional view of the APD according to this embodiment. As a method for manufacturing the APD of this example, an example in which a guard ring is formed by a crystal growth method will be described. n-In 1-p Ga p As q P 1-q on n + -InP substrate 17 by liquid phase epitaxial method
(0.42q≦p≦0.50q, and 0≦q≦1) layer 18;
The n-In 1-x Ga x As y P 1-y (0.42y≦x≦0.50y, and 0≦y≦1) layer 19 is sequentially grown. On this occasion
In 1-p Ga p As q P 1-q forbidden band width
In 1-x Ga x As y P Make it larger than the forbidden band width of 1-y . Next, a SiO 2 film is deposited on this wafer by sputtering or a vapor phase chemical reaction method. After that, the SiO 2 film that forms the guard ring is removed using photo-etching technology, and layer 1 is etched using the SiO 2 film as a mask.
selectively removing layers 18 and 19 to the middle of layer 8;
Then p-In 1-l Ga l As n P 1-n (0.42m≦l≦
0.50m and 0≦m≦1) layer 27 is selectively grown to form a guard ring. guard ring part
The forbidden band width of In 1-l Ga l As n P 1-n is made larger than that of layers 18 and 19. Next, the SiO 2 film above the photodetection area is removed using photo-etching technology, and Zn is thermally diffused using the SiO 2 film as a mask to form the photodetection area. After that, an anti-reflective coating is formed, electrodes are formed, and heat treatment is performed to complete the APD.

第3図は他の実施例であり、第2図に示す
APDで光検出を行う層19の上部に量子効率を
高める為に層19よりも禁止帯幅の大なる半導体
よりなるIn1-nGanAsoP1-o層(0.42n≦m≦
0.50n、かつ0≦n≦1)26を形成したもので
ある。
FIG. 3 is another embodiment, which is shown in FIG.
In order to increase the quantum efficiency, an In 1-n Ga n As o P 1-o layer (0.42n≦m≦
0.50n and 0≦n≦1)26.

以上の実施例ではInGaAsP系混晶を用いた
APDについて述べたが、ガードリング部分の先
端が、光検出領域を構成する半導体の禁制帯幅よ
り大なる禁制帯幅を有する半導体中に形成されて
いればよいわけで、GaAlAsSb等の混晶でも可能
である。勿論、構成元素の異なる半導体層により
形成してもよい。又、導電形については逆の構造
のものも可能である。
In the above examples, InGaAsP mixed crystal was used.
As mentioned above about APD, it is sufficient that the tip of the guard ring portion is formed in a semiconductor having a forbidden band width larger than that of the semiconductor constituting the photodetection region, and even a mixed crystal such as GaAlAsSb can be used. It is possible. Of course, it may be formed using semiconductor layers having different constituent elements. Moreover, a structure having the opposite conductivity type is also possible.

以上InGaAsP系APDを例にとつて説明したよ
うに、本発明によればガードリング部分の先端を
光検出領域の半導体より禁制帯幅の大なる半導体
中に形成することにより、ガードリングの効果を
確実に発揮することができ、その工業的価値は極
めて大である。
As explained above using the InGaAsP APD as an example, according to the present invention, the tip of the guard ring portion is formed in a semiconductor whose forbidden band width is larger than that of the semiconductor in the photodetection region, thereby improving the effect of the guard ring. It can be reliably demonstrated, and its industrial value is extremely large.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図a,bは従来のアバランシエ・ホト・ダ
イオードの例を示す截断面を含む斜視図、第2
図、第3図および第4図は本発明の実施例を示す
断面図である。 5……絶縁物、6,7……電極金属、17……
n+−InP基板、18……n−In1-pGapAsqP1-q
(第2の半導体層)、19……n−
In1-xGaxAsyP1-y層(第1の半導体層)、20……
p+−In1-xGaxAsyP1-y層(光検出領域)、21,
22……ガードリング、25……曲率の大なる部
分、26……In1-nGanAsoP1-o層、27……p−
In1-lGalAsnP1-n層(ガードリング)。
Figures 1a and 1b are perspective views including a cut section showing an example of a conventional avalanche photodiode;
3 and 4 are cross-sectional views showing embodiments of the present invention. 5... Insulator, 6,7... Electrode metal, 17...
n + -InP substrate, 18...n-In 1-p Ga p As q P 1-q layer (second semiconductor layer), 19... n-
In 1-x Ga x As y P 1-y layer (first semiconductor layer), 20...
p + −In 1-x Ga x As y P 1-y layer (photodetection area), 21,
22... Guard ring, 25... Part with large curvature, 26... In 1-n Ga n As o P 1-o layer, 27... p-
In 1-l Ga l As n P 1-n layer (guard ring).

Claims (1)

【特許請求の範囲】 1 化合物半導体基板上に化合物半導体層からな
るpn接合を有する光検出領域と、該光検出領域
の周辺にガードリングとを少なくとも備えたアバ
ランシエ・ホト・ダイオードにおいて、前記光検
出領域を形成する化合物半導体層のうち前記基板
側に設けられた第1の化合物半導体層と、該第1
の化合物半導体層と導電型が等しく、かつ禁制帯
幅が大なる第2の化合物半導体層を前記基板側に
有し、前記ガードリングの曲率が大なる先端部を
該第2の化合物半導体層まで達するように形成さ
れていることを特徴とするアバランシエ・ホト・
ダイオード。 2 前記ガードリングは前記第1の化合物半導体
層及び前記第2の化合物半導体層の禁制帯幅より
も大なる化合物半導体層で形成されていることを
特徴とする特許請求の範囲第1項記載のアバラン
シエ・ホト・ダイオード。
[Scope of Claims] 1. An avalanche photodiode comprising at least a photodetection region having a pn junction made of a compound semiconductor layer on a compound semiconductor substrate, and a guard ring around the photodetection region. A first compound semiconductor layer provided on the substrate side among the compound semiconductor layers forming the region;
A second compound semiconductor layer having the same conductivity type as the compound semiconductor layer and having a large forbidden band width is provided on the substrate side, and a tip portion of the guard ring having a large curvature extends to the second compound semiconductor layer. Avalanche Hot
diode. 2. The guard ring according to claim 1, wherein the guard ring is formed of a compound semiconductor layer having a band gap larger than the forbidden band width of the first compound semiconductor layer and the second compound semiconductor layer. Avalanche photo diode.
JP12353079A 1979-09-26 1979-09-26 Avalanche photodiode Granted JPS5646570A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP12353079A JPS5646570A (en) 1979-09-26 1979-09-26 Avalanche photodiode
US06/187,744 US4383266A (en) 1979-09-26 1980-09-16 Avalanche photo diode
GB8031240A GB2060257B (en) 1979-09-26 1980-09-26 Guard rings for avalanche photo diodes

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12353079A JPS5646570A (en) 1979-09-26 1979-09-26 Avalanche photodiode

Publications (2)

Publication Number Publication Date
JPS5646570A JPS5646570A (en) 1981-04-27
JPS6138871B2 true JPS6138871B2 (en) 1986-09-01

Family

ID=14862884

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12353079A Granted JPS5646570A (en) 1979-09-26 1979-09-26 Avalanche photodiode

Country Status (1)

Country Link
JP (1) JPS5646570A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57190370A (en) * 1981-05-18 1982-11-22 Fujitsu Ltd Semiconductor light receiving element
US5098851A (en) * 1989-02-10 1992-03-24 Hitachi, Ltd. Fabricating a semiconductor photodetector by annealing to smooth the PN junction

Also Published As

Publication number Publication date
JPS5646570A (en) 1981-04-27

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