JPS6138907B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a defect detection system that can stably and accurately determine the presence or absence of a defect on the surface of an inspection object by processing an image signal obtained by imaging the inspection object with a television camera or the like. This relates to a detection device. Generally, when automatically detecting defects in industrial products such as tablets, the image signal obtained by imaging the object to be inspected with an imaging device such as a television camera is compared with an appropriate threshold level. Defects on the surface of the object to be inspected are determined by binarizing and processing the binarized signal.For the above-mentioned binarization, fixed level method and floating level method have been known. . In the fixed level method, for example, as shown in Figure 1, the comparator circuit COMP ₁
In this case, the reference voltage se of the power supply SE and the imaging signal vid are compared, and the comparison signal sig ₁ becomes a binary signal.Since the reference voltage se is fixed, the amplitude of the imaging signal varies depending on the subject. If it fluctuates due to a change in the amount of reflected light, etc., it becomes difficult to perform binarization accurately.
Furthermore, in the floating level method, as shown in FIG. 2, for example, the image signal vid is passed through a delay/attenuation circuit DAT, and a signal vid' is compared with a comparison circuit COMP _2.
Since the signal vid' changes in accordance with the imaging signal vid, as shown by the broken line in FIG. 3A, for example, even if the amplitude of the imaging signal vid fluctuates, The defect signal s ₁ can be binarized as shown in . However, with the floating level method, it is possible to binarize only the defect signal _s1 that contains a high frequency component with a relatively large amplitude, as shown in FIG. 4A, for example. In the case of an imaging signal having a defect signal s ₂ containing a low frequency component with a small amplitude as shown by the solid line, the defect signal s ₂ cannot be binarized as shown in FIG. This means that defects such as dirt with a small contrast ratio attached to the surface of the object to be inspected cannot be discriminated. As described above, conventional binarization circuits cannot binarize defect signals with high accuracy, and therefore devices that use such binarization circuits to detect defects have been unable to achieve sufficient detection accuracy.

The present invention has improved on such conventional drawbacks, and its purpose is to accurately binarize even minute defect signals contained in imaging signals and to accurately detect the presence or absence of defects on the surface of an object to be inspected. There is a particular thing. This will be explained in detail below.

Generally, when detecting defects in tablets, etc., a product is considered defective no matter how small a flaw or stain there is, so high detection accuracy is desired. The location of defects and the number of defects are not strictly necessary;
If there is a defect in any part, the product is considered to be defective. In addition, objects that generally do not have shading or extreme unevenness on their surfaces, such as aluminum foil or tablets,
For example, as shown in FIG. 5, if the object P is placed on a background GD that can be optically distinguished from it, and its surface is uniformly illuminated with light sources LP ₁ and LP ₂ , an imaging device such as a television camera TV The image signal obtained by imaging with
For example, as shown by the solid line a in FIG. 6A, the area corresponding to the object shows a monotonous increase and a monotonous decrease. That is, the differential coefficient of the imaging signal level with respect to time becomes zero only once in one horizontal scanning period of the imaging device for the object region. However, if there are scratches, dirt, etc. on the surface of the object, the differential coefficient becomes zero multiple times. The present invention has been made based on such a premise and principle.

FIG. 7 is a block diagram of the main parts of a defect detection device implementing the present invention, where TV is a television camera;
AMP ₁ to _{AMP 4} are operational amplifiers, AMP ₅ is an amplifier,
COMP ₃ to _{COMP 5} are comparison circuits, CONT is a reset signal generation circuit, DET is a pulse number detection circuit, Q ₁ ,
Q ₂ and Q ₃ are transistors such as field effect transistors, C ₁ and C ₂ are capacitors, D ₁ and D ₂ are diodes, and R ₁ to R ₁₃ are resistors. In the figure, operational amplifiers AMP ₁ , AMP ₂ , diode D ₁ , capacitor C ₁ , and transistor Q ₁ constitute a maximum value holding circuit, which starts operating when transistor Q ₁ is in the OFF state and controls the television camera TV. The maximum level of the imaging signal over a certain period of time in the past is output to the comparison circuit COMP ₄ , and the comparison circuit COMP ₄ binarizes the imaging signal using the maximum level as a threshold. On the other hand, the operational amplifiers AMP ₃ , AMP ₄ , the diode D ₂ , the capacitor C ₂ and the transistors Q ₂ , Q ₃ constitute a minimum value holding circuit, which starts operating when the transistors Q ₂ , Q ₃ are off, and controls the image signal. The minimum level for a certain period in the past is output to the comparator circuit COMP ₅ , and the comparator circuit COMP ₅ binarizes the image signal using the minimum level as a threshold. Further, the reset signal generating circuit CONT controls the conduction of the transistors _Q1 to _Q3 to control the starting point of the maximum value holding operation and the minimum value holding operation of both circuits, and the pulse number detection circuit DET controls the start point of the maximum value holding operation and minimum value holding operation of both circuits. Comparison circuit COMP ₄ ,
This device counts the number of pulses in the binary signal of COMP ₅ , determines the presence or absence of a defect based on the count, and outputs a defect identification signal. It is activated at the rising edge of the output signal of the detecting comparison circuit _COMP3 , and reset at the falling edge.

For example, when an object with no defects is imaged by a television camera under the imaging conditions shown in FIG. 5, the imaging signal of the object becomes a signal as shown by the solid line a in FIG. 6A, for example. As already mentioned,
The image signal is simply multiplied by μ according to the amplification factor μ in the amplifier AMP ₅ , and level-shifted so that the level shown by the solid line b in FIG. ₁ , AMP ₃
and is input to the comparison circuit COMP ₃ . comparison circuit
COMP ₃ compares the image signal a and the ground level b, sets its output to "1" while the image signal a is higher than the ground level b, and generates an object detection signal c, for example, as shown in figure B. , At the rising edge of this signal c, the reset signal generation circuit CONT and the pulse number detection circuit DET are activated. When the reset signal generating circuit CONT is activated, it first turns off the transistor _Q1 via the signal line line and activates the maximum value holding circuit. As a result, the operational amplifier AMP ₂ outputs a maximum value holding signal d as shown, for example, by the broken line d in _FIG . While the signal a is greater than the maximum value holding signal d, its output is set to "1" and a binary signal e as shown in FIG.

The reset signal generation circuit CONT generates a binary signal e
and the object detection signal c, form a control signal f that rises in synchronization with the fall of the first pulse signal of the comparison circuit COMP ₄ , as shown in FIG.
This signal f turns off transistors Q ₂ and Q ₃ and activates the minimum value holding circuit. As a result, the operational amplifier AMP ₄ outputs a minimum value holding signal g as shown, for example, by the dashed line g in FIG.
COMP ₅ compares this minimum value holding signal g and the image signal a, and sets its output to "1" while the image signal a is larger than the minimum value holding signal g, for example, as shown in FIG. Pulse number detection circuit for value signal h
Output to DET. In this case, since no defect signal is included and the differential coefficient of the imaging signal a with respect to time becomes zero only once, the binary signal h is always "0".

In this way, when there is no defect on the surface of the object to be inspected, one pulse of a binary signal is output from the comparator COMP ₄ during the period when the object detection signal c is "1", and No pulse is output from the comparison circuit _COMP5 . Therefore, for example, during the period when the object detection signal c is "1", the comparison circuit
Count the output pulses of COMP ₄ and COMP ₅ ,
When the count content is 1 pulse for comparator circuit COMP ₄ and zero pulse for comparator circuit COMP ₅ , the defect determination signal i is set to logic "0" indicating no defect, and when other pulse numbers are counted, defect is detected. If the pulse number detection circuit DET is configured to set the discrimination signal i to logic "1" indicating the presence of a defect, the presence or absence of a defect can be identified from the defect discrimination signal i.

FIGS. 8 to 10 show the waveforms of each part of the apparatus shown in FIG. 7 when there is a defect on the surface of the object to be inspected, and when the waveforms include different defect signals, respectively. The figure shows the case of a defective signal containing high frequency components with relatively large amplitude.
The defect signal _s3 is binarized by the maximum value holding signal d, and the output signal e of the comparator circuit _COMP4 is 2 pulses,
It is determined that there is a defect when the output signal h of the comparison circuit COMP ₅ becomes one pulse. Figure 9 shows the case of a defective signal containing a low frequency component with a small amplitude, which is generally difficult to binarize using a conventional floating level binarization circuit. A defect is detected by the signal d and the minimum value holding signal g, and the output e of the comparator circuit COMP ₄ is 2 pulses, and the output h of the comparator circuit COMP ₅ is 1 pulse.
It is determined that there is a defect because it becomes a pulse. FIG. 10 shows the case of yet another defective signal,
In this case, the output e of comparator circuit COMP ₄ is
is one pulse, but the presence of a defect is detected by the minimum value holding signal g, and the output h of the comparator circuit _COMP5 becomes two pulses, so it is determined that there is a defect as well.

As described above, in the present invention, since the image signal is binarized using the maximum value holding signal d and the minimum value holding signal g of the image signal a as threshold values,
Binarization is possible without being affected by amplitude fluctuations of the image signal a, and when the maximum and minimum values are held, the maximum and minimum value holding signals d and g are pure direct currents that maintain almost constant levels. Therefore, even if a defect signal has a very low frequency and a small amplitude, it can be detected as a defect if there is a slight potential difference with the holding signal.

As is clear from the explanations in FIGS. 8 to 10, when there is a defect on the surface of the object to be inspected, a pulse always appears at the output of the comparator circuit COMP _{5 .} Defects can be determined using only the output signal h. That is,
When the pulse number detection circuit DET detects that at least one pulse is output from the comparison circuit COMP ₅ during the period when the object detection signal c is "1",
It is also possible to configure it so that it is determined that there is a defect. In addition, in the above explanation, the operation of this embodiment was explained only for a part of the image pickup signal a, that is, one scanning line signal, but the same operation is performed for all scanning lines obtained over the entire area of the object to be inspected. This is to detect the presence or absence of defects on the entire surface of the object to be inspected.

As explained above, the present invention involves binarizing the imaging signal using a maximum value holding signal and a minimum value holding signal of the imaging signal as threshold levels, and counting the number of pulses included in the binarized signal. This detects the presence or absence of defects on the surface of the object to be inspected, and since even minute defect signals can be sufficiently binarized, highly accurate defect detection is possible.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram of a binarization circuit in a conventional fixed level system, Figure 2 is a circuit diagram of a binarization circuit in a conventional floating level system, and Figures 3 and 4 are its operation. An explanatory diagram, FIG. 5 is a diagram showing an example of the configuration of the illumination system in the present invention, and FIG. 7 is a block diagram showing an example of a defect detection device implementing the present invention, from FIGS. 6 and 8. The figures up to FIG. 10 are explanatory diagrams of the operation. AMP ₁ to _{AMP 4} are operational amplifiers, COMP ₁ to _{COMP 5}
is a comparison circuit, TV is a television camera, CONT is a reset signal generation circuit, DET is a pulse number detection circuit,
D ₁ and D ₂ are diodes, Q ₁ to _{Q 3} are transistors,
C ₁ and C ₂ are capacitors, and R ₁ to _{R 13} are resistors.

Claims (1)

[Claims] 1. In a defect detection device that detects the presence or absence of a defect on the surface of the object to be inspected by processing an image signal obtained by imaging the object to be inspected with an imaging device, when the surface of the object to be inspected is free of defects; an illumination system that illuminates the object to be inspected such that a differential coefficient with respect to time of the image signal region representing the object to be inspected becomes zero only once; and a maximum level of the image signal region representing the object to be inspected is maintained. a maximum value holding circuit; a first comparison circuit that compares and binarizes the output signal of the maximum value holding circuit with the imaging signal; A minimum value holding circuit that starts an operation of holding the minimum level of the image pickup signal, and a second comparison circuit that compares the output signal of the minimum value holding circuit and the image pickup signal and binarizes the image signal, and Defect detection characterized in that the object to be inspected is determined to have a defect when a pulse signal of one or more pulses is output from at least the second comparison circuit within a period of the imaging signal representing the object. Device.