JPS6143872B2 - - Google Patents
Info
- Publication number
- JPS6143872B2 JPS6143872B2 JP55054963A JP5496380A JPS6143872B2 JP S6143872 B2 JPS6143872 B2 JP S6143872B2 JP 55054963 A JP55054963 A JP 55054963A JP 5496380 A JP5496380 A JP 5496380A JP S6143872 B2 JPS6143872 B2 JP S6143872B2
- Authority
- JP
- Japan
- Prior art keywords
- type
- layer
- diffusion prevention
- film
- diffusion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F10/00—Individual photovoltaic cells, e.g. solar cells
- H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
- H10F10/17—Photovoltaic cells having only PIN junction potential barriers
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/548—Amorphous silicon PV cells
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- Photovoltaic Devices (AREA)
Description
【発明の詳細な説明】
本発明はシリコン化合物雰囲気中でのガス反応
により積層されたP型及びI型(真性型)の非晶
質半導体層を有する光起電力装置に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a photovoltaic device having P-type and I-type (intrinsic type) amorphous semiconductor layers stacked by a gas reaction in a silicon compound atmosphere.
第1図は従来のこの種装置を示し、1は透明な
ガラス基板、2は該基板上に被着された、インジ
ウム・錫酸化膜などからなる透明な第1電極膜、
3,4及び5は夫々該膜上に順次積層されたP
型、I型(真性型)及びN+型の各非晶質シリコ
ン(以下a−Siと称す)層で、これら各層は、P
型やN+型の場合デボラン(B2H6)やホスフイン
(PH3)等の適当な導電型決定不純物ガスを含むシ
リコン化合物ガスであるシラン(SiH4)雰囲気中
で、又I型の場合上記不純物ガスを含まないシラ
ン雰囲気中で夫々グロー放電をなすことにより形
成される。6はN+型a−Si層5を介してI型a
−Si層4とオーミツク接触するアルミニウム膜な
どからなる第2電極膜である。 FIG. 1 shows a conventional device of this type, in which 1 is a transparent glass substrate, 2 is a transparent first electrode film made of indium/tin oxide film, etc., deposited on the substrate;
3, 4 and 5 are P layers stacked sequentially on the film, respectively.
type, I type (intrinsic type), and N + type amorphous silicon (hereinafter referred to as a-Si) layers, each of which is composed of P
In the case of type I or N + type, in an atmosphere of silane (SiH 4 ), which is a silicon compound gas containing an appropriate conductivity type determining impurity gas such as deborane (B 2 H 6 ) or phosphine (PH 3 ), or in the case of I type. They are formed by glow discharge in a silane atmosphere that does not contain the impurity gas. 6 is I type a via N + type a-Si layer 5
- A second electrode film made of an aluminum film or the like that is in ohmic contact with the Si layer 4.
上記装置において、基板1側から光入射がある
と、主にI型a−Si層4で自由状態のキヤリアが
発生し、これらが第1、第2電極膜2,6に集め
られて、光電流として取り出される。そしてその
出力特性は装置の直列抵抗が小さいほど良好であ
る。 In the above device, when light is incident from the substrate 1 side, carriers in a free state are generated mainly in the I-type a-Si layer 4, and these carriers are collected on the first and second electrode films 2 and 6, and the light is emitted. extracted as electric current. The output characteristics are better as the series resistance of the device is smaller.
然るに本発明者は斯る装置にあつてはP型a−
Si層3とI型a−Si層4との間に上記直列抵抗の
増大をもたらす高抵抗層が発生することを発見
し、その原因はI型a−Si層4形成時に既に形成
されているP型a−Si層3からP型不純物が若干
I型a−Si層4内に拡散し、よつて該層のP型a
−Si層3との境界附近に弱いP型層が生じること
によるものであるとの結論を得た。この様な弱い
P型層が高抵抗となるのは上述の如くシリコン化
合物を原料ガスとして得られたa−Siの特徴であ
り、それを第2図に示す。即ち、同図には横軸は
シラン(SiH4)と不純物B2H6又はPH3)のガス体積
比率を、又縦軸はa−Siの導電率を示すものであ
り、I型a−Siでの導電率(上記ガス体積比率
10-6以下の場合に相当)に対し、N型の場合には
ガス体積比率が増大するに従い導電率は大きくな
るが、P型の場合にはガス体積比率5×10-5附近
で一旦導電率が極小となる。上記ガス体積比率は
形成されたa−Siの不純物濃度にほぼ比例するか
ら、結局P型a−Si層3からI型4に不純物拡散
が起つてI型a−Si層4のP型a−Si層3との境
界附近に弱いP型層ができると、その部分に上記
導電率極小の層領域が形成されるのである。 However, the present inventor has proposed that the P-type a-
It was discovered that a high resistance layer that causes the increase in series resistance is generated between the Si layer 3 and the I-type a-Si layer 4, and the reason for this is that it has already been formed when the I-type a-Si layer 4 is formed. Some P-type impurity diffuses from the P-type a-Si layer 3 into the I-type a-Si layer 4, so that the P-type a-Si layer
It was concluded that this is due to the formation of a weak P-type layer near the boundary with the -Si layer 3. The high resistance of such a weak P-type layer is a characteristic of a-Si obtained using a silicon compound as a raw material gas, as described above, and this is shown in FIG. That is, in the same figure, the horizontal axis shows the gas volume ratio of silane (SiH 4 ) and impurity B 2 H 6 or PH 3 ), and the vertical axis shows the conductivity of a-Si. Electrical conductivity in Si (gas volume ratio above)
10 -6 or less), in the case of N type, the conductivity increases as the gas volume ratio increases, but in the case of P type, the conductivity increases once the gas volume ratio is around 5 × 10 -5 . rate becomes minimal. Since the above gas volume ratio is approximately proportional to the impurity concentration of the formed a-Si, impurity diffusion occurs from the P-type a-Si layer 3 to the I-type 4 and the P-type a- When a weak P-type layer is formed near the boundary with the Si layer 3, the above-mentioned layer region of minimal conductivity is formed in that portion.
本発明は上記の点に鑑みてなされたもので第3
図の実施例に示す如く、P型a−Si層3とI型a
−Si層4との間に拡散防止層7を設けたことを特
徴とするものである。尚第3図にて第1図と同一
部分には同一番号が付されている。即ち拡散防止
層7の存在によりP型a−Si層3からI型a−Si
層4への不純物拡散が妨げられ、従つてI型a―
Si層4内に従来の如き高抵抗層が発生しない。 The present invention has been made in view of the above points.
As shown in the example in the figure, P type a-Si layer 3 and I type a
- A diffusion prevention layer 7 is provided between the silicon layer 4 and the silicon layer 4. In FIG. 3, the same parts as in FIG. 1 are given the same numbers. That is, due to the presence of the diffusion prevention layer 7, the P-type a-Si layer 3 is transferred from the I-type a-Si layer 3.
Impurity diffusion into layer 4 is prevented and therefore type I a-
A high resistance layer as in the conventional case does not occur in the Si layer 4.
上記拡散防止層7としては光透過性及び導電電
性共に良好な薄膜が良く、例えば10〜40Å厚さの
白金やサーメツト(例えば白金サーメツトが好適
である。尚この程度の厚さの金属薄膜であれば、
それがP型a−Si層3とI型a−Si層4との間に
介在してもこれら両層間の接合形成に影響はな
い。 The diffusion prevention layer 7 is preferably a thin film with good light transmittance and electrical conductivity, such as platinum or cermet (for example, platinum cermet) with a thickness of 10 to 40 Å. if there is,
Even if it is interposed between the P-type a-Si layer 3 and the I-type a-Si layer 4, it does not affect the formation of a bond between these two layers.
第4図は上記白金を拡散防止層7として用いた
ときの光電変換効率と膜厚との関係を示してお
り、上述の如く膜厚10〜40Å程度の範囲であれば
シヨツトキ障壁を形成する可能性を持つ白金であ
つても拡散防止層7のない、即ちこの第4図にお
いて白金の膜厚がゼロのとき光起電力装置に較べ
高い光電変換効率が得られている。尚、P型a−
Si層3としてはB2H6/SiH4=0.3%のものが使用
された。このことから、白金を拡散防止層7とし
て用いたとしても、膜厚を10〜40Å程度の厚さと
すればP型a−Si層3とI型a−Si層4との接合
形成に何ら悪影響を及ぼさないことが判る。 Figure 4 shows the relationship between photoelectric conversion efficiency and film thickness when platinum is used as the diffusion prevention layer 7, and as mentioned above, a shot barrier can be formed if the film thickness is in the range of about 10 to 40 Å. Even though platinum has a property, when there is no diffusion prevention layer 7, that is, when the platinum film thickness is zero in FIG. 4, a higher photoelectric conversion efficiency is obtained than in a photovoltaic device. In addition, P type a-
As the Si layer 3, B 2 H 6 /SiH 4 =0.3% was used. From this, even if platinum is used as the diffusion prevention layer 7, if the film thickness is approximately 10 to 40 Å, there will be no adverse effect on the bond formation between the P-type a-Si layer 3 and the I-type a-Si layer 4. It turns out that there is no effect on
拡散防止層7の更に他の例として、N型の低不
純物濃度のa−Si層を用いることもできる。即
ち、a−Si層3から拡散して来る不純物を上記拡
散防止層7としてN型a−Si層で補償するのであ
る。従つて、拡散防止層7としてのN型a−Si層
はP型a−Si層3から拡散して来る不純物を補償
するためのものであり、P型a−Si層3とI型a
−Si層4との両層間の接合形成に悪影響を与える
ことのない程度にN型の不純物濃度が選択されて
いるのは当然である。斯る拡散防止層7として作
用するN型のa−Si層の不純物濃度は、例えば第
2図に不純物ガスとシラン(SiH4)ガスとのガス
体積比率と導電率(σRT)との関係において、
N型不純物ガスであるPH3をSiH4に対して10-6程
度ドープしても、PH3をドープしない領域(ノン
ドープ領域)のσRTとほとんど同一であり、
10-6程度PH3をドープした拡散防止膜7にP型a
−Si層3からP型不純物が拡散して来ても、斯る
拡散防止膜7の不純物濃度はノンドープな領域に
近づく方向に移動するだけであるので、拡散して
来る不純物をσRTを高抵抗領域にすることなく
補償することができる。 As yet another example of the diffusion prevention layer 7, an N-type a-Si layer with a low impurity concentration can also be used. That is, the impurities diffused from the a-Si layer 3 are compensated by the N-type a-Si layer as the diffusion prevention layer 7. Therefore, the N-type a-Si layer as the diffusion prevention layer 7 is for compensating the impurities diffused from the P-type a-Si layer 3, and the P-type a-Si layer 3 and I-type a-Si layer
It goes without saying that the N-type impurity concentration is selected to an extent that does not adversely affect the formation of a bond between the two layers with the -Si layer 4. The impurity concentration of the N-type a-Si layer that acts as such a diffusion prevention layer 7 is shown in FIG. ,
Even if SiH 4 is doped with PH 3 , an N-type impurity gas, by about 10 -6 , the σRT of the region without PH 3 doping (non-doped region) is almost the same.
P-type a is added to the diffusion prevention film 7 doped with about 10 -6 PH 3 .
- Even if P-type impurities diffuse from the Si layer 3, the impurity concentration in the diffusion prevention film 7 only moves in the direction approaching the non-doped region, so the diffused impurities are absorbed by the σRT with high resistance. It can be compensated without making it into the area.
この様なガス体積比率にして10-6程度N型不純
物がドープされた拡散防止膜7と光電変換効率と
の関係が第5図に示されている。この第5図の測
定についても第4図と同様P型a−Si層3として
はB2H6/SiH4=0.3%のものが使用された。 FIG. 5 shows the relationship between the diffusion prevention film 7 doped with N-type impurities at a gas volume ratio of about 10 -6 and the photoelectric conversion efficiency. In the measurement shown in FIG. 5, as in FIG. 4, the P-type a-Si layer 3 containing B 2 H 6 /SiH 4 =0.3% was used.
上記実施例ではP型a−Si層3形成後にI型a
−Si層4に設ける際の拡散を防止する場合を述べ
たが、逆の場合、即ちステンレスやその他の導電
性基板上に先ずI型a−Si層を形成し、その後P
型a−Si層を形成する場合でも上記I型a−Si層
とP型a−Si層との界面に設けられる拡散防止膜
7が有効に働くことはもちろんである。従つて、
本発明は第3図に示された実施例の如く透明な第
1電極膜2上に順次P型、I型及びN型を積層し
たものに限定されるものではない。 In the above embodiment, after forming the P type a-Si layer 3, the I type a
- Although we have described the case of preventing diffusion when forming the Si layer 4, in the opposite case, that is, first forming an I-type a-Si layer on a stainless steel or other conductive substrate, and then
Of course, even when forming a type a-Si layer, the diffusion prevention film 7 provided at the interface between the I-type a-Si layer and the P-type a-Si layer works effectively. Therefore,
The present invention is not limited to the embodiment shown in FIG. 3 in which P-type, I-type, and N-type layers are sequentially laminated on the transparent first electrode film 2.
以上の説明から明らかな如く、本発明によれば
シラン雰囲気中でのガス反応により積層されたP
型及びI型の非晶質半導体層を有する光起電力装
置において、P型層からI型層への不純物拡散に
よる不所望な高抵抗層が発生しないので、装置に
直列抵抗が減少し出力特性が改善される。 As is clear from the above explanation, according to the present invention, P is laminated by gas reaction in a silane atmosphere.
In photovoltaic devices having amorphous semiconductor layers of type I and type I, an undesirable high resistance layer due to impurity diffusion from the p type layer to the i type layer is not generated, so the series resistance of the device is reduced and the output characteristics are improved. is improved.
第1図は従来例を示す側面図、、第2図は導電
率特性図、第3図は本発明実施例を示す側面図、
第4図は本発明の拡散防止膜として白金を用いた
ときの光電変換効率と膜厚との関係を示す特性
図、第5図は本発明の拡散防止膜としてN型a−
Si層を用いたときの光電変換効率と膜厚との関係
を示す特性図、である。
3……P型a−Si層、4……I型a−Si層、7
……拡散防止膜。
FIG. 1 is a side view showing a conventional example, FIG. 2 is a conductivity characteristic diagram, and FIG. 3 is a side view showing an embodiment of the present invention.
Figure 4 is a characteristic diagram showing the relationship between photoelectric conversion efficiency and film thickness when platinum is used as the diffusion prevention film of the present invention, and Figure 5 is an N-type a-
FIG. 3 is a characteristic diagram showing the relationship between photoelectric conversion efficiency and film thickness when using a Si layer. 3...P type a-Si layer, 4...I type a-Si layer, 7
...Anti-diffusion film.
Claims (1)
積層されたP型及びI型(真性型)の非晶質半導
体層を有する光起電力装置において、上記両層間
に両層の接合形成に悪影響を与えることなくP型
決定不純物の拡散を防止する拡散防止装置を介在
させたことを特徴とする光起電力装置。1. In a photovoltaic device having P-type and I-type (intrinsic type) amorphous semiconductor layers stacked by gas reaction in a silicon compound atmosphere, adversely affecting the formation of a bond between the two layers. 1. A photovoltaic device characterized in that a diffusion prevention device is interposed to prevent diffusion of P-type impurities.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55054963A JPS5743477A (en) | 1980-04-24 | 1980-04-24 | Photovoltaic device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55054963A JPS5743477A (en) | 1980-04-24 | 1980-04-24 | Photovoltaic device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5743477A JPS5743477A (en) | 1982-03-11 |
| JPS6143872B2 true JPS6143872B2 (en) | 1986-09-30 |
Family
ID=12985311
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55054963A Granted JPS5743477A (en) | 1980-04-24 | 1980-04-24 | Photovoltaic device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5743477A (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4692558A (en) * | 1983-05-11 | 1987-09-08 | Chronar Corporation | Counteraction of semiconductor impurity effects |
| JPS6249672A (en) * | 1985-08-29 | 1987-03-04 | Sumitomo Electric Ind Ltd | Amorphous photovoltaic device |
| JPS6260271A (en) * | 1985-09-10 | 1987-03-16 | Sanyo Electric Co Ltd | Photovoltaic device |
| JPS62165374A (en) * | 1986-01-16 | 1987-07-21 | Sumitomo Electric Ind Ltd | Amorphous photovoltaic device |
| CN101939844B (en) * | 2008-02-06 | 2012-07-18 | 京瓷株式会社 | Manufacturing method of solar cell element and solar cell element |
| FR2996059B1 (en) * | 2012-09-24 | 2015-06-26 | Commissariat Energie Atomique | PROCESS FOR PRODUCING A HETEROJUNCTION PHOTOVOLTAIC CELL AND PHOTOVOLTAIC CELL THUS OBTAINED |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS52101990A (en) * | 1976-02-21 | 1977-08-26 | Hitachi Ltd | Semiconductor device for photoelectric transducer and its manufacture |
| JPS5486266A (en) * | 1977-12-21 | 1979-07-09 | Fujitsu Ltd | Manufacture of multiple semiconductor element |
| US4162505A (en) * | 1978-04-24 | 1979-07-24 | Rca Corporation | Inverted amorphous silicon solar cell utilizing cermet layers |
| JPS54151373A (en) * | 1978-05-19 | 1979-11-28 | Matsushita Electric Ind Co Ltd | Gas phase growth method |
| JPS5670675A (en) * | 1979-11-13 | 1981-06-12 | Shunpei Yamazaki | Manufacture of photoelectric converter |
-
1980
- 1980-04-24 JP JP55054963A patent/JPS5743477A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5743477A (en) | 1982-03-11 |
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