JPS6145902B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a noise reduction circuit used, for example, in a compander system that extends the dynamic range of a tape recorder.

A conventional example of such a noise reduction circuit is shown in FIG. The circuit shown in FIG. 1 is used on the encoding side of the noise reduction system, and input signals such as audio signals supplied to the input terminal 1 are encoded by the encoder circuit 10, which is a noise reduction circuit. The encoded output signal is sent to an output terminal 2, and the encoded output signal is sent to, for example, a tape recorder. The encoder circuit 10 includes a high-pass filter 3 for pre-emphasis (high frequency enhancement) connected to an input terminal 1, a variable gain amplifier 4 inserted and connected between the high-pass filter 3 and the output terminal 2, and a variable gain amplifier 4 connected to the input terminal 1. The control circuit 5 includes a control circuit 5 that sends a signal detected from the output of the amplifier 4 as a control signal to a control terminal of the variable gain amplifier 4. Further, the variable gain amplifier 4 includes, for example, an operational amplifier 6, an input resistor 7, a negative feedback resistor 8, and a variable resistance element 9 connected in parallel to the negative feedback resistor 8. This variable resistance element 9 is
The resistance value changes according to a control signal from the control circuit 5, the amount of negative feedback changes, and the gain of the amplifier 4 changes.

In this encoder circuit 10, an input signal such as an audio signal has its high frequency emphasized in a high pass filter 3, and is sent to a variable gain amplifier 4. The gain of the variable gain amplifier 4 is controlled by controlling the resistance value of the variable resistance element 9 according to a control signal from the control circuit 5, and the higher the input level, the more the negative feedback circuit increases. The resistance value of the variable resistance element 9 decreases, and the gain decreases. Therefore, the level of the output is compressed relative to the input. Negative feedback resistor 8 of this variable gain amplifier 4
acts to suppress the upper limit of the resistance value of the negative feedback circuit and controls the maximum gain of the variable gain amplifier 4 when the input level becomes extremely low and the resistance value of the variable resistance element 9 becomes extremely large.

However, in this encoder circuit 10, since the input of the variable gain amplifier 4 is the output of the high-pass filter 3 for pre-emphasis, the input level of the variable gain amplifier 4 has frequency characteristics.
As the level decreases in the lower range, the input/output characteristics of the encoder circuit 10, as shown in FIG. 2, have a characteristic curve at the time of a small level input that differs depending on the frequency. In other words, the variable gain amplifier 4 itself has a limited gain that remains unchanged below a certain input level at any frequency, and has no frequency characteristics, but the high-pass filter 3 for pre-emphasis has a gain (or This is because the input level of the input terminal 1 when the gain of the variable gain amplifier 4 remains unchanged differs depending on the frequency since the attenuation rate and transmission rate differ. Even when the high-pass filter 3 for pre-emphasis is connected to the output terminal 2 side, the input and output will have almost the same frequency characteristics. Furthermore, when level expansion and de-emphasis are performed on the decoder side, the input and output shown in FIG. 2 are reversed.

When using a noise reduction circuit with input/output characteristics having frequency characteristics as shown in Fig. 2, if the encoder circuit output level and the encoder circuit input level are slightly different, for example, the recording input level and playback in a tape recorder may differ. When a deviation occurs between output levels, level fluctuations occur in the decoder output depending on the frequency. For example, when encoding the input level at point a in Figure 2,
For example, a 10 kHz signal corresponds to an input/output characteristic with a compression ratio of 2 and has an output level at point b, whereas a 100 Hz signal has an output level of variable gain amplifier 4.
The compression ratio at which the gain remains unchanged corresponds to the input/output characteristic of 1 and becomes the output level at point c. At this time, if, for example, a level drop occurs in the signal transmission system such as a tape recorder connected to the output terminal 2 of the encoder circuit 10, points b and c will be at the level of points b' and c', respectively. The signal is then sent to a decoder circuit (not shown). This decoder circuit is the encoder circuit 1 described above.
It has an input/output characteristic opposite to 0, and the input level and output level in Figure 2 are interchanged, so the level at point b' in Figure 2 is decoded to the level at point d. and point c' is output according to the level of point e. For example, when the compression ratio is 2, the point
The level difference between points ad is twice the level difference between points ae (in dB). When the level of the encoded input signal changes near point a, the level change of the decoded output signal is twice as different between 10 kHz and 100 Hz, making it impossible to perform good reproduction. Therefore, the range of encode input levels that can actually be used is above the level at which the gain of the low frequency (for example, 100 Hz) signal shown in FIG. 2 remains unchanged, and the dynamic range becomes narrow.

The present invention has been made to eliminate such conventional drawbacks, and is to provide the variable gain amplifier itself with frequency characteristics that cancel out the influence of the frequency characteristics of the pre-emphasis and de-emphasis filters at low level inputs. The purpose of the present invention is to provide a noise reduction circuit that can perform good encoding and decoding over the entire frequency range even when inputting a low level, and can widen the dynamic range.

Hereinafter, a noise reduction circuit according to the present invention will be explained with reference to the drawings.

FIG. 3 is a block circuit diagram showing the basic structure of the present invention, and shows an example of the structure of an encoder circuit 20 used, for example, on the recording input side of a tape recorder. In FIG. 3, a high-pass filter 13 for pre-emphasis and a gain control amplifier 1 are connected between the input terminal 11 and the output terminal 12.
4 are inserted and connected in series. Regarding the placement relationship between these high-pass filters 13 and gain control amplifiers 14, in the third example, the high-pass filters 13 are placed on the input terminal 11 side and the variable gain amplifier 14 is placed on the output terminal 12 side. They may be placed interchangeably. Next, a part of the output of the variable gain amplifier 14 is sent to a control terminal 16 of the variable gain amplifier 14 via a control circuit 15. The variable gain amplifier 14 performs a level compression operation, and the gain of the variable gain amplifier 14 decreases as the input level increases. Furthermore, the gain increases as the input level decreases, but when the input level becomes extremely low, the gain is limited to a certain level and does not increase any further. This variable gain amplifier 14 is a voltage controlled amplifier (Voltage control type amplifier).
Controlled Amp.Hereafter referred to as VCA. ) 16 and an adder 1 inserted and connected to the input side of this VCA 16.
7, and a high-pass filter 18 that sends a part of the output of the VCA 16 to the adder 17 as a subtraction signal. This high pass filter 18
has the same frequency characteristic as, for example, the high-pass filter 13 for pre-emphasis, and corrects the frequency characteristic of the gain which remains unchanged when the above-mentioned small level input is made.

That is, the input of the input terminal 11 is x, the output of the output terminal 12 is y, the transfer function of the high-pass filter 13 is F ₁ , and the transfer function of the high-pass filter 18 is
When the gain of F ₂ and the VCA 16 is G, y=G(F ₁ x−F ₂ y) (1+GF ₂ )y=GF ₁ x ∴ y=GF ₁ /1+GF ₂ x . When inputting a small level, G becomes large, so the equation becomes approximately y≈F ₁ /F ₂ x, and it can be seen that when F ₁ and F ₂ are approximately equal, the output y is not affected by frequency. In addition, when inputting a high level, G
becomes smaller and becomes 1>>GF ₂ , so the equation becomes approximately y≈GF ₁ x, the influence of the high-pass filter 18 is reduced, and pre-emphasis is performed by the high-pass filter 13.

FIG. 4 shows the input/output characteristics when the frequency characteristics of the high-pass filter 18 in the encoder circuit 20 are made equal to the characteristics of the high-pass filter 13 for pre-emphasis (F ₁ =F ₂ ), and when the gain remains unchanged. The input level L is, for example,
They are almost equal in the range of 10kHz to 100Hz, and the input/output characteristic curves at low level input match at each frequency. Therefore, even if a level difference occurs between the encode output and the decode input, at least for input levels equal to or higher than this level L, good noise reduction operation can be performed without any adverse effects, and the same compression can be performed regardless of the frequency. The range of input levels that correspond to the transmission ratio is widened, and the dynamic range is expanded. Furthermore, the noise reduction effect for low frequency signals is increased.

Next, a preferred embodiment of the present invention will be described with reference to FIG. This FIG. 5 shows an encoder circuit 20 when constructing a practical noise reduction system using the basic circuit shown in FIG.
A high-pass filter 13 for pre-emphasis and a variable gain amplifier 14 are inserted and connected in series between the input and output terminals 11 and 12, and a second signal transmission circuit is connected in parallel to the first signal transmission circuit formed by these series circuits.
The outputs from these first and second signal transmission circuits are added by an adder 22 and sent to the output terminal 12. As the second signal transmission circuit 21, for example, a flat path having no frequency characteristics such as a resistor, a low pass filter that slightly attenuates high frequencies, or the like is used. this is,
The compression ratio of the encoder circuit 20 is set to 1 when the gain of the variable gain amplifier 14 decreases and the characteristics of the second signal transmission circuit 21 are strongly expressed during a large level input, and the frequency characteristics are almost flat. By doing so, wide level compression is not performed when a large level input is made, and the amount of emphasis of pre-emphasis is reduced, thereby obtaining the effect of so-called variable pre-emphasis.

When the second signal transmission circuits 21 are connected in parallel in this way, a limiter circuit 25 can be inserted and connected between the output of the variable gain amplifier 14 and the adder 22, thereby preventing transient overshoot. Adverse effects such as tape saturation can be effectively prevented. Also,
The input terminal of the control circuit 15 is connected to the variable gain amplifier 14.
, the output terminal of the limiter circuit 25 , or the output terminal of the adder 22 . This control circuit 15 may be constructed of a high-pass filter 23 for weighting and a detection smoothing circuit 24 . good.

Next, the variable gain amplifier 14 includes a high gain inverting amplifier 26 such as an operational amplifier, an input resistance 27 of the inverting amplifier 26, a variable resistance element 28 serving as a negative feedback resistance, and a variable resistance element 28 connected in parallel with the variable resistance element 28. The above-mentioned correction high-pass filter 2 connected
It consists of 9. The variable resistance element 28 is, for example,
A CdS photoconductive cell can be used, and at this time, the output from the control circuit 15 drives a light emitting element such as a light emitting diode to illuminate the CdS photoconductive cell, thereby changing the resistance value of the variable resistance element 28. be able to. When the resistance value of the variable resistance value 28 becomes large when a low level input is received, the characteristics of the high-pass filter 29 effectively act within the negative feedback circuit of the inverting amplifier 26. That is, this high-pass filter 29 cancels the frequency dependence of the encoder circuit 20 caused by the pre-emphasis high-pass filter 13 when the input level is small. Or it acts to weaken it.

Next, FIG. 6 shows a noise reduction circuit, that is, a decoder circuit 30, which is constructed symmetrically with the circuit shown in FIG. It shows. In the circuit of FIG. 6, the input signal supplied to the input terminal 31 is passed through the adder 42 to the first
The signal is sent to the output terminal 32 through a series circuit consisting of a variable gain amplifier 34, which serves as a signal transmission circuit, and a low-pass filter 33 for de-emphasis. A part of the output from the de-emphasis low-pass filter 33 is sent to the adder 42 as a subtraction signal via the second signal transmission circuit 41. As described above, this second signal transmission circuit 41 uses, for example, a flat-pass circuit such as a resistor that does not have frequency characteristics, or a low-pass filter that slightly attenuates high frequencies. A part of the output from the adder 42 is sent to a high pass filter 43 and a detection smoothing circuit 44.
The signal is converted into a control signal by a control circuit 35 and is sent to the variable gain amplifier 34. The variable gain amplifier 34 is a high gain amplifier 4 such as an operational amplifier.
A variable resistance element 47 such as a CdS photoconductive cell is used as the input resistance of 6, and a negative feedback resistor 48 and variable resistance element 4
The gain of the variable gain amplifier 34 is determined by the ratio of the resistance value to 7. In addition, a high-pass filter 49 for correcting the frequency dependence of the low-pass filter 33 for de-emphasis at the time of a small level input is connected to a variable resistance element 47 serving as the input resistance.
are connected in parallel.

The decoder circuit 30 shown in FIG. 6 performs an operation opposite to that of the encoder circuit 20 shown in FIG. When the resistance value of the resistor element 47 increases and the gain decreases, the lower limit value of the gain is limited by the high pass filter 49, and this lower limit gain is set to a frequency that cancels or weakens the frequency characteristics of the low pass filter 33 for de-emphasis. have characteristics.
Therefore, the overall gain of the decoder circuit 30 is:
The frequency dependence at low level input is weakened, and even if a level error occurs due to a decrease in tape sensitivity of the tape recorder, error in the frequency characteristic of the signal level can be prevented and normal noise reduction operation can be performed.
You can further expand your dynamic range.

Next, FIG. 7 shows another preferred embodiment of the present invention, and the basic configuration of a decoder circuit 50, which is a main part of the noise reduction circuit, is almost the same as the decoder circuit 30 of FIG. 6.

In the decoder circuit 50 shown in FIG. 7, an input from an input terminal 51 is sent via an adder 53 to a first input terminal consisting of a variable gain amplifier 54, an adder 55, and a de-emphasis low-pass filter 56 connected in series. The output from the low-pass filter 56 is sent to the signal transmission circuit, and is sent to the output terminal 52 and a resistor 57 that serves as a second signal transmission circuit.
The output from the resistor 57 serving as the second signal transmission circuit is sent as a subtraction signal to the adder 53 and subtracted from the input signal from the input terminal 51. A part of the output from the adder 53 is sent to the above-mentioned correction high-pass filter 58, and the output from this high-pass filter 58 is sent to the resistor 59 and the limiter circuit 6.
It is sent as an addition signal to the adder 55 via a parallel circuit with 0. Further, a part of the output from the correction high-pass filter 58 becomes a control signal via a control circuit consisting of a weighting high-pass filter 61, a detection circuit 62, and a smoothing circuit 63 to control the variable gain amplifier 54. being sent to the terminal. In this decoder circuit 50, the high-pass filter 58 is for correcting the frequency characteristic of the low-pass filter 56 for de-emphasis at the time of low-level input, and is preferably made to have a frequency characteristic close to the opposite of that of the low-pass filter 56. Furthermore, since the high-pass filter 61 for weighting in the control circuit has the high-pass filter 58 for correction inserted and connected in the preceding stage, the weighting characteristic of the control circuit is determined by the series connection of these high-pass filters 61 and 58. This is the overall frequency characteristic of the filter.

By inserting such a decoder circuit 50 into the negative feedback circuit of the high-gain differential amplifier 73, it is possible to obtain an encoder circuit with characteristics in which input and output are reversed.

That is, in FIG. 7, at the input terminal 71,
An input signal, such as an audio signal, to be noise reduced is provided. This input terminal 71 is connected to the positive input terminal of a high gain differential amplifier 73 such as an operational amplifier, and the output terminal of this differential amplifier 73 is connected to a tape recorder 76 or the like via an encode output terminal 72. Connected to the recording input terminal. Note that the output terminal 52 of the decoder circuit 50
is used as a decode output terminal. A common terminal (or fixed terminal) of a changeover switch 74 is connected to the negative input terminal of the differential amplifier 73, and this changeover switch 74 switches between a decoding changeover terminal d and an encoding changeover terminal e. have. Further, the output terminal of the differential amplifier 73 is connected to a decoding switching terminal d via a negative feedback resistor 75. A decode output terminal 52 of the decoder circuit 50 is connected to an encoding switching terminal e.

Now, when the changeover switch 74 is connected to the encode changeover terminal e, the decoder circuit 50 is connected as a negative feedback circuit for the high gain differential amplifier 73, as shown on the left side of FIG. .
Here, when the gain of the differential amplifier 73 is A and the transfer function of the decoder circuit 50 is B, the input terminal 71
The overall transfer function H from to the encode output terminal 72 is as follows: H=A/1+AB... When 1<<AB, H≒1/B...... This is the inverse characteristic of the decoding characteristic, i.e. Encoding characteristics are obtained.

The relationship between the input level of input terminal 71 and the output level of output terminal 72 during such an encoding operation is expressed, for example, as shown in FIG. In FIG. 8, the broken line indicates the characteristics of a conventional example, for example, one in which a resistor is used in place of the high-pass filter 58. In the characteristic shown by the broken line in Figure 8, when the input level drops to, for example, -25 dB, the gain for the 100 Hz signal remains unchanged, and at input levels below this, the compression ratio for the 100 Hz signal becomes 1. . On the other hand, when the high-pass filter 58 is used as in the embodiment of the present invention, the input level is -
The compression ratio for the 100Hz signal is 2 until it drops to 45dB.

Next, FIG. 9 shows the frequency characteristics for two signal inputs during such an encoding operation, and the solid lines A, B, and C indicate the frequency characteristics when the circuit of FIG. 7, which is an embodiment of the present invention, is used. Broken lines A', B', and C' correspond to the case where a conventional fixed pre-emphasis type encoder circuit is used, respectively. Here, 2
The signal input is a first signal with a constant frequency and a constant level, and a signal with a frequency of several tens of dB relative to this first signal.
For this second signal, the frequency is set on the horizontal axis from 100Hz to several tens of Hz.
The vertical axis shows the gain between input and output when changing up to kHz in dB. Here, the characteristic curves A and A' represent the first signal when a low frequency, small signal input, or no signal is input, and the characteristic curves B and B' represent the first signal when the first signal is in the low-mid range. Curves C and C' represent the case when the first signal is a high-frequency large signal. This ninth
As is clear from the figure, in the case of the fixed pre-emphasis method indicated by broken lines A', B', and C', the emphasis characteristics are constant regardless of the input signal. For this reason, it is not possible to increase the amount of emphasis due to the increase in noise in the low and mid range that decreases when a high frequency large signal is input. On the other hand, in the case of the embodiment of the present invention, as shown in curve B, it is possible to take a large amount of emphasis when inputting a low-mid-range small-medium level signal, and to reduce the absolute value of tape noise at the decoder output. It is possible to suppress noise modulation. Furthermore, in the region where the input becomes smaller from the small to medium level, the gain change in the low range is larger than the gain change in the high range.

Next, in the circuit shown in FIG. 7, when decoding the playback output from the tape recorder 76, the playback output terminal 77 is connected to the positive input terminal of the differential amplifier 73, and the changeover switch 74 is connected to the decoding changeover terminal. Switch and connect to d. At this time, as shown on the right side of FIG. 7, the differential amplifier 73 becomes a simple negative feedback amplification using the resistor 75 as a negative feedback resistor, and the output of this negative feedback amplification is sent to the decoder circuit 50 via the decode input terminal 51. sent and decoded.

Next, FIG. 10 shows such a decoder circuit 50.
7 shows a specific example of a circuit configuration, and parts corresponding to those in FIG. 7 are given the same reference numerals.

In FIG. 10, the adder 53 is configured by connecting the output ends of two adding resistors 53a and 53b in common.
The output terminal of is connected to the negative input terminal of the operational amplifier 54d. The input terminal of one summing resistor 53a is connected to the input terminal 51, and the input terminal of the other summing resistor 53b is connected to an operational amplifier for inverting the output of the second transmission line to obtain a subtraction signal. It is connected to the output terminal of 53c. Next, the output side of the operational amplifier 54d corresponds to the first transmission line, and includes an operational amplifier 54a, a negative feedback resistor 54b,
The variable gain amplifier 54 is configured by the variable resistance element 54c serving as an input resistance. Here, the variable resistance element 54c is the smoothing circuit 6 of the control circuit.
The resistance value changes according to the control signal from 3. For example, a configuration can be used in which a light emitting element such as a light emitting diode is driven to turn on by a control signal, and light from the light emitting element is received by a CdS photoconductive cell or the like which is a light receiving type variable resistance element. Next, the correction high-pass filter 58 is constructed by connecting a capacitor 58a and a resistor 58b in series, and grounding the output end of the resistor 58b through a resistor 58c. This output end is connected to a parallel connection circuit of a resistor 59 and a limiter circuit 60, and the output end is connected to a high pass filter 61 for weighting of the control circuit. As the anti-limiter circuit 60, a diode limiter 60a is used, which is formed by connecting two diodes in series in the forward direction and two diodes connected in series in the reverse direction in parallel.
A resistor 60b is connected to the resistor 60b. The low-pass filter 56 is obtained by connecting a high-pass filter consisting of a resistor 56a and a capacitor 56b in parallel with the negative feedback resistor 54b of the operational amplifier 54a. The output of the operational amplifier 54a is sent to the decode output terminal 52. Further, a part of the output of this operational amplifier 54a is sent to a resistor 57 which becomes the second transmission path, and the output from this resistor 57 is inverted by an operational amplifier 53c and sent to an addition resistor 53b. ,
Subtracted from the above input signal. Next, the output from the high-pass filter 58 for correction is sent to a high-pass filter 61 for weighting in the control circuit.
I am sending it to As this high-pass filter 61, a series circuit of a capacitor 61a and a resistor 61b and a series circuit of a capacitor 61c and a resistor 61d are connected in parallel. The overall frequency characteristic of the low-pass filter 56 is approximately equal to the frequency characteristic of the high-pass filter in the negative feedback circuit of the operational amplifier 54a. The output from this high-pass filter 61 is amplified by an operational amplifier 61f, and a detection circuit 6
2. It becomes a control signal via the smoothing circuit 63.

As is clear from the above description, the noise reduction circuit according to the present invention includes an emphasis filter circuit, a variable gain amplifier whose gain changes according to a control signal, and an input or output signal of the variable gain amplifier. The variable gain amplifier has a control circuit that detects the output and uses it as a control signal, the gain of the variable gain amplifier remains unchanged when the input signal is at a small level, and the gain of the noise reduction circuit when the gain remains unchanged is the same as that of the emphasis filter. The present invention is characterized in that the variable gain amplifier is provided with a correction filter circuit for correcting differences depending on the frequency depending on the circuit.

Therefore, for example, on the encoder side,
Stability when the gain of the above variable gain amplifier increases during low level input, and frequency characteristics caused by tape sensitivity error etc. when the maximum gain of the variable gain amplifier is limited to prevent operation due to noise. It is possible to not only reduce errors but also increase the noise reduction effect of low frequencies.

[Brief explanation of the drawing]

FIG. 1 is a block circuit diagram showing a conventional example of a noise reduction circuit, and FIG. 2 is a graph showing input/output characteristics of the circuit shown in FIG. Figure 3 is a block circuit diagram for explaining the basic configuration of the present invention;
The figure is a graph showing the input/output characteristics of the circuit of FIG. 3. FIG. 5 is a block circuit diagram illustrating encoder circuit 20 in accordance with a preferred embodiment of the present invention.
FIG. 6 is a block circuit diagram showing a decoder circuit 30 as another embodiment of the present invention. FIG. 7 is a block circuit diagram showing still another embodiment of the present invention;
8 is a graph showing the input/output characteristics of the circuit of FIG. 7, FIG. 9 is a graph showing the frequency characteristics of the circuit of FIG. 7 for two signal inputs, and FIG. 10 is a specific example of the decoder circuit 50 of FIG. 7. FIG. 2 is a circuit diagram showing an example of a typical circuit configuration. 20... Encoder circuit, 30, 50... Decoder circuit, 13... High pass filter for pre-emphasis, 14, 34, 54... Variable gain amplifier, 29, 49, 58... High pass filter for correction, 33, 56 ... Low pass filter for de-emphasis, 15, 35 ... Control circuit, 23,
43, 61... High pass filter for weighting, 21, 41... Second signal transmission circuit, 57
... Resistance serving as the second signal transmission path, 22, 42,
53... Adder.

Claims (1)

[Claims] 1. A high-pass or low-pass filter circuit for emphasis, a variable gain amplifier connected in series to the filter circuit and whose gain changes according to a control signal, and detecting the input or output of the variable gain amplifier. The gain of the variable gain amplifier remains unchanged when the input signal is at a small level, and when the gain remains unchanged, the gain of the noise reduction circuit is controlled by the emphasis filter circuit to adjust the gain to the frequency. A correction high-pass filter circuit to correct for different things depending on the
A noise reduction circuit characterized in that when a high-pass filter circuit for emphasis is used, it is connected to the feedback path of the variable gain amplifier, and when a low-pass filter circuit for emphasis is used, it is connected in parallel with the variable gain amplifier.