JPS6146963B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method suitable for manufacturing a semiconductor device that requires a step of implanting ions into a semiconductor wafer having an insulating film on its surface.

Generally, when manufacturing semiconductor devices, there are quite a number of steps in which ions are implanted with an insulating film formed on the surface of a semiconductor wafer. In this case, ions are not only implanted into the necessary areas, but also onto the insulating film, so the potential gradually rises due to charge-up of the insulating film, eventually exceeding the withstand voltage of the insulating film. , accidents resulting in insulation breakdown often occur.

In order to avoid this, the inventor first etched grooves in the insulating film so as to divide the semiconductor wafer into predetermined areas to expose the semiconductor bulk surface.
For example, Japanese Patent Application No. 158322-1987 provides a technology that prevents dielectric breakdown from occurring even if a predetermined area of an insulating film is charged up by normal ion implantation, even if the amount of charge that is charged up in that area is small. did.

According to this existing technique, dielectric breakdown of the insulating film can be prevented to a considerable extent, but it cannot be said to be perfect if the amount of ions implanted per unit time increases significantly.

The present invention is based on new findings obtained since then.
This is an attempt to further improve the technique of preventing dielectric breakdown by cutting etching grooves into the insulating film of a semiconductor wafer to expose the semiconductor bulk surface and dividing the insulating film into predetermined areas. will be explained in detail.

In the present invention, when ions are implanted into an insulating film such as silicon dioxide, the energy of the ions is absorbed near the surface of the insulating film, generating electron-hole pairs, and the electrons or holes become carriers. The basis of this method is the knowledge that the charge of the implanted ions is transported in the same way as the implanted ions.

In this way, when ions are implanted into an insulating film, the generation of electrons or holes that carry the charge of the implanted ions can be considered to be the formation of a conductive layer (or a high resistance layer) on the surface of the insulating film. Note that since the electron-hole pairs are unevenly distributed near the region into which ions have entered, the conductive layer substantially formed by ion implantation is limited to the vicinity of the surface of the insulating film.

Figure 1 explains this state, where 1 shows a semiconductor substrate, 2 shows an insulating film, 2A shows a substantial conductive layer formed by ion implantation, and 3 shows a groove formed in the insulating film. .

By the way, the insulating film 2 usually has side surfaces that stand up at approximately right angles as shown in the figure. Therefore, the conductive layer 2A
are not formed on the sides.

However, since such a conductive layer 2A is formed, if this conductive layer 2A is made to be able to communicate with the semiconductor substrate 1 by appropriate means,
Charge-up in the insulating film 2 should be almost eliminated. Note that when applying the ion implantation method, the semiconductor substrate 1 is usually grounded.

Now, in the present invention, since a conductive layer is also formed on the side surface of the insulating film, the edges of the insulating film are sloped.

That is, FIG. 2 is a sectional side view of the main part of a semiconductor wafer for explaining one embodiment of the present invention, and FIG. 3 is a plan view of the main part.

In each figure, 11 is a semiconductor substrate, 12 is an insulating film, 12A is an edge of the insulating film 12, 13 is a groove,
_Q1 to _Qo and transistors are respectively shown. Note that the structure of the transistor is omitted in FIG. 3.

As is clear from the figure, the edge 1 of the insulating film 12
2A, that is, the portion facing the groove 13, is inclined at a required angle. Suitably, this angle is about 60° or less when leaning on the side as shown.

In this way, when ion implantation is performed after slanting the edge 12A, as shown in FIG.
A conductive layer 12B is formed on the surface of the insulating film 12 by the ion implantation, and the conductive layer 12B is in contact with the surface of the semiconductor substrate 11. Therefore, the charges accumulated in the insulating film 12 are released to the semiconductor substrate 11 via the conductive layer 12B, so that the charges accumulated in the insulating film 12
No dielectric breakdown occurs.

By the way, it is very advantageous in terms of the process if the groove 13 formed in the insulating film 12 is formed in alignment with the scribe line for forming a so-called one chip, and it will not have a negative effect on transistors, etc. .

As can be seen from the above explanation, according to the present invention, an insulating film formed on a semiconductor wafer is divided by grooves formed in alignment with scribe lines for dividing into one chip, and an insulating film is formed opposite to the grooves. Since the edges of the insulating film are sloped before ion implantation, the conductive layer formed on the surface of the insulating film is also formed on the edges of the insulating film and is in contact with the surface of the semiconductor substrate. Charges accumulated in the film are released to the semiconductor substrate through the conductive layer, thus eliminating the possibility of dielectric breakdown of the insulating film.

[Brief explanation of the drawing]

FIG. 1 is a sectional side view of the main part of a semiconductor wafer for explaining the prior art, FIGS. 2 to 4 are diagrams for explaining one embodiment of the present invention, and FIG. Fig. 3 is a plan view of the main part;
FIG. 4 is a side sectional view of the main part showing an enlarged view of the edge portion of the insulating film. In the figure, 11 is a semiconductor substrate, 12 is an insulating film, 12A is an edge, and 13 is a groove.

Claims (1)

[Claims] 1. Forming grooves dividing each chip into an insulating film formed on a semiconductor substrate to expose the surface of the semiconductor substrate, and simultaneously or thereafter forming an inclined surface on the edge of the insulating film along the grooves, A method for manufacturing a semiconductor device, comprising the step of subsequently performing ion implantation.