JPS6147007B2 - - Google Patents
Info
- Publication number
- JPS6147007B2 JPS6147007B2 JP56154215A JP15421581A JPS6147007B2 JP S6147007 B2 JPS6147007 B2 JP S6147007B2 JP 56154215 A JP56154215 A JP 56154215A JP 15421581 A JP15421581 A JP 15421581A JP S6147007 B2 JPS6147007 B2 JP S6147007B2
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- whose
- emitter
- collector
- base
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
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- Amplifiers (AREA)
Description
本発明はエミツタフオロワ回路に関する。
エミツタフオロワ回路は入力電圧と等しい電圧
を出力電圧として取り出す機能を有しており、こ
のようなエミツタフオロワ回路の基本的な従来回
路を第１図に示す。この回路における入出力電
圧、Ｖio、Ｖputの関係は
Ｖio−ＶBE（Q1）＝Ｖput−ＶBE（Q2） ……(1)
となる。ここで、ＶBE（Q1）、ＶBE（Q2）はそれ
ぞれトランジスタQ1，Q2のベース・エミツタ間
電圧である。上記トランジスタQ1，Q2のそれぞ
れのコレクタ電流をI1，I2とすると、ベース・エ
ミツタ間電圧ＶBEとは次のような関係にある。
The present invention relates to an emitter follower circuit. An emitter follower circuit has a function of extracting a voltage equal to an input voltage as an output voltage, and a basic conventional circuit of such an emitter follower circuit is shown in FIG. The relationship between the input and output voltages, V io and V put in this circuit is V io −V BE (Q 1 )=V put −V BE (Q 2 ) (1). Here, V BE (Q 1 ) and V BE (Q 2 ) are the base-emitter voltages of transistors Q 1 and Q 2 , respectively. Assuming that the collector currents of the transistors Q 1 and Q 2 are I 1 and I 2 , respectively, they have the following relationship with the base-emitter voltage V BE .
【表】
〓………………………(2)
I２ [Table] 〓………………………(2)
I 2
Claims (1)
力端に接続されると共に第１電流源を介して第１
電源に接続される第１トランジスタと、ベースが
上記第１トランジスタのコレクタに接続される第
２トランジスタと、この第２トランジスタのコレ
クタと上記第１電源とを接続する手段と、コレク
タが上記第１トランジスタのエミツタ、エミツタ
が第２電流源を介して第２電源にそれぞれ接続さ
れる第３トランジスタと、コレクタが上記第２ト
ランジスタのエミツタ及び第３トランジスタのベ
ースに接続され、ベースが上記第３トランジスタ
のコレクタに、エミツタが上記第３トランジスタ
のエミツタにそれぞれ接続される第４トランジス
タとを具備し、前記第１及び第２トランジスタの
それぞれのコレクタ電流とは無関係に出力電圧の
誤差を抑制してなることを特徴とするエミツタフ
オロワ回路。 ２ 前記第１電流源は、エミツタが前記第１電源
に、コレクタが前記第１トランジスタのコレクタ
にそれぞれ接続される第５トランジスタと、エミ
ツタが前記第１電源に、ベースが上記第５トラン
ジスタのベースに、コレクタが前記第２トランジ
スタのコレクタにそれぞれ接続されると共にコレ
クタ・ベース相互が接続された第６トランジスタ
よりなり、上記第１及び第２トランジスタのコレ
クタに同一電流を供給するカレントミラー回路に
て構成されることを特徴とする特許請求の範囲第
１項記載のエミツタフオロワ回路。[Claims] 1. An input voltage is supplied to the base, the collector is connected to the output terminal, and a first current source is supplied to the base through a first current source.
a first transistor connected to a power source; a second transistor having a base connected to the collector of the first transistor; means for connecting the collector of the second transistor to the first power source; a third transistor whose emitter is connected to the second power supply via a second current source, and whose collector is connected to the emitter of the second transistor and the base of the third transistor, and whose base is connected to the third transistor; and a fourth transistor whose emitter is connected to the emitter of the third transistor, respectively, to suppress an error in the output voltage regardless of the collector current of each of the first and second transistors. An emitsuta follower circuit characterized by: 2 The first current source includes a fifth transistor whose emitter is connected to the first power source and whose collector is connected to the collector of the first transistor, and whose emitter is connected to the first power source and whose base is connected to the base of the fifth transistor. and a current mirror circuit comprising a sixth transistor whose collectors are respectively connected to the collectors of the second transistor and whose collectors and bases are connected to each other, and which supplies the same current to the collectors of the first and second transistors. An emitter follower circuit according to claim 1, characterized in that the emitter follower circuit is constructed as follows.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56154215A JPS5854713A (en) | 1981-09-29 | 1981-09-29 | Emitting flollower circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56154215A JPS5854713A (en) | 1981-09-29 | 1981-09-29 | Emitting flollower circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5854713A JPS5854713A (en) | 1983-03-31 |
| JPS6147007B2 true JPS6147007B2 (en) | 1986-10-17 |
Family
ID=15579351
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56154215A Granted JPS5854713A (en) | 1981-09-29 | 1981-09-29 | Emitting flollower circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5854713A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH061676U (en) * | 1992-06-10 | 1994-01-14 | 日本ドアーチエック製造株式会社 | slide door |
-
1981
- 1981-09-29 JP JP56154215A patent/JPS5854713A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5854713A (en) | 1983-03-31 |
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