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JPS6148245B2 - - Google Patents
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JPS6148245B2 - - Google Patents

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Publication number
JPS6148245B2
JPS6148245B2 JP54172834A JP17283479A JPS6148245B2 JP S6148245 B2 JPS6148245 B2 JP S6148245B2 JP 54172834 A JP54172834 A JP 54172834A JP 17283479 A JP17283479 A JP 17283479A JP S6148245 B2 JPS6148245 B2 JP S6148245B2
Authority
JP
Japan
Prior art keywords
amount
grain boundary
semiconductor
species
diffusion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54172834A
Other languages
Japanese (ja)
Other versions
JPS5694718A (en
Inventor
Gen Itakura
Yoshihiro Matsuo
Shoichi Ikebe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP17283479A priority Critical patent/JPS5694718A/en
Publication of JPS5694718A publication Critical patent/JPS5694718A/en
Publication of JPS6148245B2 publication Critical patent/JPS6148245B2/ja
Granted legal-status Critical Current

Links

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  • Inorganic Insulating Materials (AREA)
  • Ceramic Capacitors (AREA)

Description

【発明の詳細な説明】[Detailed description of the invention]

本発明は特にチタン酸ストロンチウム系半導体
磁器の粒界に金属酸化物を熱拡散する半導体磁器
粒界層形成方法に関するものである。 従来、チタン酸ストロンチウム系半導体磁器は
その粒界を絶縁化する事により、粒界層型半導体
磁器コンデンサが得られる事が知られている。こ
のチタン酸ストロンチウム系半導体磁器は、例え
ばニオブやタンタル等5価の金属化合物をチタン
酸ストロンチウムに微量添加し、成型し、還元雰
囲気中で1300〜1450℃程度の高温で焼成する事に
より得られる。即ち、原子制御及び強制還元とい
つた方法により得られる。次に、粒界絶縁化に当
つては大気中で熱処理し、粒界を再酸化する方法
もあるが、絶縁抵抗や絶縁破壊電圧が低いといつ
たことから、最近では原子価補償元素、例えば
銅、ビスマス、マンガン等を熱拡散する事によ
り、電気絶縁性の良い粒界層を得る方法が一般化
してきている。 以上、粒界層型半導体磁器コンデンサの製法に
ついての従来例を述べたが、粒界層半導体磁器コ
ンデンサの特徴として、半導体粒子間に誘電体層
(絶縁層)が介在する構造をなすため、誘電体層
自身のもつ比誘電率は小さいにもかかわらず、見
掛けの比誘電率は極めて大きくなる事である。即
ち、半導体粒子の平均粒径と誘電体層の平均厚み
の比率によつてほぼ見掛けの比誘電率が決まる。
したがつて、平均粒径がほぼ一定な半導体磁器に
対しては、一定量の原子価制御元素を拡散させる
事により、品質の安定した粒界層型半導体磁器コ
ンデンサが得られるはずである。しかしながら、
従来粒界層の形成に際しては拡散種と付着量及び
熱処理温度により、粒界層の形成を規定するのが
通常であつた。このような規定による方法では、
実際拡散後拡散成分がどの程度焼結体内部に存在
するのかは不明確であつた。事実一定の焼結体
(半導体磁器)に一定量一定の拡散種を付着し、
一定のサヤ上に一定の並べ方で一定温度により大
気中で熱処理した場合に限つては、拡散種の焼結
体内の存在量は一定値がいつでも再現される事が
確認され、いつでも同一の電気性能が得られる。
しかしながら、サヤの種類が異なつたり、焼結体
の並べ方が異なつた場合には、拡散種の存在量は
異なる事が容異に確認される。これはサヤとの接
触によつて拡散種が奪われたり、大気中への蒸発
によるものである。したがつて、上記のような条
件規定による場合は、サヤ材質及び並べ方をも規
定する必要がある上に、大気が静止するかあるい
は一定気流中でなければならないといつた規定を
要する。 本発明は上記のような従来の粒界層形成に関す
る規定の欠点を考慮し、拡散種を付着した半導体
磁器を準密閉容器中に閉じ込めて熱拡散する事に
より、拡散種の付着量と熱処理後の焼結体内にお
ける拡散種の存在量とがほぼ一致せしめる事を可
能とした。かかる方法により、焼結体の並べ方も
考慮する必要はなくなり、バラ詰めしても一様の
拡散効果が得られるので、極めて量産的な手法で
ある。 以下、説明を解りやすくするために従来例を併
記しながら、実施例に基づき詳細に本発明を述べ
る。 酸化チタン(TiO2)、炭酸ストロンチウム
(SrCO2)、及び五酸化ニオブ(Nb2O5)をそれぞ
れモル比にして1対1対0.002の割合で混合した
後、300Kg/cm2の圧力で成型し、1200℃で仮焼し
た。この後、粒径が3μ以下が90%以上になるよ
うに粉砕し、この粉砕粉末とポリビニルアルコー
ルの5%水溶液とを10対1の重量比で混合した。
これを30メツシユのフルイを通して造粒し、
1ton/cm2の圧力で11.5mmφ×0.48mmtに成型し
た。この成型体を1000℃、2時間でバインダを除
去した後、水素とチツ素の混合気流中で1390℃、
4時間焼成し、9.8mmφ×0.4mmtの焼結体を得
た。 このようにして得られた焼結体の結晶粒子の平
均粒径は20μで、どの焼結体についてもほぼ均一
の平均粒径であつた。また、この焼結体の電気抵
抗率は0.4Ω・cmと十分に半導体化していた。 このようにして得られた半導体磁器の表面にエ
チルセルローズのカルビノールアセテート溶液を
バインダとしてCu2OとBi2O3の混合物を所定量付
着し、付着後500℃、30分でバインダを除去し
た。 第1表は第1図〜第3図に示す種々のサヤ詰め
方法で1200℃、2時間拡散した場合の拡散種の組
成、付着量、拡散後の組成、残存量の状況及びそ
れぞれに対する代表的な電気特性を示すものであ
る。ただし、第1表においてεは見掛けの誘電率
であり、1V,1KHzの交流電圧下で測定した静電
容量Cと素体厚みt及び電極面積Sとからε=
Ct/ε0Sなる式によつて求めた値である。ここ
でεは真空の誘電率である。また、tanδは同
様に1V,1KHzの交流電圧下で測定した値であ
る。CRは上記の静電容量Cと直流電圧50Vを60
秒間印加した直後の絶縁抵抗値Rとの積でCR=
εε0rなる関係がある。ここでrは比抵抗でr=
Rt/Sである。BDVは破壊電圧であり、直流電圧を 可変圧トランスにて昇圧し、素体の電極間に
1mA以上の電流が流れる直前の電圧である。さ
らに拡散後の組成及び残存量は発光分光析法によ
る元素定量分析値から求めたものである。第1図
〜第3図において、1は拡散種を付着した焼結
体、2はアルミナ質レンガ、3は高純度アルミナ
板、4は白金線である。
The present invention particularly relates to a method for forming grain boundary layers in semiconductor ceramics, in which metal oxide is thermally diffused into the grain boundaries of strontium titanate semiconductor ceramics. It is conventionally known that a grain boundary layer type semiconductor ceramic capacitor can be obtained by insulating the grain boundaries of strontium titanate-based semiconductor ceramics. This strontium titanate-based semiconductor porcelain is obtained by adding a trace amount of a pentavalent metal compound such as niobium or tantalum to strontium titanate, molding it, and firing it at a high temperature of about 1300 to 1450°C in a reducing atmosphere. That is, it can be obtained by methods such as atomic control and forced reduction. Next, for grain boundary insulation, there is a method of heat-treating in the atmosphere and re-oxidizing the grain boundaries, but since the insulation resistance and dielectric breakdown voltage are said to be low, recently, valence compensation elements, e.g. A method of obtaining a grain boundary layer with good electrical insulation by thermally diffusing copper, bismuth, manganese, etc. is becoming popular. The conventional method for manufacturing grain boundary layer type semiconductor ceramic capacitors has been described above, but a feature of grain boundary layer semiconductor ceramic capacitors is that they have a structure in which a dielectric layer (insulating layer) is interposed between semiconductor particles. Although the dielectric constant of the body layer itself is small, the apparent dielectric constant becomes extremely large. That is, the apparent dielectric constant is approximately determined by the ratio between the average particle diameter of the semiconductor particles and the average thickness of the dielectric layer.
Therefore, for semiconductor ceramics with a substantially constant average grain size, by diffusing a certain amount of valence control element, a grain boundary layer type semiconductor ceramic capacitor with stable quality should be obtained. however,
Conventionally, when forming a grain boundary layer, it has been usual to define the formation of the grain boundary layer by the diffusion species, the amount of adhesion, and the heat treatment temperature. In a method based on such regulations,
It was unclear to what extent the diffused components actually existed inside the sintered body after diffusion. In fact, by attaching a certain amount of diffused species to a certain sintered body (semiconductor porcelain),
It has been confirmed that the amount of diffused species in the sintered body always reproduces a constant value only when heat-treated in the air at a constant temperature in a certain arrangement on a certain pod, and the electrical performance is always the same. is obtained.
However, it is clearly confirmed that when the type of pod is different or when the sintered body is arranged differently, the amount of diffused species present is different. This is due to dispersal species being taken away by contact with the pods or evaporation into the atmosphere. Therefore, if the above-mentioned conditions are stipulated, it is necessary to stipulate the material and arrangement of the pods, and also stipulate that the atmosphere must be static or in a constant airflow. The present invention takes into consideration the shortcomings of the conventional regulations regarding grain boundary layer formation as described above, and by confining semiconductor porcelain to which diffused species are attached in a semi-closed container and thermally diffusing it, the amount of attached diffused species and the amount after heat treatment are determined. This made it possible to almost match the amount of diffused species in the sintered body. With this method, there is no need to consider how the sintered bodies are arranged, and a uniform diffusion effect can be obtained even if the sintered bodies are packed in bulk, making it an extremely mass-producible method. Hereinafter, the present invention will be described in detail based on examples, while also describing conventional examples to make the explanation easier to understand. Titanium oxide (TiO 2 ), strontium carbonate (SrCO 2 ), and niobium pentoxide (Nb 2 O 5 ) were mixed at a molar ratio of 1:1:0.002, and then molded at a pressure of 300 Kg/cm 2 Then, it was calcined at 1200℃. Thereafter, the powder was pulverized so that 90% or more of the particles had a particle size of 3 μm or less, and the pulverized powder was mixed with a 5% aqueous solution of polyvinyl alcohol at a weight ratio of 10:1.
This is granulated through a 30 mesh sieve,
It was molded to a size of 11.5 mmφ x 0.48 mmt under a pressure of 1 ton/cm 2 . After removing the binder from this molded body at 1000℃ for 2 hours, it was heated at 1390℃ in a mixed gas flow of hydrogen and nitrogen.
After firing for 4 hours, a sintered body of 9.8 mmφ×0.4 mmt was obtained. The average grain size of the crystal grains of the sintered body thus obtained was 20 μm, and the average grain size was almost uniform for all the sintered bodies. Furthermore, the electrical resistivity of this sintered body was 0.4Ω·cm, which was sufficient to make it a semiconductor. A predetermined amount of a mixture of Cu 2 O and Bi 2 O 3 was deposited on the surface of the semiconductor porcelain obtained in this manner using an ethyl cellulose carbinol acetate solution as a binder, and the binder was removed at 500°C for 30 minutes after deposition. . Table 1 shows the composition of the diffused species, the amount of adhesion, the composition after diffusion, the status of the remaining amount, and the representative results for each when diffused at 1200℃ for 2 hours using the various pod packing methods shown in Figures 1 to 3. It exhibits good electrical characteristics. However, in Table 1, ε is the apparent dielectric constant, and from the capacitance C measured under an AC voltage of 1V, 1KHz, the element thickness t, and the electrode area S, ε=
This is a value determined by the formula Ct/ε 0 S. Here, ε 0 is the dielectric constant of vacuum. Furthermore, tan δ is a value similarly measured under an AC voltage of 1 V and 1 KHz. CR is the above capacitance C and DC voltage 50V.
CR = the product of the insulation resistance value R immediately after applying the voltage for seconds
There is a relationship: εε 0 r. Here r is specific resistance and r=
Rt/S. BDV is the breakdown voltage, which is created by boosting the DC voltage with a variable voltage transformer and applying it between the electrodes of the element body.
This is the voltage just before a current of 1mA or more flows. Further, the composition and residual amount after diffusion were determined from quantitative elemental analysis values by optical emission spectrometry. In FIGS. 1 to 3, 1 is a sintered body to which a diffusion species is attached, 2 is an alumina brick, 3 is a high-purity alumina plate, and 4 is a platinum wire.

【表】 第1表から明らかなように、焼結体のサヤ詰め
方法によつて拡散種の残存量、組成が異なつてく
る。それぞれの拡散後の素子に銀電極を設け、電
気特性を調べた結果、明らかに拡散種の残存状況
に影響を受けていることが確認される。この事は
拡散種が使用したサヤ中にも拡散する事、また大
気中への蒸発飛散といつたことによる影響を少な
からず受けている事を示すものである。したがつ
て、上述したようにサヤの材質によつても、ある
いは大気が流動しているか否かによつても、大い
に影響を受けると考えられる。 第2表は第4図イ,ロや第5図イ,ロに示され
る本発明によるサヤ詰め方法で、第1表のデータ
No.1に示された拡散後の残存量及び組成を再現し
ようとした実験結果である。第4図イ,ロは高純
度アルミナ板5と例えば容量30c.c.の高純度アルミ
ナルツボ6により形成された準密閉容器中に拡散
種を付着した焼結体1をサヤ詰めした実施例であ
る。また、第5図イ,ロはアルミナ質サヤ7の内
壁に高純度アルミナ板8を設置し、その中に拡散
種を付着した焼結体1を入れて高純度アルミナ板
8′、アルミナ質フタ9を被せてサヤ詰めした実
施例である。尚、第2表に示す数値の測定条件は
第1表における測定条件と同じである。
[Table] As is clear from Table 1, the amount and composition of the remaining diffusion species differ depending on the method of packing the sintered body into the pod. A silver electrode was provided on each element after diffusion, and the electrical characteristics were examined. As a result, it was confirmed that the electrical characteristics were clearly influenced by the residual state of the diffused species. This indicates that the dispersed species also diffuse into the pods used, and that they are affected to a large extent by evaporation and scattering into the atmosphere. Therefore, as mentioned above, it is thought that it is greatly influenced by the material of the pod and whether or not the atmosphere is flowing. Table 2 shows the pod packing method according to the present invention shown in Figure 4 A and B and Figure 5 A and B, and the data in Table 1.
These are the results of an experiment attempting to reproduce the residual amount and composition after diffusion shown in No. 1. Figures 4A and 4B show an embodiment in which the sintered body 1 with diffusion species attached is packed in a semi-closed container formed by a high-purity alumina plate 5 and a high-purity alumina crucible 6 with a capacity of, for example, 30 c.c. be. In addition, in FIGS. 5A and 5B, a high purity alumina plate 8 is installed on the inner wall of the alumina pod 7, a sintered body 1 with diffusion species attached is placed therein, and a high purity alumina plate 8' and an alumina lid are placed. This is an example in which 9 is covered and packed in a pod. Note that the measurement conditions for the numerical values shown in Table 2 are the same as those in Table 1.

【表】 この結果から、本発明の方法によれば拡散種の
付着量と残存量はほぼ一致し、ほとんど組成変化
も見られない。したがつて、拡散量は拡散種の付
着量によつて制御できる事が明らかである。 尚、上記表において拡散後の組成及び残存量に
ついては発光分光分析によつて求めたものであ
る。 以上、実施例で述べたように本発明の方法によ
れば、半導体磁器粒界に拡散種を所望の組成で、
かつ所望の量を無駄なく拡散する事が可能であ
り、また、焼結体の並べ方について考慮する必要
がないといつた特徴があり、粒界層半導体磁器コ
ンデンサの製造への適用については特に有意義で
あるといえる。 尚、粒界層半導体磁器コンデンサばかりでなく
粒界層を拡散手法を用いて形成するような製品に
対しても、本方法は有効であることはいうまでも
ない。
[Table] From this result, according to the method of the present invention, the amount of adhered species and the amount of remaining diffused species are almost the same, and almost no change in composition is observed. Therefore, it is clear that the amount of diffusion can be controlled by the amount of adhering species. In the above table, the composition and residual amount after diffusion were determined by emission spectrometry. As described above in the examples, according to the method of the present invention, diffused species are distributed at the grain boundaries of semiconductor ceramics in a desired composition.
It is also possible to diffuse the desired amount without waste, and there is no need to consider how the sintered bodies are arranged, making it particularly meaningful for application to the production of grain boundary layer semiconductor ceramic capacitors. You can say that. It goes without saying that this method is effective not only for grain boundary layer semiconductor ceramic capacitors but also for products in which grain boundary layers are formed using a diffusion method.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図〜第3図は従来方法におけるサヤ詰め方
法の各実施例を示す斜視図、第4図イ,ロ及び第
5図イ,ロはそれぞれ本発明方法におけるサヤ詰
め方法の代表例を示す斜視図と断面図である。
Figures 1 to 3 are perspective views showing each embodiment of the pod packing method in the conventional method, and Figures 4A and 4B and 5A and 5B respectively show representative examples of the pod packing method in the method of the present invention. They are a perspective view and a sectional view.

Claims (1)

【特許請求の範囲】 1 チタン酸ストロンチウム系半導体磁器に熱処
理により酸化される金属化合物を塗着した後、準
密閉容器中に該半導体磁器をサヤ詰めして熱処理
し、該金属化合物を酸化させると同時に粒界に拡
散させた事を特徴とする半導体磁器粒界層形成方
法。 2 金属化合物として亜酸化銅、酸化ビスマスの
うちの少なくとも1種を含む混合物を用いる事を
特徴とする特許請求の範囲第1項記載の半導体磁
器粒界層形成方法。
[Claims] 1. After coating strontium titanate-based semiconductor porcelain with a metal compound that is oxidized by heat treatment, the semiconductor porcelain is packaged in a semi-sealed container and heat treated to oxidize the metal compound. A method for forming grain boundary layers in semiconductor ceramics characterized by simultaneously diffusing into grain boundaries. 2. The method for forming grain boundary layers in semiconductor ceramics according to claim 1, characterized in that a mixture containing at least one of cuprous oxide and bismuth oxide is used as the metal compound.
JP17283479A 1979-12-28 1979-12-28 Method of forming semiconductor porcelain grain boudary layer Granted JPS5694718A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17283479A JPS5694718A (en) 1979-12-28 1979-12-28 Method of forming semiconductor porcelain grain boudary layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17283479A JPS5694718A (en) 1979-12-28 1979-12-28 Method of forming semiconductor porcelain grain boudary layer

Publications (2)

Publication Number Publication Date
JPS5694718A JPS5694718A (en) 1981-07-31
JPS6148245B2 true JPS6148245B2 (en) 1986-10-23

Family

ID=15949203

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17283479A Granted JPS5694718A (en) 1979-12-28 1979-12-28 Method of forming semiconductor porcelain grain boudary layer

Country Status (1)

Country Link
JP (1) JPS5694718A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2696893B2 (en) * 1988-03-16 1998-01-14 松下電器産業株式会社 Method for forming grain boundary layer of semiconductor porcelain

Also Published As

Publication number Publication date
JPS5694718A (en) 1981-07-31

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