JPS6148735B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a microprogram address control method for deriving the starting address of a microprogram in accordance with a macro instruction in a data processing device using microprogram control. Conventional microprogram-controlled data processing devices use an address table MROM, which is a read-only storage device whose address is the output of the macro instruction register IR, in order to generate the start address of the microprogram when processing a macro instruction. In many cases, the output is directly used as the address of the control memory CM. Therefore, if a bug occurs in the microprogram, this address table
Occasionally, the MROM may need to be replaced. To avoid this, when debugging a microprogram, it is necessary to prepare a writable storage device and a loader therein instead of the address table MROM. Also, the address table
When the output of the MROM is directly used as the address of the control memory device CM, the capacity of the address table MROM increases if the format of the operation code of the macro instruction differs depending on the instruction. That is, in FIG. 1, a, b, and c are operation formats, A, B, and C are operation codes of different bit lengths, _r1 is source register selection information, and _r2 is indexing register selection information. The selection of registers related to information r ₁ and r ₂ is based on the macro instruction register corresponding to information r ₁ and r ₂ .
If this is realized in hardware by sending the output bits of the IR directly to the control section, then for the macro instruction in the format shown in Figure 1a, regardless of the contents of information r ₁ and r ₂ , For macro instructions in the format shown in Figure 1b, the information r ₂
The output of the address table MROM must be the same regardless of the contents of the address table MROM. However, Figure 1c
For a macro instruction in the format, the address table MROM must output the starting address of a different microprogram depending on the contents of C. Therefore, in this case the address table
The MROM address requires the number of bits determined by the operation code in the format shown in FIG. 1c. FIG. 2 shows the contents of the address table MROM at this time. In the figure, 1 indicates the contents of the address table MROM, and 2 indicates the contents of the control storage device CM. The first object of the present invention is to change the starting address of a microinstruction in response to a macroinstruction by using an address table consisting of a storage device writable by microinstructions instead of an address table consisting of a read-only storage device. The object of the present invention is to provide a device that can easily deal with such problems. A second object of the present invention is to provide a device which requires only a small capacity address table by inserting an arithmetic circuit between the address table output and the control storage device. The present invention provides a microprogram-controlled data processing device in which a part of the output of a microinstruction register storing microinstructions read from a read-only storage device storing a microprogram is used as write data, and the output of the macroinstruction register is an address table consisting of a writable storage device whose addresses are a part of the address table; and an arithmetic circuit whose inputs are a part of the output of this address table and a part of the output of the macro instruction register; The first address of the microprogram corresponding to the macro instruction is derived by combining the other part of the above and the output of the arithmetic circuit as the address of the control storage device. Next, embodiments of the present invention will be described with reference to the drawings. FIG. 3 is a block diagram of one embodiment of the present invention. 1' is a writable address table
MRAM, 2 is a read-only control memory device CM, 3 is a main memory device MM, 4 is a macro instruction register IR, 5 is an arithmetic circuit AC, 6 is a control unit CTL, 7 is an address selector CMAS to the control memory device, 8 is This is the microinstruction register CMIR. The output of the microinstruction register 8 is connected to the data input Di of the address table 1' .
Further, this output is given to the macro instruction register 4 via the control section 6 and the gate circuit. The output of this macro instruction register 4 is given to the address input Ai of the address table 1' . Further, the timing signal of the control section 6 is guided to the macro instruction register and the write timing input W _R of the address table 1' . The data output Do of the address table 1' is connected directly to the input of the address selector 7 via the arithmetic circuit 5 or branched off. The output of this selector 7 is connected to the address input Ai of the read-only control memory 2 . The output Do of this storage device 2 is given to the microinstruction register 8 . Also, the readout output of the main storage device 3 is controlled by the control unit 6.
The macro instruction register 4 is supplied with the macro instruction register 4 via a gate circuit controlled by the macro instruction register 4. FIG. 4 is a diagram showing the contents of the address table 1' for macro instructions of each format and the process of deriving the starting address of a microprogram according to each instruction. Figure 4 a, b, c are the first
This corresponds to formats a, b, and c shown in the figure. Next, the operation of the apparatus will be explained using FIGS. 3 and 4. First, necessary data is written into the address table 1' by a microinstruction. In the configuration shown in FIG. 3, one word of address table 1' is written in two microinstruction steps. In the first step, a part of the output of the microinstruction register 8 is written into the macroinstruction register 4 as data that becomes the address of the address table 1' . In the next step, part of the output of the microinstruction register 8 is sent to the address table 1' as write data for the address table 1' at an appropriate timing synchronized with the write signal sent from the control unit 6, and necessary data is written. It's crowded. This write operation must precede the execution of the command, and therefore, one method is to start the device by, for example, resetting the system, and then perform the write operation. FIG. 4a shows write data in address table 1' for a macro instruction having the instruction format shown in FIG. 1a. In this case, an AND circuit 5' is used as the configuration of the arithmetic circuit 5 . Output information of macro instruction register 4 by suppress data “0000”
Since r ₁ and r ₂ are suppressed, the same address "X'0000" is selected as the address of the read-only control storage device 2 regardless of the contents of the output information r ₁ and r ₂ . Similarly, in the case of Figure 4b, only information r ₂ is suppressed by suppress data ``1100'', and the address of control storage device 2 <sub>becomes</sub> the same address ``Y'B''00'' regardless of the content of information r 2. . In the case of FIG. 4c, the suppressed data is "1111", so the output of the macro instruction register 4 is not suppressed and the address of the control storage device 2 is "Z'C". Although the address selector is omitted in FIG. 4, in reality, when executing a macro instruction fetched from the main memory 3 to the macro instruction register 4 , the output of the micro instruction register 8 is passed through the control unit 6 to the address selector 7. as the address of the next microinstruction in the control storage device 2 .
By selecting the address table 1' and the output of the arithmetic circuit 5 , it is possible to derive the starting address of the microprogram according to the macro instruction in the macro instruction register 4 . As is clear from comparing Figures 2 and 4,
In the case of address table 1 in Figure 2, Figure 1 a
For a macro instruction in the format, it is necessary to write the same content to 16 words from address A to A+15, which increases the capacity, but in the case of address table 1' in Figure 4, only one word is required. It is economical. In addition, when a change occurs in the microprogram and it is necessary to change even the starting address of the microprogram according to the macro instruction, if the format shown in Figure 2 is used, the contents of the control storage device 2 are changed, and Although it becomes necessary to replace the address table 1, in the device of the present invention, the control storage device 2
All you have to do is change the contents of the . In the above embodiment, by using the AND circuit 5 ' as the arithmetic circuit 5, the macro instruction register 4
Although the output of the address table 1' is suppressed by the output of the address table 1', in other embodiments, it is possible to modify the address of the control storage device 2 by using various arithmetic circuits other than the AND circuit. As described above, according to the present invention, by using an address table consisting of a storage device writable by microinstructions, it is possible to easily cope with changing the starting address of microinstructions according to macroinstructions. Get the equipment. Furthermore, by inserting an arithmetic circuit between the address table output and the control storage device, an economical device can be obtained that requires only a small capacity address table.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the format of a macro instruction.
FIG. 2 is a diagram showing the process of deriving the starting address of a microprogram in a conventional example. FIG. 3 is a configuration diagram showing an embodiment of the present invention. FIG. 4 is a diagram showing a method for deriving a microprogram start address according to the present invention. 1...Address table MROM consisting of a read-only memory device, 1' ...Address table MRAM consisting of a writable memory device, 2 ...Read-only control memory device CM, 3...Main memory device MM, 4
...Macro instruction register IR, 5 ...Arithmetic circuit
AC, 5'...AND circuit, 6...control circuit
CTL, 7 ...Control storage address selector
CMAS, 8 ...Micro instruction register CMIR.

Claims (1)

[Scope of Claims] 1. In an address control system for a data processing device based on microprogram control, there is provided a read-only control storage device 2 that stores microinstructions, and a macroinstruction device that stores macroinstructions read from the main storage device. A register 4 , a microinstruction register 8 for storing microinstructions read from the control storage device, and a part of the output of this microinstruction register as write data and part of the output of the macroinstruction register as address. an address table 1' consisting of a writable storage device, and an arithmetic circuit 5 whose inputs are part of the output of this address table and part of the output of the macro instruction register.
and a circuit 7 for combining a part of the output of the address table and the output of the arithmetic circuit as an address of the control storage device.