JPS6149703B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a real address area that does not correspond to any virtual address in a computer using a virtual memory control system, especially a computer that operates in two modes: virtual address mode and real address mode. This invention relates to a high-speed processing storage control system that protects this real address area and eliminates time loss due to address conversion.

In computers with conventional virtual memory control method,
All real memory corresponds to virtual memory, and the core program that forms the core of the control program is fixed in real memory. This core program storage area is also provided with various control tables such as segment tables, page tables, page frame tables, and the like. In conventional computers of this kind, even if various memory protection functions are provided, if a program goes out of control, the various control tables mentioned above can be destroyed by a program running in virtual address mode. There is also the disadvantage of time loss due to TLB faults when accessing in virtual address mode. Generally, virtual memory is divided into multiple segments, and each segment is divided into multiple pages, but in conventional computers of this type, page tables are used to determine whether there is unused space in virtual memory. Regardless, it has the number of page table elements corresponding to all pages, and the number of page table elements corresponds to all pages.
The disadvantage is that the table becomes larger and fewer real memory page slots are actually available for user programs. For example, if the virtual memory is 16 megabytes and the page size is 512 bytes, a conventional computer of this type would require 64K bytes of space for the page table.

The present invention is intended to eliminate the above-mentioned drawbacks, and the first object of the present invention is to collect tables in a real address area that does not correspond to virtual addresses, and to access this real address area in real address mode. The object of the present invention is to provide a storage control method that eliminates time loss due to address translation and protects against access in virtual address mode. In addition, the second object of the present invention is to
The purpose of this invention is to provide a storage control method that increases or decreases the size of a table depending on the situation, thereby making it possible to use real storage efficiently. Therefore, the storage control method in the information processing system of the present invention operates in two modes, virtual address mode and real address mode, and in an information processing system equipped with virtual memory, real memory is
a core program area where core programs are stored;
Divided into a non-converted real storage area that does not exist on the page table that converts virtual addresses to real addresses, and a paging area where pageable programs are stored, and various controls including the page table in the above-mentioned non-converted real storage area. When tables are stored and a new used area is generated in virtual memory, a real page frame for configuring a page table corresponding to the used area is acquired from the paging area of the real memory and the non-converted execution is executed. When the used area of virtual memory becomes an unused area, the real page frame of the non-converted real storage area is added to the paging area of the real storage area for configuring the page table corresponding to the unused area. Furthermore, the unconverted real storage area is not targeted for paging when a page fault occurs. Hereinafter, the present invention will be explained with reference to the drawings.

FIG. 1 is a diagram for explaining an overview of virtual memory management according to the present invention, FIG. 2 is a diagram showing the configuration of elements of a page table, FIG. 3 is a diagram showing the configuration of elements of a segment table, 4 is a diagram showing the configuration of the elements of the virtual memory control block pointer table, FIG. 5 is a diagram showing the configuration of the elements of the page frame table, and FIG. 6 is a diagram showing the chain structure of the elements of the page frame table. FIG. 7 is a diagram for explaining the management structure of the real storage control block, and FIG. 8 is a diagram for explaining the movement of elements of the page frame table.

In Figure 1, PT is a page table,
SGT is segment table, VS is virtual memory,
VSBPT is virtual storage control block pointer table, VSCB is virtual storage control block, RSCB
indicates the real memory control block, PFT indicates the page frame table, RS indicates the real memory, and NUC indicates the core program that forms the core of the control program.

A page table PT is provided corresponding to a segment in use, and a page table PT is not provided for an unused segment. Each element of the page table PT has a configuration as shown in FIG. 2, and an invalid flag I and an actual page number are written in each element. When this invalid flag is logical "1", this element is invalid, and when this invalid flag is logical "0", this element is valid. The segment table SGT has elements in one-to-one correspondence with each segment of the virtual memory VS, and each element indicates the start address of the corresponding page table PT. The elements of segment table SGT are marked with invalid flag I as shown in Figure 3.
PT address is entered. This invalid flag I also has the same function as the invalid flag I of the page table PT (a function indicating validity/invalidity of the segment table element). The virtual memory VS is divided into multiple segments, and each segment is divided into multiple pages. One page is, for example, 512 bytes, and one segment is, for example, 128 pages. The area on the virtual memory where the core program is stored is a non-pageable area, and the other areas are paging areas, that is, pageable areas. The virtual storage control block pointer table VSBPT has a plurality of elements in one-to-one correspondence with segments, and each element is arranged in the order of segment numbers. In each element of the virtual storage control block pointer table VSBPT, the starting address of the virtual storage control block VSCB is written, as shown in FIG.
The virtual memory control block VSCB exists for the same number of pageable programs that exist in the paging area of the virtual memory VS. For example, a program for job 1 and a program for job 2 exist in the paging area of the virtual memory VS. In this case, there are two virtual storage control blocks VSCB. The illustrated example shows a case where only the job 1 program is in the paging area of the virtual storage VS. As shown in the figure, the address of the real memory control block RSCB is entered in the virtual memory control block VSCB, and in addition to that (not shown), the DASD storage area allocated to the corresponding virtual memory partition is specified. Control information (for example, disk number, device type, address, etc.) is also entered. Each real storage control block RSCB manages a block area on the corresponding real storage RS. The real memory control block RSCB0 is the real memory control block RSCB0.
Manage unconverted real storage area on RS. In the illustrated example, only the program for job 1 is stored in virtual memory VS.
Therefore, all pageable areas except the NUC area of the real storage RS and the non-converted real storage area are allocated to the program for job 1, and the real storage control block RSCB1 is allocated to the program for job 1. manages all paging areas. The real storage control block RSCB0 points to the first page frame table element of the page frame table for indicating the page frame allocated as the non-converted real storage area. In addition, the real memory control block
RSCB1 points to the first page frame table element of the page frame table for indicating the page frame allocated as the paging area of the real storage RS. The number of page frame table elements to be managed is also entered in the real storage control block RSCB. The page frame table PFT is a NUC that indicates the page frames that make up the NUC area that stores the core program.
a non-conversion page frame table that specifies page frames that make up the non-conversion real storage area, and a page frame table for paging that specifies page frames that make up the paging area. FIG. 5 shows the configuration of a page frame table element, and the page frame table element has a forward pointer, a backward pointer, a virtual page number, and control information. This control information is
It consists of a LOCK counter, real memory control block number, and various flags. LOCK means to make the contents on the virtual memory VS resident in the real memory RS. The LOCK counter indicates the number of times this residency has been requested. Related page frame table elements are chained as shown in Figure 6.
Further, as shown in FIG. 7, the first page frame table element is pointed to by the corresponding real storage control block RSCB. Although not shown,
The non-converted page frame table includes a page frame table for user page tables that is released when it is no longer needed, and a page frame table that is never released, and the first page frame table elements of these are stored in real memory. It is pointed to by control block RSCB0. In addition, the page frame table for paging includes an empty page frame table that specifies empty pages, a page frame table that specifies paging pages, and a page frame table that specifies locked pages. The beginning of these three types of page frame tables is the corresponding real storage control block RSCB1, RSCB2...... or
Pointed to by RSCBn. The real storage RS is divided into a NUC area for storing core programs, a non-conversion real storage area, and a paging area.
The contents of the NUC area are always fixed in the real memory RS,
The contents of the non-converted real storage area are fixed until the job ends. These NUC areas and unconverted real storage areas are not subject to paging. The paging area is a storage area for pageable programs. For example, if a program for job 1 and a program for job 2 exist in the paging area of the virtual memory VS, the paging area of the real memory RS is divided into two parts. and assigned to the job 1 program and the job 2 program, respectively. The non-converted real storage area is an area that does not correspond to the virtual storage VS, and therefore there are no segment table elements and page tables that correspond to the non-converted real storage area. Therefore, this untranslated real storage can only be accessed if the PSW (Program Status Word) specifies real address mode. This unconverted real storage includes the page table PT, segment table SGT, virtual storage control block pointer table VSBPT, virtual control block
VSCB, real storage control block RSCB, and page frame table PFT are formed.

Page table set up for segment
PTs are acquired when the segment is used and released when the segment is no longer in use. As mentioned above, page table PT is created in non-translated real storage. Frees the real page frames allocated to the page table from unconverted real storage to the paging area at the time the page table was freed. Conversely, when a page table is needed, an appropriate real page frame in the paging area is added to the non-converted real storage area and used as a page table.

FIG. 8 explains the movement of page frame table elements. Note that PFTE indicates a page frame table element. Generally, when moving a real page frame, the chain of the corresponding page frame table element PFTE is disconnected, and the number of management page frame table elements in the real storage control block RSCB of the management source is reduced by "1".
Then, chain the detached page frame table element PFTE to the group of page frame table elements PFTE in the moved storage area, and at the same time set the number of managed page frame table elements in the real storage control block RSCB of the management source to "1". This is done by increasing only

Next, page fault processing will be explained.
A page fault occurs when the PSW specifies virtual address mode. PSW has
There are virtual address mode and real address mode specifications. In the case of virtual address mode specification, the central processing unit performs addressing using a dynamic address translation mechanism. On the other hand, in the real address mode, all addresses are regarded as real addresses and addressing to the real memory RS is performed without passing through the dynamic address translation mechanism. When a page fault occurs, a program interrupt occurs and a program interrupt handler (processing routine) is executed.
When the program interrupt handler determines that there is a page fault, it checks the page fault address and notifies the page management program that a page fault has occurred. When a page fault is notified, the page management program performs the following processing. Note that the page management program operates in real address mode.

Determine the segment number from the page fault address and use this segment number to create the virtual memory control block pointer table VSBPT.
Find the address of the corresponding virtual memory control block VSCB.

The corresponding real storage control block RSCB is obtained from the corresponding virtual storage control block VSCB, and an appropriate replacement target real page frame under the control of this real storage control block RSCB is found.

The invalid flag I of the page table element currently corresponding to the real page frame to be replaced is set to "1".

Check whether the data of the real page frame to be replaced has been changed, and if so, take the corresponding action.
Write to a page data set on DASD.
Note that constants for calculating the physical address of the page data set corresponding to the virtual address are written in the virtual storage control block VSCB.

DASD containing the appropriate page data set from the page fault address
Find the physical address above and write the corresponding page data set on DASD to the real page frame to be replaced. Furthermore, the above-mentioned writing and reading are performed in one start I/O.

Segment table SGT and page
The page table element corresponding to the page fault address is obtained from the table PT, the new corresponding real page number is written in this page table element, and the invalid flag I is set to "0".

Enter the virtual page number in the page frame table element corresponding to the real page frame to be replaced.

The real storage control block RSCB0, which manages the page frame table that specifies the real page frames that make up the non-converted real storage area, is connected to any virtual memory control block.
It is not selected from VSCB either. This means that untranslated real storage is not replaced with virtual addresses. In other words, in virtual address mode, any access to this area is prohibited.

As is clear from the above description, according to the present invention, (a) an untranslated real storage area that is protected from virtual address mode access can be obtained;

(b) Untranslated real storage can only be accessed in real address mode, in which case
No time loss due to TLB faults.

(c) Since the area corresponding to the unconverted real storage area is no longer needed in virtual storage, the virtual address space is effectively expanded.

(d) Since non-conversion real storage areas can be dynamically acquired/released, real storage usage efficiency is improved.

Benefits such as:

[Brief explanation of the drawing]

FIG. 1 is a diagram for explaining an overview of virtual memory management according to the present invention, FIG. 2 is a diagram showing the configuration of elements of a page table, FIG. 3 is a diagram showing the configuration of elements of a segment table, and FIG. Figure 4 shows the configuration of elements of the virtual memory control block pointer.
The figure shows the configuration of the elements of the page frame table, Figure 6 shows the chain structure of the elements of the page frame table, Figure 7 explains the management structure of the real memory control block, and Figure 8 shows the page frame table. It is a figure explaining the movement of the element of a frame table. PT...page table, SGT...segment table, VS...virtual memory, VSBPT...virtual memory control block pointer table,
VSCB: Virtual memory control block, RSCB: Real memory control block, PFT: Page frame table, RS: Real memory, NUC: Core program that forms the core of the control program.

Claims (1)

[Claims] 1 In an information processing system that operates in two modes, a virtual address mode and a real address mode, and is equipped with virtual memory, the real memory is the program area in which the program is stored, and the virtual address is converted into a real address. Divide into a non-conversion real storage area that does not exist on the page table to be converted and a paging area where pageable programs are stored, store various control tables including the page table in the non-conversion real storage area, When a new used area is generated in the virtual memory, a real page frame for configuring a page table corresponding to the used area is acquired from the paging area of the real memory and added to the unconverted real storage area; When the used area of virtual memory becomes an unused area, the real page frame of the non-converted real storage area for configuring the page table corresponding to the unused area is released to the paging area of the real storage, and A storage control method in an information processing system, characterized in that a non-converted real storage area is not targeted for paging when a page fault occurs.