JPS6151432B2 - - Google Patents
Info
- Publication number
- JPS6151432B2 JPS6151432B2 JP407979A JP407979A JPS6151432B2 JP S6151432 B2 JPS6151432 B2 JP S6151432B2 JP 407979 A JP407979 A JP 407979A JP 407979 A JP407979 A JP 407979A JP S6151432 B2 JPS6151432 B2 JP S6151432B2
- Authority
- JP
- Japan
- Prior art keywords
- mask member
- semiconductor substrate
- gate
- oxide film
- gate metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
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- 239000004065 semiconductor Substances 0.000 claims description 58
- 239000000758 substrate Substances 0.000 claims description 40
- 229910052751 metal Inorganic materials 0.000 claims description 26
- 239000002184 metal Substances 0.000 claims description 26
- 238000000034 method Methods 0.000 claims description 15
- 238000004519 manufacturing process Methods 0.000 claims description 10
- 229910052782 aluminium Inorganic materials 0.000 claims description 8
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 7
- 230000001590 oxidative effect Effects 0.000 claims description 5
- 230000001678 irradiating effect Effects 0.000 claims description 4
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 3
- 229910052750 molybdenum Inorganic materials 0.000 claims description 3
- 239000011733 molybdenum Substances 0.000 claims description 3
- 229920003229 poly(methyl methacrylate) Polymers 0.000 claims description 3
- 239000004926 polymethyl methacrylate Substances 0.000 claims description 3
- 239000000377 silicon dioxide Substances 0.000 claims description 3
- 235000012239 silicon dioxide Nutrition 0.000 claims description 3
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 2
- 229910052804 chromium Inorganic materials 0.000 claims description 2
- 239000011651 chromium Substances 0.000 claims description 2
- 239000000463 material Substances 0.000 claims description 2
- 238000000151 deposition Methods 0.000 claims 2
- 238000005530 etching Methods 0.000 description 10
- 238000010521 absorption reaction Methods 0.000 description 7
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 5
- 229920005591 polysilicon Polymers 0.000 description 5
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 230000003647 oxidation Effects 0.000 description 4
- 238000007254 oxidation reaction Methods 0.000 description 4
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 3
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 229910017604 nitric acid Inorganic materials 0.000 description 3
- 230000003287 optical effect Effects 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 229920002120 photoresistant polymer Polymers 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 2
- 229910052786 argon Inorganic materials 0.000 description 2
- 238000011109 contamination Methods 0.000 description 2
- 238000010894 electron beam technology Methods 0.000 description 2
- 230000031700 light absorption Effects 0.000 description 2
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 1
- -1 argon ion Chemical class 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 150000002500 ions Chemical group 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 239000010979 ruby Substances 0.000 description 1
- 229910001750 ruby Inorganic materials 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Electrodes Of Semiconductors (AREA)
- Element Separation (AREA)
- Formation Of Insulating Films (AREA)
Description
【発明の詳細な説明】
本発明は、選択的に形成された酸化膜を有する
ゲートを設けた半導体装置の製造方法に関するも
のである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device provided with a gate having a selectively formed oxide film.
従来、MOS型の半導体装置のゲートを形成す
る方法としては、例えば、800〜1200℃の高温に
加熱した炉内にシリコンウエハーなどからなる半
導体基体を入れてその表面に熱酸化を施し、熱酸
化によつて形成されたシリコン酸化膜上に、例え
ば、ポリシリコンなどからなるゲート金属を被着
し、次いで、このゲート金属をマスクにして酸化
膜にエツチングを施して行う方法或いは、上記の
如く、熱酸化によつて形成された酸化膜上にアル
ミニウムなどのゲート金属を形成する方法などが
行われている。 Conventionally, the method for forming the gate of a MOS type semiconductor device is to place a semiconductor substrate made of a silicon wafer or the like in a furnace heated to a high temperature of 800 to 1200 degrees Celsius, and then thermally oxidize its surface. A gate metal made of, for example, polysilicon is deposited on the silicon oxide film formed by the method, and then the oxide film is etched using the gate metal as a mask, or as described above. A method has been used in which a gate metal such as aluminum is formed on an oxide film formed by thermal oxidation.
しかしながら、このようなゲート形成方法では
必要とされるゲート酸化膜は、シリコンウエハー
などからなる半導体基体の表面の僅かな部分であ
るにも拘らず、半導体基体全体に30分から１時間
に亘る長時間の加熱操作を必要とするため、次に
示す如き欠点がある。 However, although the gate oxide film required in such a gate forming method is a small portion of the surface of a semiconductor substrate made of a silicon wafer, etc., it is necessary to apply a gate oxide film over the entire semiconductor substrate for a long period of 30 minutes to 1 hour. Since heating operations are required, there are the following drawbacks.
(1) 加熱時に炉内の不純物などがゲート酸化膜中
に混入し易い。(1) Impurities in the furnace tend to get mixed into the gate oxide film during heating.
(2) 長時間に亘る加熱によつて半導体基体に歪が
生じ易い。(2) Semiconductor substrates tend to become distorted due to long-term heating.
本発明は、かかる点に鑑み種々の研究を行つた
結果、可視領域から遠紫外領域に及び範囲内の波
長を有するレーザ光によつてゲート酸化膜を形成
することにより、高純度のゲート酸化膜を極めて
短時間に形成することができる半導体装置の製造
方法を見い出し、従来の欠点を解消するものであ
る。 As a result of conducting various studies in view of the above points, the present invention has been developed to form a gate oxide film with high purity by forming the gate oxide film using a laser beam having a wavelength within the range from the visible region to the deep ultraviolet region. The aim is to find a method for manufacturing a semiconductor device that can be formed in an extremely short period of time, and to overcome the drawbacks of the conventional method.
即ち、本発明は、フイールド酸化の施された半
導体基体の表面にマスク部材を被着した後、この
マスク部材のゲート電極形成予定領域に対応する
部分を除去して半導体基体の表面を露出させる。
次いで、この半導体基体の露出表面及びマスク部
材の表面にレーザ光の短時間照射を施して半導体
基体の露出表面に酸化膜を形成する。次に、この
酸化膜の表面及びマスク部材の表面にゲート金属
を被着した後、マスク部材と共にマスク部材上の
ゲート金属を除去して、所定パターンのゲートを
形成する半導体装置の製造方法である。 That is, in the present invention, after a mask member is attached to the surface of a semiconductor substrate subjected to field oxidation, a portion of the mask member corresponding to a region where a gate electrode is to be formed is removed to expose the surface of the semiconductor substrate.
Next, the exposed surface of the semiconductor substrate and the surface of the mask member are irradiated with laser light for a short time to form an oxide film on the exposed surface of the semiconductor substrate. Next, a gate metal is deposited on the surface of the oxide film and the surface of the mask member, and then the gate metal on the mask member is removed together with the mask member to form a gate in a predetermined pattern. .
以下、本発明方法を更に詳細に説明する。 The method of the present invention will be explained in more detail below.
本発明で用いるマスク部材は、半導体基体の表
面のゲート電極形成予定領域にレーザ光を照射し
選択的にゲート酸化を行うためのものである。こ
のマスク部材としては、例えば、アルミニウム、
モリブデン、クロムなどの如く、レーザ光の透過
を阻止する作用を有すると共に、被着部分を酸化
性の雰囲気から遮断せしめる作用を有するもの
や、或いは、光レジスト、電子ビームレジスト、
C.V.D（chemical vapor deposition）によつて
被着することができる二酸化ケイ素などの如く、
被着部分を酸化性の雰囲気から遮断する作用を有
するなどの何れのものでも良い。この電子ビーム
レジストとしては、PMMA（ポリメチルメタク
リレート）などがあり、光レジストとしては、シ
プレー社製AZ−2400などがある。 The mask member used in the present invention is for selectively oxidizing the gate by irradiating laser light onto a region on the surface of a semiconductor substrate where a gate electrode is to be formed. As this mask member, for example, aluminum,
Molybdenum, chromium, etc., which have the effect of blocking the transmission of laser light and also have the effect of shielding the adhered part from an oxidizing atmosphere, or photoresists, electron beam resists,
such as silicon dioxide, which can be deposited by CVD (chemical vapor deposition).
Any material having the effect of shielding the adhered portion from an oxidizing atmosphere may be used. Examples of the electron beam resist include PMMA (polymethyl methacrylate), and examples of the photoresist include AZ-2400 manufactured by Shipley.
また、マスク部材の形成厚は、酸化膜の表面に
ゲート金属を被着した後にマスク部材上のゲート
金属をマスク部材と共にリフトオフするので、レ
ーザ光の照射によつて形成された酸化膜の膜厚と
ゲート金属の膜厚の和よりも大きくする必要があ
る。 In addition, the thickness of the mask member is determined by the thickness of the oxide film formed by laser light irradiation, since the gate metal on the mask member is lifted off together with the mask member after the gate metal is deposited on the surface of the oxide film. It needs to be larger than the sum of the film thickness of the gate metal and the film thickness of the gate metal.
また、半導体基体のゲート電極形成予定領域と
して露出された表面に照射するレーザ光として
は、レーザ光の照射による入熱効率を上げるため
に半導体基体の光吸収係数が高い3000Å乃至7000
Å程度のいわゆる紫外領域から可視領域に及ぶ波
長のものでしかも高出力のものであることが望ま
しい。これは、第７図に示す如く、半導体基体の
吸収係数が大きいレーザ光Ａと小さいレーザ光Ｂ
とを比較した場合、半導体基体の表面に与える熱
エネルギーの大きさは、吸収係数の大きいレーザ
光Ａの方が遥かに半導体基体の表面付近に多くの
熱エネルギーを与えるからである。 In addition, the laser beam irradiated onto the exposed surface of the semiconductor substrate as the gate electrode formation area is selected from a range of 3000 Å to 7000 Å, which has a high light absorption coefficient of the semiconductor substrate, in order to increase the heat input efficiency by laser beam irradiation.
It is desirable that the wavelength ranges from the so-called ultraviolet region to the visible region, with a high output power. As shown in Figure 7, this is because laser light A has a large absorption coefficient of the semiconductor substrate and laser light B has a small absorption coefficient.
This is because the laser beam A, which has a larger absorption coefficient, imparts much more thermal energy to the surface of the semiconductor substrate than the laser beam A, which has a larger absorption coefficient.
尚、レーザ光の波長と光吸収係数との関係は、
一般に第８図に示す如く、短波長のものほど光吸
収係数が大きくなる傾向があり、短波長のレーザ
光を使用するのが好ましい。 The relationship between the wavelength of laser light and the optical absorption coefficient is as follows:
Generally, as shown in FIG. 8, the shorter the wavelength, the larger the optical absorption coefficient tends to be, and it is preferable to use a laser beam with a shorter wavelength.
このようなレーザ光としては、例えば、エキシ
マレーザチツソレーザ、アルゴンレーザ、Nd−
YAGレーザやNd−Glassレーザの高次高調波光、
ルビーレーザ、等遠紫外領域から可視領域の範囲
内の波長を有するものであれば何れのものでも良
い。 Examples of such laser light include excimer laser, argon laser, and Nd-
High-order harmonic light of YAG laser and Nd-Glass laser,
Any ruby laser may be used as long as it has a wavelength within the range from the isophthalmic ultraviolet region to the visible region.
但し、アルゴンイオンレーザを使用する場合
は、マスク部材の光吸収係数とレーザ出力効率と
を考慮して適当な波長のものを選択するのが望ま
しい。 However, when using an argon ion laser, it is desirable to select an appropriate wavelength in consideration of the light absorption coefficient of the mask member and the laser output efficiency.
また、レーザ光の照射による半導体基体表面へ
の入熱量は、半導体基体の表面に形成するゲート
幅より大きい範囲でレーザ光の照射スポツト径を
変化して行うことができる。或いは、また、レー
ザ光の半導体基体表面での掃引速度を変化して調
整することができる。更に、また、レーザ光がパ
ルス発振レーザである場合には、レーザ光の照射
回数によつても照射部分の入熱量を調整すること
ができる。 Further, the amount of heat input to the surface of the semiconductor substrate by laser beam irradiation can be controlled by changing the diameter of the laser beam irradiation spot within a range larger than the width of the gate formed on the surface of the semiconductor substrate. Alternatively, the sweep speed of the laser beam on the surface of the semiconductor substrate can be changed and adjusted. Furthermore, when the laser beam is a pulsed laser, the amount of heat input to the irradiated portion can also be adjusted by the number of times the laser beam is irradiated.
また、レーザ光による半導体基体表面の酸化
は、約10-7秒位でその照射部分の酸化を完了する
ことができるため、レーザ光の照射による入熱時
間は、半導体基体表面の汚染及び熱歪を防止する
ためにはできるだけ短時間とすることが望まし
い。 In addition, the oxidation of the semiconductor substrate surface by laser light can complete the oxidation of the irradiated part in about 10 -7 seconds, so the heat input time due to laser light irradiation is limited to contamination and thermal strain on the semiconductor substrate surface. In order to prevent this, it is desirable to keep the time as short as possible.
また、半導体基体の表面にレーザ光を照射する
際の雰囲気としては、例えば、空気、酸素、或い
は高圧水蒸気等の酸化性気体であれば何れのもの
でも良いが、夫々の雰囲気によつて形成される酸
化膜の膜厚が異なるので製造する半導体装置の種
類に応じて適宜選択するのが望ましい。 Further, the atmosphere when irradiating the surface of the semiconductor substrate with laser light may be any oxidizing gas such as air, oxygen, or high-pressure water vapor, but the atmosphere formed by each atmosphere may be Since the film thickness of the oxide film differs, it is desirable to select it appropriately depending on the type of semiconductor device to be manufactured.
また、レーザ光の照射によつて形成された酸化
膜上に被着するゲート金属としては、例えば、ア
ルミニウム、ポリシリコン、モリブデン等を使用
することができる。 Further, as the gate metal deposited on the oxide film formed by laser beam irradiation, aluminum, polysilicon, molybdenum, etc. can be used, for example.
但し、マスク部材としてアルミニウムを使用し
た場合は、マスク部材をリフトオフする際に共に
除去されてしまうので、アルミニウムをゲート金
属として使用することはできない。 However, if aluminum is used as the mask member, it will be removed when the mask member is lifted off, so aluminum cannot be used as the gate metal.
また、マスク部材を除去するエツチング液とし
ては、ゲート酸化膜、ゲート金属、半導体基体に
損傷を与えないものであれば、通常エツチングの
際に用いる化学エツチング液等何れのものでも良
い。 The etching solution for removing the mask member may be any chemical etching solution normally used in etching as long as it does not damage the gate oxide film, gate metal, or semiconductor substrate.
但し、二酸化ケイ素をマスク部材として使用し
た場合には、エツチング液によつてゲート酸化膜
もエツチングされるため、エツチング時間をでき
るだけ短かくしてゲート酸化膜のサイドエツチン
グを防止するのが望ましい。 However, when silicon dioxide is used as a mask member, the gate oxide film is also etched by the etching solution, so it is desirable to shorten the etching time as much as possible to prevent side etching of the gate oxide film.
次に、本発明の実施例について説明する。 Next, examples of the present invention will be described.
まず、第１図に示す如く、フイールド酸化膜１
が形成されたシリコンからなる半導体基体２の表
面に、マスク部材３としてアルミニウムを厚さ約
8000Å蒸着形成した後、フオトレジストを用いて
ゲート電極形成予定領域に対応する部分のマスク
部材３を除去する。 First, as shown in FIG.
Aluminum is deposited as a mask member 3 on the surface of a semiconductor substrate 2 made of silicon on which a thickness of approximately
After 8000 Å is deposited, the mask member 3 corresponding to the region where the gate electrode is to be formed is removed using photoresist.
次に、このゲート電極形成予定領域が露出され
た半導体基体２を酸素を含有した高圧水蒸気雰囲
気中に設置して、ゲート電極形成予定領域に出力
1kW／pulse、パルス幅10-7秒のＱスイツチルビ
ーレーザを照射してゲート酸化膜４を形成する。
この後、このゲート酸化膜４及びマスク部材３が
被着された半導体基体２の表面に、第２図に示す
如く、ゲート金属５としてポリシリコンをC.V.
D.法により厚さ4000Å形成した。 Next, the semiconductor substrate 2 with the gate electrode formation area exposed is placed in a high-pressure steam atmosphere containing oxygen, and output is made to the gate electrode formation area.
The gate oxide film 4 is formed by irradiation with a Q-switch chilby laser of 1 kW/pulse and pulse width of 10 -7 seconds.
Thereafter, as shown in FIG. 2, polysilicon is deposited as a gate metal 5 on the surface of the semiconductor substrate 2 on which the gate oxide film 4 and the mask member 3 are adhered.
A thickness of 4000 Å was formed using the D. method.
次に、リン酸と硝酸と酢酸との混合液からなる
エツチング液を用いて、マスク部材３上に被着さ
れたゲート金属５をマスク部材３と共に除去し
て、第３図に示す如く、半導体基体１の表面にゲ
ート酸化膜４を介して所定パターンのゲート電極
を形成した半導体装置６を得ることができた。 Next, using an etching solution consisting of a mixture of phosphoric acid, nitric acid, and acetic acid, the gate metal 5 deposited on the mask member 3 is removed together with the mask member 3, and the semiconductor is etched as shown in FIG. A semiconductor device 6 could be obtained in which a gate electrode of a predetermined pattern was formed on the surface of the base 1 with a gate oxide film 4 interposed therebetween.
このようにレーザ光の照射によつて極めて短時
間に所望パターンのゲート酸化膜４を形成するこ
とができると共に、形成されたゲート酸化膜４の
二次イオン分析を行つたところ、不純物による汚
染はほとんどみられなかつた。 In this way, the gate oxide film 4 of a desired pattern can be formed in an extremely short time by laser light irradiation, and secondary ion analysis of the formed gate oxide film 4 revealed that no contamination by impurities was detected. It was hardly visible.
次に、ゲート部分が半導体基体中に埋没したい
わゆる凹MOS型の半導体装置の製造に、本発明
方法を適用した他の実施例について説明する。 Next, another embodiment in which the method of the present invention is applied to the manufacture of a so-called concave MOS type semiconductor device in which a gate portion is buried in a semiconductor substrate will be described.
まず、上記実施例と同様にアルミニウムからな
るマスク部材３′を厚さ8000Å蒸着形成した後、
ゲート形成予定領域部分のマスク部材３′および
半導体基体２′を水酸化カリウム溶液にて選択的
に除去することにより、第４図に示す如く半導体
基体２′に凹溝を穿設し、このように形成したゲ
ート形成予定領域に酸素雰囲気中で出力1kW／
pulse、パルス幅10-7秒のＱスイツチルビーレー
ザを照射して酸化膜４′を形成した。この後、こ
のようにして形成された酸化膜４′及びマスク部
材３′の表面に第５図に示す如くゲート金属５′と
してポリシリコンをC.V.D法により厚さ3000Å被
着した。次に、マスク部材３′の表面に被着され
たゲート金属５′をマスク部材３′と共に硝酸を含
むエツチング液を用いて除去し、第６図に示す如
き、凹MOS型の半導体装置６′を得た。 First, a mask member 3' made of aluminum was deposited to a thickness of 8000 Å in the same manner as in the above embodiment, and then
By selectively removing the mask member 3' and the semiconductor substrate 2' in the area where the gate is to be formed using a potassium hydroxide solution, grooves are formed in the semiconductor substrate 2' as shown in FIG. A power output of 1kW/1kW was applied in an oxygen atmosphere to the area where the gate was to be formed.
The oxide film 4' was formed by irradiation with a Q-switch chilby laser having a pulse width of 10 -7 seconds. Thereafter, as shown in FIG. 5, polysilicon was deposited to a thickness of 3000 Å as a gate metal 5' on the surfaces of the oxide film 4' and mask member 3' thus formed by the CVD method. Next, the gate metal 5' deposited on the surface of the mask member 3' is removed together with the mask member 3' using an etching solution containing nitric acid, and a concave MOS type semiconductor device 6' as shown in FIG. I got it.
このようにして本発明方法を適用することによ
り、極めて純度の高いゲート酸化膜４′を有する
凹MOS型の半導体装置６′を短時間のレーザ光の
照射工程によつて容易に製造することができた。 By applying the method of the present invention in this manner, a concave MOS type semiconductor device 6' having a gate oxide film 4' of extremely high purity can be easily manufactured by a short-time laser beam irradiation process. did it.
尚、このポリシリコンからなるゲート金属５′
を除去するエツチング液としては、硝酸或いはリ
ン酸を含有するエツチング液を用いることによ
り、ゲート金属５′にサイドエツチングを施して
ゲート金属５′と半導体基体２′との絶縁耐圧を大
きくして半導体装置の電気特性の向上を図ること
ができた。 Note that the gate metal 5' made of polysilicon
By using an etching solution containing nitric acid or phosphoric acid as an etching solution for removing the etching, the gate metal 5' is side etched to increase the dielectric strength voltage between the gate metal 5' and the semiconductor substrate 2', and the semiconductor substrate is removed. We were able to improve the electrical characteristics of the device.
以上説明した如く、本発明に係る半導体装置の
製造方法は、半導体基体表面の一部分のみ若しく
は、全表面にレーザ光を照射することによつて極
めて短時間に入熱を行い、半導体基体の歪の発生
及び外部からの不純物の混入を防止して高純度の
酸化膜を有するゲートを容易に製造することがで
きる等の効果を有するものである。 As explained above, the method for manufacturing a semiconductor device according to the present invention inputs heat in an extremely short time by irradiating only a part of the surface of the semiconductor substrate or the entire surface with laser light, thereby reducing the distortion of the semiconductor substrate. This has effects such as preventing the generation and mixing of impurities from the outside and making it possible to easily manufacture a gate having a high purity oxide film.
第１図乃至第３図は、本発明に係る半導体装置
の製造方法を示す工程図であり、第１図は、半導
体基体の表面にマスク部材を被着したものを示す
断面図、第２図は、第１図に示す半導体基体の露
出表面に酸化膜を形成し、更にその表面及びマス
ク部材の表面にゲート金属を被着したものを示す
断面図、第３図は、第２図に示す半導体基体の表
面からマスク部材と共にゲート金属を除去して得
た半導体装置を示す断面図、第４図乃至第６図
は、本発明に係る半導体装置の製造方法を適用し
て得られた凹MOS型半導体装置の製造方法を示
す工程図であり、第４図は半導体基体の表面にマ
スク部材を被着し、マスク部材および半導体基体
に凹溝を穿設したものを示す断面図、第５図は、
第４図に示す半導体基体の露出表面に酸化膜を形
成し、更にその表面及びマスク部材の表面にゲー
ト金属を被着したものを示す断面図、第６図は、
第２図に示す半導体基体の表面からマスク部材と
共にゲート金属を除去して得た半導体装置を示す
断面図、第７図は、レーザ光の入射深さと入射量
の関係を示す曲線図、第８図は、レーザ光の波長
と光吸収係数との関係を示す曲線図である。
１，１′……フイールド酸化膜、２，２′……半
導体基体、３，３′……マスク部材、４，４′……
酸化膜、５，５′……ゲート金属、６，６′……半
導体装置。
1 to 3 are process diagrams showing a method for manufacturing a semiconductor device according to the present invention, FIG. 1 is a cross-sectional view showing a mask member coated on the surface of a semiconductor substrate, and FIG. 1 is a cross-sectional view showing an oxide film formed on the exposed surface of the semiconductor substrate shown in FIG. 1, and a gate metal coated on that surface and the surface of the mask member; FIG. 4 to 6 are cross-sectional views showing a semiconductor device obtained by removing the gate metal together with a mask member from the surface of a semiconductor substrate. FIG. 4 is a cross-sectional view showing a method of manufacturing a type semiconductor device, in which a mask member is attached to the surface of a semiconductor substrate and grooves are formed in the mask member and the semiconductor substrate; FIG. teeth,
FIG. 6 is a cross-sectional view showing an oxide film formed on the exposed surface of the semiconductor substrate shown in FIG. 4, and a gate metal coated on that surface and the surface of the mask member.
FIG. 2 is a cross-sectional view showing a semiconductor device obtained by removing the gate metal together with the mask member from the surface of the semiconductor substrate; FIG. 7 is a curve diagram showing the relationship between the incident depth and amount of laser light; The figure is a curve diagram showing the relationship between the wavelength of laser light and the optical absorption coefficient. 1, 1'... Field oxide film, 2, 2'... Semiconductor substrate, 3, 3'... Mask member, 4, 4'...
Oxide film, 5, 5'... Gate metal, 6, 6'... Semiconductor device.
Claims (1)
を残してマスク部材を被着した後、酸化性雰囲気
中にて該半導体基体の表面にレーザ光を照射して
前記ゲート電極形成予定領域に酸化膜を形成し、
次いで、該酸化膜及び前記マスク部材の表面にゲ
ート金属を被着後、前記マスク部材の表面に被着
されたゲート金属を前記マスク部材と共に除去す
ることにより、所定パターンのゲートを形成する
ことを特徴とする半導体装置の製造方法。 ２ レーザ光は、可視領域から遠紫外領域に及ぶ
範囲内の波長を有するものである特許請求の範囲
第１項記載の半導体装置の製造方法。 ３ マスク部材は、アルミニウム、モリブデン、
クロム、二酸化ケイ素、ポリメチルメタアクリレ
ートなどからなる群より選ばれた１種または２種
以上である特許請求の範囲第１項記載の半導体装
置の製造方法。[Scope of Claims] 1. After depositing a mask member on the surface of a semiconductor substrate leaving a region where a gate electrode is to be formed, the gate electrode is formed by irradiating the surface of the semiconductor substrate with laser light in an oxidizing atmosphere. Form an oxide film on the planned area,
Next, after depositing a gate metal on the oxide film and the surface of the mask member, the gate metal deposited on the surface of the mask member is removed together with the mask member to form a gate in a predetermined pattern. A method for manufacturing a featured semiconductor device. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the laser light has a wavelength within a range from the visible region to the far ultraviolet region. 3 The mask member is made of aluminum, molybdenum,
2. The method for manufacturing a semiconductor device according to claim 1, wherein the material is one or more selected from the group consisting of chromium, silicon dioxide, polymethyl methacrylate, and the like.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP407979A JPS5596681A (en) | 1979-01-17 | 1979-01-17 | Method of fabricating semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP407979A JPS5596681A (en) | 1979-01-17 | 1979-01-17 | Method of fabricating semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5596681A JPS5596681A (en) | 1980-07-23 |
| JPS6151432B2 true JPS6151432B2 (en) | 1986-11-08 |
Family
ID=11574780
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP407979A Granted JPS5596681A (en) | 1979-01-17 | 1979-01-17 | Method of fabricating semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5596681A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60216559A (en) * | 1984-04-12 | 1985-10-30 | Fuji Electric Corp Res & Dev Ltd | Formation of oxide film |
| JPS6271245A (en) * | 1986-09-12 | 1987-04-01 | Toshiba Corp | Manufacture of semiconductor device |
| JP2000332125A (en) | 1999-05-18 | 2000-11-30 | Nec Corp | Semiconductor device and manufacturing method thereof |
-
1979
- 1979-01-17 JP JP407979A patent/JPS5596681A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5596681A (en) | 1980-07-23 |
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