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JPS6151774B2 - - Google Patents
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JPS6151774B2 - - Google Patents

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Publication number
JPS6151774B2
JPS6151774B2 JP15311178A JP15311178A JPS6151774B2 JP S6151774 B2 JPS6151774 B2 JP S6151774B2 JP 15311178 A JP15311178 A JP 15311178A JP 15311178 A JP15311178 A JP 15311178A JP S6151774 B2 JPS6151774 B2 JP S6151774B2
Authority
JP
Japan
Prior art keywords
liquid crystal
voltage
electronic switch
resistor
resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP15311178A
Other languages
Japanese (ja)
Other versions
JPS5579491A (en
Inventor
Masaaki Kitajima
Hideaki Kawakami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP15311178A priority Critical patent/JPS5579491A/en
Publication of JPS5579491A publication Critical patent/JPS5579491A/en
Publication of JPS6151774B2 publication Critical patent/JPS6151774B2/ja
Granted legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Liquid Crystal Display Device Control (AREA)

Description

【発明の詳細な説明】 本発明は、液晶表示装置の駆動装置に係り、特
に、駆動電圧の波形歪みを低減する回路に関す
る。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a driving device for a liquid crystal display device, and more particularly to a circuit for reducing waveform distortion of a driving voltage.

従来、液晶マトリクスパネルを線順次走査方式
でかつ電圧平均化法で交流駆動することが知られ
ている。先に我々は、この種の駆動方式を具体的
に実現する回路として第1図に示す方式を提案し
た。(特願昭51−112994号) 第1図において液晶パネル1の走査電極2及び
信号電極3へは、電子スイツチ回路5a,5bか
ら、走査電圧、信号電圧が印加される。電子スイ
ツチ回路5a,5bの電子スイツチ6a,6b及
び7a,7bでは、スイツチの開閉により選択電
圧VS1,VS2及び非選択電圧VNS1,VNS2を出力
する。一方、電子スイツチを開閉する信号は、走
査回路4及び直・並列変換回路10、ラインメモ
リ9により得る。ここで、走査側の電子スイツチ
6a,6bに加える選択電圧VS1と非選択電圧V
NS1及び信号側の電子スイツチ7a,7bに加え
る選択電圧VS2と非選択電圧VNS2は駆動電圧発
生回路11で発生させる。我々は、第2図に示す
駆動電圧発生回路を提案した(特願昭−52−
67044号) 第2図の回路は、抵抗分圧回路12aと電子ス
イツチ回路14aで構成されている。抵抗分圧回
路12aは、マトリクス駆動に必要なV0〜V4
の電圧を発生する。これらの電圧を電子スイツチ
回路14b,14cに加える。また選択信号入力
端子13に選択信号CPを加え、電子スイツチを
交互に開閉することで、選択電圧VS1,VS2及び
非選択電圧VNS1,VNS2を発生する。第3図に、
選択信号CPと選択スイツチ出力端子14d〜1
4gに現われる電圧の関係を示す。
Conventionally, it has been known to AC drive a liquid crystal matrix panel using a line sequential scanning method and a voltage averaging method. Previously, we proposed the system shown in FIG. 1 as a circuit that specifically implements this type of drive system. (Japanese Patent Application No. 51-112994) In FIG. 1, scanning voltages and signal voltages are applied to scanning electrodes 2 and signal electrodes 3 of liquid crystal panel 1 from electronic switch circuits 5a and 5b. The electronic switches 6a, 6b and 7a, 7b of the electronic switch circuits 5a, 5b output selection voltages V S1 , V S2 and non-selection voltages V NS1 , V NS2 by opening and closing the switches. On the other hand, signals for opening and closing the electronic switch are obtained by the scanning circuit 4, the serial/parallel conversion circuit 10, and the line memory 9. Here, the selection voltage V S1 and the non-selection voltage V S1 applied to the electronic switches 6a and 6b on the scanning side are
The selection voltage V S2 and non-selection voltage V NS2 to be applied to NS1 and the signal side electronic switches 7a and 7b are generated by a drive voltage generation circuit 11. We have proposed the drive voltage generation circuit shown in Fig. 2 (Patent Application No. 52-
No. 67044) The circuit shown in FIG. 2 is composed of a resistive voltage divider circuit 12a and an electronic switch circuit 14a. The resistor voltage divider circuit 12a has V0 to V4 necessary for matrix drive.
Generates a voltage of These voltages are applied to electronic switch circuits 14b and 14c. Further, by applying a selection signal CP to the selection signal input terminal 13 and alternately opening and closing the electronic switch, selection voltages V S1 , V S2 and non-selection voltages V NS1 , V NS2 are generated. In Figure 3,
Selection signal CP and selection switch output terminal 14d~1
The relationship between the voltages appearing at 4g is shown.

ところで、抵抗分圧回路12aの電圧V0〜V
4は、第4図に示したように選択信号CPの立上
りと立下りの過渡時に変動する。これは、選択ス
イツチ内の浮遊静電容量CO、液晶の静電容量CC
と抵抗分圧回路の抵抗により形成される充放電回
路に起因する。この電圧変動の結果、液晶に加わ
る電圧は、第5図に示したようになる。図は、1
例として非点灯画素に加わる電圧を示したもので
ある。これに示す電圧波形歪みは、液晶パネルに
表示する文字数、種類により変化する。これは、
クロストークの発生、コントラストの変動を引き
起こすとともに電圧波形の非対称で直流分が増加
し、液晶パネルの劣化を引き起す。一方、この波
形歪みを小さくするには、抵抗分圧回路の抵抗を
低くする必要がある。しかし、これは、装置の消
費電力を増加させて望ましくない。
By the way, the voltage V0 to V of the resistive voltage divider circuit 12a
4 fluctuates during the transition between the rise and fall of the selection signal CP, as shown in FIG. This is the stray capacitance C O in the selection switch, and the capacitance C C of the liquid crystal.
This is due to the charge/discharge circuit formed by the resistance of the resistor voltage divider circuit. As a result of this voltage variation, the voltage applied to the liquid crystal becomes as shown in FIG. The figure is 1
As an example, the voltage applied to a non-lit pixel is shown. The voltage waveform distortion shown here changes depending on the number and type of characters displayed on the liquid crystal panel. this is,
This causes crosstalk, contrast fluctuations, and asymmetric voltage waveforms that increase the DC component, causing deterioration of the liquid crystal panel. On the other hand, in order to reduce this waveform distortion, it is necessary to lower the resistance of the resistive voltage divider circuit. However, this increases the power consumption of the device, which is undesirable.

本発明の目的は、従来の問題点を解決し、低消
費電力の液晶表示装置を提供するにある。
An object of the present invention is to solve the conventional problems and provide a liquid crystal display device with low power consumption.

本発明の特徴とするところを要約すれば、選択
電圧及び非選択電圧の電位が変化する過渡時と、
定常時で、抵抗分圧回路の抵抗値をかえるもので
ある。これは、高抵抗で構成した抵抗分圧回路と
低抵抗で構成した抵抗分圧回路を備えて、それぞ
れの抵抗分圧回路から同電位の電圧を2ペア電子
スイツチに加える。そして、過渡時には、低抵抗
側を選択し、また、定常時には、高抵抗測を選択
する。さらに、低抵抗測を選択する時間は、すく
なくとも波形歪みが十分小さくなるように設定す
る。
To summarize the features of the present invention, during a transient period when the potentials of the selection voltage and the non-selection voltage change,
It changes the resistance value of the resistor voltage divider circuit during steady state. This is equipped with a resistance voltage divider circuit made of high resistance and a resistance voltage divider circuit made of low resistance, and voltages of the same potential are applied from each resistance voltage divider circuit to two pairs of electronic switches. Then, during a transient period, a low resistance measurement is selected, and during a steady state, a high resistance measurement is selected. Furthermore, the time for selecting the low resistance measurement is set so that at least the waveform distortion is sufficiently small.

以下、本発明の実施例を説明する。 Examples of the present invention will be described below.

第6図は、本発明の具体的な実施例図を示した
ものである。電源端子15とGND間には、可変
抵抗17aとこれに接続されている抵抗分圧回路
(1)17と抵抗分圧回路(2)18がある。抵抗分圧回
路(1)17は、抵抗17b〜17fで構成されてお
り、従来と同様に各抵抗の比を1:1:(a−
4):1:1に設定する。一方、抵抗分圧回路(2)
18は、抵抗18a〜18eで構成されており、
電子スイツチ19を経て電圧が供給される。この
電子スイツチ19は、遮断信号入力端子16に供
給される遮断信号CP1により開閉する。なお、
各抵抗の比は、抵抗分圧回路(1)17と同様にす
る。ここで、抵抗分圧回路(1)17の抵抗Raは抵
抗分圧回路(2)18の抵抗Rbより高くする。ま
た、2つの電子スイツチで2ペア電子スイツチ2
2iを構成する。以上により、抵抗分圧回路の最
高電圧を電圧V0とすると、各点の電圧は、マト
リクス駆動に必要な(1−1/a)・V0、(1−
2/a)・V0、2/a・V0、1/a・V0となる。
FIG. 6 shows a concrete embodiment of the present invention. Between the power supply terminal 15 and GND, there is a variable resistor 17a and a resistive voltage divider circuit connected to it.
There is (1) 17 and a resistor voltage divider circuit (2) 18. The resistor voltage divider circuit (1) 17 is composed of resistors 17b to 17f, and the ratio of each resistor is set to 1:1:(a-
4): Set to 1:1. On the other hand, resistor voltage divider circuit (2)
18 is composed of resistors 18a to 18e,
Voltage is supplied via an electronic switch 19. This electronic switch 19 is opened and closed by a cutoff signal CP1 supplied to the cutoff signal input terminal 16. In addition,
The ratio of each resistor is the same as that of the resistor voltage divider circuit (1) 17. Here, the resistance R a of the resistance voltage divider circuit (1) 17 is set higher than the resistance R b of the resistance voltage divider circuit (2) 18. In addition, two electronic switches can be used to create two pairs of electronic switches.
Configure 2i. From the above, if the highest voltage of the resistive voltage divider circuit is the voltage V 0 , the voltage at each point is (1-1/a)·V 0 , (1-1/a) required for matrix drive.
2/a)・V 0 , 2/a・V 0 , 1/a・V 0 .

抵抗分圧回路で得られた電圧のうち、同電位の
電圧を、電子スイツチ回路22の電子スイツチ2
2a〜22fに加える。電圧(1−1/a)・V0
は、電子スイツチ22aと22b、(1−2/
a)・V0は電子スイツチ22cと22d、2/
a・V0は電子スイツチ22eと22f、1/
a・V0は22gと22fにそれぞれ供給する。
Of the voltages obtained by the resistance voltage divider circuit, the voltages with the same potential are applied to the electronic switch 2 of the electronic switch circuit 22.
Add to 2a-22f. Voltage (1-1/a)・V 0
are electronic switches 22a and 22b, (1-2/
a)・V 0 is electronic switch 22c and 22d, 2/
a・V 0 are electronic switches 22e and 22f, 1/
a·V 0 is supplied to 22g and 22f, respectively.

各電子スイツチには、電圧選択信号入力端子2
0に加える電圧選択信号CP2及びインバータ2
1を経たCP2により開閉する。これにより、電
子スイツチの電圧出力端子23a〜23dに現わ
れる電圧は、常に同電位となる。
Each electronic switch has two voltage selection signal input terminals.
0 voltage selection signal CP2 and inverter 2
It is opened and closed by CP2 after passing through 1. As a result, the voltages appearing at the voltage output terminals 23a to 23d of the electronic switch always have the same potential.

以上の動作により得られた電圧は、第2図に示
した、電子スイツチ回路14aに供給される。一
方、第7図に第6図に必要な制御信号CP1とCP
2及び第2図に示した選択信号CPのタイムチヤ
ートを示す。抵抗分圧回路の各電圧の変動は選択
信号CPの立上り、立下り時の過渡時に発生す
る。これ以外の定常時では、抵抗で分圧された電
圧となる。この電圧変動時間を短縮して駆動波形
歪みを小さくするために時間ΔTの間だけ、遮断
信号CP1により第5図に示した電子スイツチ1
9を閉じる。さらに、電子スイツチ回路22の電
子スイツチのうち22a,22c,22e,22
gを閉じ、他方スイツチを開く。これは電圧選択
信号CP2で制御する。これにより、時間ΔTの
間だけ、選択スイツチ回路22から見た、抵抗分
圧回路の抵抗値が低くなる。この結果、静電容量
O,CCと抵抗分圧回路の抵抗による充放電時間
が短かくなり電圧変動抵抗を短縮できる。
The voltage obtained by the above operation is supplied to the electronic switch circuit 14a shown in FIG. On the other hand, Fig. 7 shows the control signals CP1 and CP necessary for Fig. 6.
2 and a time chart of the selection signal CP shown in FIG. Fluctuations in each voltage of the resistor voltage divider circuit occur during transitions at the rise and fall of the selection signal CP. In other steady states, the voltage is divided by the resistors. In order to shorten this voltage fluctuation time and reduce drive waveform distortion, the electronic switch 1 shown in FIG.
Close 9. Furthermore, among the electronic switches of the electronic switch circuit 22, 22a, 22c, 22e, 22
Close g and open the other switch. This is controlled by voltage selection signal CP2. As a result, the resistance value of the resistance voltage divider circuit as seen from the selection switch circuit 22 becomes low only during the time ΔT. As a result, the charging and discharging time due to the capacitances C O and C C and the resistance of the resistance voltage divider circuit is shortened, and the voltage fluctuation resistance can be shortened.

一方、時間ΔT以外の定常時では、電子スイツ
チ19を開き、抵抗分圧回路における消費電力を
小さくする。なお、液晶マトリクス駆動の最適条
件を満足するには、抵抗17d及び抵抗18cで
調整し、また、明るさの調整は抵抗17aで行
う。
On the other hand, during a steady state other than the time ΔT, the electronic switch 19 is opened to reduce the power consumption in the resistance voltage divider circuit. Note that in order to satisfy the optimum conditions for driving the liquid crystal matrix, adjustment is performed using the resistor 17d and resistor 18c, and brightness adjustment is performed using the resistor 17a.

第8図に本発明の変形例を示す。抵抗分圧回路
で得られる電圧のうち(1−2/a)・V0及び
2/a・V0の電圧変動が最つとも著しい。これ
は、選択スイツチ回路から見た抵抗分圧回路の抵
抗が他と比較して大きくなり、充放電時間が長く
なるためである。そこで、前記した両電圧を得る
抵抗分圧回路(2)25と抵抗分圧回路(1)24で、マ
トリクス駆動に必要な電圧を得る。また、電圧の
切り換えは、電択スイツチ回路26で行う。な
お、信号CP1,CP2のタイムチヤートは、第7
図と同様である。この結果、回路を簡略化でき、
駆動波形歪みを小さくできる。
FIG. 8 shows a modification of the present invention. Among the voltages obtained by the resistance voltage divider circuit, the voltage fluctuations of (1-2/a)·V 0 and 2/a·V 0 are the most remarkable. This is because the resistance of the resistance voltage divider circuit as seen from the selection switch circuit is larger than other circuits, and the charging/discharging time becomes longer. Therefore, the voltage necessary for matrix driving is obtained by the resistive voltage divider circuit (2) 25 and the resistive voltage divider circuit (1) 24 that obtain both of the voltages described above. Further, switching of the voltage is performed by the selection switch circuit 26. In addition, the time chart of signals CP1 and CP2 is the 7th
It is similar to the figure. As a result, the circuit can be simplified,
Drive waveform distortion can be reduced.

本発明によれば、液晶マトリクス駆動に必要な
電圧を得るのに従来用いていた抵抗分圧回路の特
徴を損なうことなく、駆動波形の歪みを低減する
ことができる。さらに、抵抗分圧回路の消費電力
を低くできる。これにより、クロストークの発生
を防止できまたコントラストの変動をなくすこと
ができる。さらに、直流電圧分を低くでき、液晶
パネルの劣化を防止できる。また、駆動装置の消
費電力を低減できる。
According to the present invention, distortion of the drive waveform can be reduced without impairing the characteristics of the resistive voltage divider circuit conventionally used to obtain the voltage necessary for driving the liquid crystal matrix. Furthermore, the power consumption of the resistive voltage divider circuit can be reduced. This makes it possible to prevent the occurrence of crosstalk and to eliminate variations in contrast. Furthermore, the DC voltage component can be lowered and deterioration of the liquid crystal panel can be prevented. Furthermore, power consumption of the drive device can be reduced.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、先行技術による液晶マトリクスパネ
ル駆動装置の回路図、第2図は、先行技術による
駆動電圧発生回路の回路図、第3図は、第2図に
示した回路により得られる電圧波形、第4図は、
第2図に示した抵抗分圧回路の各点の電圧波形、
第5図は、液晶に加わる電圧波形の1例、第6図
は本発明の一実施例、第7図は、第6図に示した
信号のタイムチヤート図、第8図は、本発明の変
形例である。 17a〜17f……抵抗、18a〜18e……
抵抗、19……電子スイツチ、21……インバー
タ、22(22a〜22h)……電子スイツチ回
路。
FIG. 1 is a circuit diagram of a liquid crystal matrix panel driving device according to the prior art, FIG. 2 is a circuit diagram of a driving voltage generation circuit according to the prior art, and FIG. 3 is a voltage waveform obtained by the circuit shown in FIG. 2. , Figure 4 is
The voltage waveform at each point of the resistor voltage divider circuit shown in Figure 2,
FIG. 5 is an example of a voltage waveform applied to a liquid crystal, FIG. 6 is an embodiment of the present invention, FIG. 7 is a time chart of the signal shown in FIG. 6, and FIG. 8 is a diagram of an embodiment of the present invention. This is a modified example. 17a to 17f...Resistance, 18a to 18e...
Resistor, 19...electronic switch, 21...inverter, 22 (22a to 22h)...electronic switch circuit.

Claims (1)

【特許請求の範囲】 1 液晶パネルと該液晶パネルを駆動する駆動装
置とを有する液晶表示装置において該駆動装置に
含まれる電圧発生回路を複数の抵抗を直列に接続
した抵抗群2組で構成し、一対の電位端子間に並
列に接続して、該電位端子および該抵抗接続間の
同電位の2電圧を2ペア電子スイツチに入力して
該2ペア電子スイツチの開閉によりマトリクス駆
動に必要な電圧を発生することを特徴とした液晶
表示装置。 2 特許請求の範囲第1項記載の液晶表示装置に
おいて、すくなくとも前記抵抗群の一方に抵抗と
直列にすくなくとも1個の電子スイツチを設け
て、該2ペア電子スイツチの開閉と同期して該電
子スイツチを開閉することを特徴とした液晶表示
装置。 3 特許請求範囲の第1項記載の液晶表示装置に
おいて、該抵抗群の一方を高抵抗で構成し、他方
の抵抗群を低抵抗で構成したことを特徴とした液
晶表示装置。 4 特許請求の範囲第1項記載の液晶表示装置に
おいて、該駆動装置で発生する選択電圧及び非選
択圧の電位が変化する過渡時に一定時間ΔTだ
け、該2ペア電子スイツチで該抵抗群のうち低抵
抗側を選択し、これ以外の時間では該2ペア電子
スイツチで該抵抗群のうち高抵抗側を選択すると
ともに該抵抗群のうち低抵抗側を該電位端子から
切離すことを特徴とした液晶表示装置。
[Claims] 1. In a liquid crystal display device having a liquid crystal panel and a driving device for driving the liquid crystal panel, a voltage generating circuit included in the driving device is constituted by two resistor groups each having a plurality of resistors connected in series. , are connected in parallel between a pair of potential terminals, and two voltages of the same potential between the potential terminal and the resistor connection are input to a two-pair electronic switch, and the voltage required for matrix drive is generated by opening and closing the two-pair electronic switch. A liquid crystal display device characterized by generating. 2. In the liquid crystal display device according to claim 1, at least one electronic switch is provided in series with the resistor in at least one of the resistor groups, and the electronic switch is activated in synchronization with opening and closing of the two-pair electronic switch. A liquid crystal display device characterized by opening and closing. 3. A liquid crystal display device according to claim 1, wherein one of the resistor groups has a high resistance and the other resistor group has a low resistance. 4. In the liquid crystal display device according to claim 1, the two-pair electronic switch switches one of the resistance groups for a certain period of time ΔT during a transition in which the selection voltage and non-selection voltage potentials generated in the drive device change. The low resistance side is selected, and at other times, the two-pair electronic switch selects the high resistance side of the resistance group and disconnects the low resistance side of the resistance group from the potential terminal. LCD display device.
JP15311178A 1978-12-13 1978-12-13 Liquid crystal display unit Granted JPS5579491A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15311178A JPS5579491A (en) 1978-12-13 1978-12-13 Liquid crystal display unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15311178A JPS5579491A (en) 1978-12-13 1978-12-13 Liquid crystal display unit

Publications (2)

Publication Number Publication Date
JPS5579491A JPS5579491A (en) 1980-06-14
JPS6151774B2 true JPS6151774B2 (en) 1986-11-10

Family

ID=15555204

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15311178A Granted JPS5579491A (en) 1978-12-13 1978-12-13 Liquid crystal display unit

Country Status (1)

Country Link
JP (1) JPS5579491A (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57114188A (en) * 1980-12-30 1982-07-15 Suwa Seikosha Kk Voltage dividing circuit in liquid-crystal drive circuit
JPS6167893A (en) * 1984-09-12 1986-04-08 松下電器産業株式会社 Display element drive circuit
JPS61124020U (en) * 1985-01-19 1986-08-05
JPS61294415A (en) * 1985-06-24 1986-12-25 Toshiba Corp Power source circuit
JP3807322B2 (en) 2002-02-08 2006-08-09 セイコーエプソン株式会社 Reference voltage generation circuit, display drive circuit, display device, and reference voltage generation method

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JPS5579491A (en) 1980-06-14

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