JPS6155770B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for assembling a semiconductor device, and particularly to a method for assembling a single-in-line (SIL) type IC.

Conventional SIL type ICs have adopted lead frames with lead pattern arrangements as shown in Figure 1. That is, a large number of leads 12 are arranged around the tab 10 having the lead 10a, and these leads 12 are led out in the same direction together with the lead 10a.

However, according to this conventional arrangement,
When die bonding the IC chip 14 to the tab 10 or wire bonding between the IC chip 14 and the tip of the lead 12, the leads 10a, 12 are pressed in area A (that is, the area where the lead is held down by the lead holding plate 17). However, since the suppressing effect is not sufficiently exerted on the tab 10, the positional accuracy of the tab 10 is poor, resulting in a disadvantage that the accuracy of die bonding and wire bonding is reduced.

An object of this invention is to prevent the tab from moving or floating during die bonding or wire bonding, and to perform bonding with high precision.

In order to achieve this object, the present invention provides a tab with a plurality of extensions and exerts a pressing effect on the tab through these extensions.The following describes the tab in detail with reference to the accompanying drawings. .

FIG. 2 shows a SIL type IC according to an embodiment of the present invention.
This figure shows the lead pattern arrangement in FIG. 1, and the same parts as in FIG.
The feature of the embodiment shown in FIG. 2 is that the tab 10
A plurality of extension portions 10a, 10b are provided in the area, and each of the extension portions 10a, 10b intersects with the holding area A. That is, the lead is held down by a lead holding plate 17 having a hole opened so that the tab to be bonded and the lead tip are exposed. At this time, the extension part 10b of the tab
It's also suppressed. The extended portion 10a is a slightly modified version of the conventional lead 10a (FIG. 1), and is pulled out of the resin package 16, whereas the extended portion 10b is inserted into the resin package 16, as shown in FIG. It cannot be derived outside of that.

According to this configuration, as shown in FIG. 2, when the lead is held down by the lead holding plate 17, the holding effect is effectively exerted on the tab 10 via the extension portions 10a and 10b, which improves die bonding accuracy and Wire bonding accuracy can be greatly improved. In other words, the tab that has been drawn out for a long time does not move or float during bonding, and bonding accuracy can be improved. Moreover, since the extension portion 10b is not exposed from the resin package 16 as shown in FIG. 3, there is no fear of moisture resistance deterioration.

[Brief explanation of the drawing]

Figure 1 is a plan view showing the lead pattern arrangement in a conventional SIL type IC, Figures 2 and 3 are
FIG. 2 is a plan view showing a lead pattern arrangement in a SIL type IC according to an embodiment of the present invention. 10...Tab, 10a, 10b...Extension part, 12
... Lead, 14... IC chip, 16... Resin package, A... Holding area, 17... Lead holding plate.

Claims (1)

[Claims] 1. It has a tab to which a semiconductor pellet is to be fixed and a plurality of leads, and the tab has an extension part integrally connected to the lead extending from one side and an extension part integrally connected to the lead extending from the other side. A lead frame is provided with an extended portion that is not connected to the lead frame, and during pellet attachment or wire bonding, the vicinity of the tip of the lead to be wire bonded around the tab and the extended portion are held down with a holding plate, and A method for assembling a semiconductor device, characterized in that an extended portion that is not integrally connected to the lead is sealed with resin.