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JPS6156658B2 - - Google Patents
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JPS6156658B2 - - Google Patents

Info

Publication number
JPS6156658B2
JPS6156658B2 JP56129235A JP12923581A JPS6156658B2 JP S6156658 B2 JPS6156658 B2 JP S6156658B2 JP 56129235 A JP56129235 A JP 56129235A JP 12923581 A JP12923581 A JP 12923581A JP S6156658 B2 JPS6156658 B2 JP S6156658B2
Authority
JP
Japan
Prior art keywords
line
image signal
signal
image
signals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56129235A
Other languages
Japanese (ja)
Other versions
JPS5830270A (en
Inventor
Masanori Okamoto
Hiroyuki Nomura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Tottori Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tottori Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Tottori Sanyo Electric Co Ltd
Priority to JP56129235A priority Critical patent/JPS5830270A/en
Publication of JPS5830270A publication Critical patent/JPS5830270A/en
Publication of JPS6156658B2 publication Critical patent/JPS6156658B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/04Scanning arrangements, i.e. arrangements for the displacement of active reading or reproducing elements relative to the original or reproducing medium, or vice versa

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Facsimiles In General (AREA)
  • Facsimile Transmission Control (AREA)
  • Facsimile Image Signal Circuits (AREA)

Description

【発明の詳細な説明】 本発明は受信側で送信側の原稿送りミスを検知
できるフアクシミリ受信機に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a facsimile receiver capable of detecting a document feeding error on the transmitting side on the receiving side.

従来、フアクシミリ送信機において、原稿の読
取が平面走査型式である時には、原稿をローラ等
で移動させ、特定個所(線分)を横切る時に原稿
を読み取つて画信号処理をしていた。ところがこ
のような場合、原稿がスリツプして同じ所を何回
も走査してしまう事があり、その時は受信側では
間伸びした記録をしてしまうが、その原稿のスリ
ツプ状態が時にはひどく、原稿送りがほとんどな
されない事があり、そのような時には、受信側で
はすだれ模様を延々と記録する。しかも、近年不
在者送信や不在者受信の機能を有したフアクシミ
リ装置が増加しているので、上述のような誤動作
が生じた時には記録紙がなくなるまで印字される
ことすらある。
Conventionally, when a facsimile transmitter uses a flat scanning method to read a document, the document is moved using a roller or the like, and image signals are processed by reading the document when it crosses a specific point (line segment). However, in such cases, the document may slip and the same area is scanned over and over again, and in that case, the receiving side records a long recording. There are times when almost no data is sent, and in such cases, the receiving side records the blind pattern endlessly. Moreover, in recent years, the number of facsimile machines having functions for sending and receiving absentee calls has increased, so when the above-mentioned malfunction occurs, printing may continue until the recording paper runs out.

本発明は上述の点を考慮してなされたもので、
以下実施例に基づいて本発明を詳細に説明する。
The present invention has been made in consideration of the above points, and
The present invention will be described in detail below based on Examples.

第1図は本発明の一実施例を示すフアクシミリ
受信機のブロツク図で、1は電話器に接続された
回線制御装置等から着信した信号を受けとる端子
で、2はその着信した信号の信号歪補正を行ない
同期信号を分離して画信号をとり出す画信号抽出
器である。3,4はラインメモリで1行分の画信
号を記憶できる容量をもち、一方のラインメモリ
に書込んでいる時は他方のラインメモリからは自
由に読出しができ、2つのラインメモリに交互に
書み込まれる様に制御回路(後述)で制御され
る。5は印字レジスタで、ラインメモリ3,4か
ら送られてきた画信号を一時蓄え、適当な速度で
プリンタ6に送り出して印字させる。7は比較器
で、ラインメモリ3,4の一方に書込まれる画信
号と他方から読出される画信号のそれぞれ1行分
を比較し、一致したら一致信号を出す。8はカウ
ンタで、比較器7の出力が連続するとその回数を
カウントし、一定時間以上とぎれるとリセツトす
る。そして、そのカウント量が40を越すと出力を
出す。9は一行分の99.5%以上が全て白又は全て
黒であるかどうかを判定する同一色判定器であ
る。10はアンドゲート、11は警報回路であ
る。12はラインメモリ3,4やレジスタの選択
やアドレツシング、各種警報の処理を行なう制御
回路である。
FIG. 1 is a block diagram of a facsimile receiver showing an embodiment of the present invention, in which 1 is a terminal for receiving an incoming signal from a line control device connected to a telephone, and 2 is a terminal for signal distortion of the incoming signal. This is an image signal extractor that performs correction, separates the synchronization signal, and extracts the image signal. Line memories 3 and 4 have the capacity to store image signals for one line, and when writing to one line memory, they can be freely read from the other line memory, and data is written to the two line memories alternately. It is controlled by a control circuit (described later) so that it is written. A print register 5 temporarily stores the image signals sent from the line memories 3 and 4, and sends them at an appropriate speed to the printer 6 for printing. A comparator 7 compares one line of the image signal written into one of the line memories 3 and 4 with the image signal read out from the other, and outputs a match signal when they match. 8 is a counter which counts the number of consecutive outputs from the comparator 7, and resets when the output is interrupted for a certain period of time or more. Then, when the count exceeds 40, it outputs an output. Reference numeral 9 denotes a same color determination device that determines whether 99.5% or more of one line is all white or all black. 10 is an AND gate, and 11 is an alarm circuit. 12 is a control circuit for selecting and addressing the line memories 3 and 4 and registers, and processing various alarms.

次に、上述の構成のフアクシミリ受信機におい
て動作を説明する。電話回線等を通じて着信した
画情報信号(画信号や同期信号等)が端子1に導
入され画信号抽出器2に送られ、そこで画信号だ
けとり出されて一方のラインメモリ(例えば4)
に送られる。画信号の1行分すなわち1主走査分
の画信号がラインメモリ4に蓄えられると、制御
回路12の指示にもとづいてラインメモリ3の方
へ次の1行の画信号が送られ、ラインメモリ4に
蓄えられた画信号は印字レジスタ5に送られる。
この時、ラインメモリ3に送られる画信号とライ
ンメモリ4から出ていく画信号は比較器7で比較
され、その両者が完全に等しければ出力を出し、
異なつていれば出力を出さない。この画信号の送
援が終ると、印字レジスタ5の内容がプリンタ6
で印字され、ラインメモリ3,4が切換られ、第
3行目は画信号抽出器2からラインメモリ4へ送
られ、第2行目はラインメモリ3から印字レジス
タ5に送られる。このようにして順次画信号が処
理されるが、ラインメモリ3,4に入つている画
信号と出てくる画信号とが一致していれば比較器
7から出量が発生し、その出力が40行分(走査線
密度が3.85本/mmとして約1cm相当)続いた場
合、異常とみなして警報回路11を動作させ、オ
ペレータを呼び出すと共に、制御回路12に異常
信号を与える。そして、再度、40行分同一とみな
された時、制御回路12は受信を中止させる。こ
れらの判定において40行中1行だけ異なつていた
場合、その1行は伝送誤まりとみなしカウンタ8
はリセツトしない。尚、原稿が余白(即ち白地送
信)の時、および写真等の場合は同一画信号が1
cm以上にわたつて同一である事がしばしばあるの
で、画信号が全白、全黒および全白に罫線がある
とみなされる状態は異常でないとみなす。従つて
同一色判定器9では1行分の画信号の99.5%以上
が同一色であれば“L”出力を出し、アンドゲー
ト10を閉じてカウンタ8の出力を無視させる。
Next, the operation of the facsimile receiver having the above configuration will be explained. Image information signals (image signals, synchronization signals, etc.) received through a telephone line etc. are introduced into terminal 1 and sent to image signal extractor 2, where only the image signal is extracted and stored in one line memory (for example 4).
sent to. When one line of image signals, that is, one main scanning image signal, is stored in the line memory 4, the next line of image signals is sent to the line memory 3 based on instructions from the control circuit 12. The image signal stored in 4 is sent to a print register 5.
At this time, the image signal sent to the line memory 3 and the image signal output from the line memory 4 are compared by the comparator 7, and if they are completely equal, an output is output.
If they are different, no output will be output. When this image signal transmission is finished, the contents of the print register 5 are transferred to the printer 6.
The line memories 3 and 4 are switched, the third line is sent from the image signal extractor 2 to the line memory 4, and the second line is sent from the line memory 3 to the print register 5. In this way, the image signals are processed sequentially, but if the image signals stored in the line memories 3 and 4 match the output image signals, an output amount is generated from the comparator 7, and the output is If the line continues for 40 lines (equivalent to about 1 cm when the scanning line density is 3.85 lines/mm), it is regarded as an abnormality, and the alarm circuit 11 is activated to call an operator and give an abnormality signal to the control circuit 12. Then, when the 40 lines are deemed to be the same again, the control circuit 12 stops the reception. If only one line out of 40 lines is different in these judgments, that line is considered to be a transmission error and the counter 8
is not reset. In addition, when the original has blank spaces (that is, white background transmission), and when it is a photograph, etc., the same image signal is 1.
Since the lines are often the same over cm or more, it is considered normal for the image signal to be considered to have ruled lines in all white, all black, and all white. Therefore, if 99.5% or more of the image signals for one row are the same color, the same color determining unit 9 outputs an "L" output, closes the AND gate 10, and ignores the output of the counter 8.

第2図は本発明の他の実施例の示すフアクシミ
リ受信機のブロツク図で、第1図の場合は画信号
がそのまま扱えたのに対し、この例では符号化さ
れて送られてきた場合を例にとる。20は第1図
と同様に信号を受け取る端子で、21は符号化さ
れた画信号(以後画情報という)を受信信号から
抜き出す画情報抽出器、22は画情報抽出器で抜
き出した画情報を一時蓄えるバツフアメモリであ
る。23,24,25はそれぞれ1行分の画信号
を蓄えるラインメモリで、26,27はマルチプ
レクサである。28,29はそれぞれ画情報を画
信号に復号化する時の復号ラインアドレスカウン
タ、参照ラインアドレスカウンタ(符号化が二次
元の時)である。30は印字レジスタ、31は変
化点検出回路である。32は1行分の画信号の一
致を判定する比較回路で、1行分のラインメモリ
も内蔵している。33は制御回路、34は警報回
路である。
FIG. 2 is a block diagram of a facsimile receiver according to another embodiment of the present invention. In the case of FIG. Take for example. 20 is a terminal for receiving signals as in FIG. 1, 21 is an image information extractor that extracts an encoded image signal (hereinafter referred to as image information) from the received signal, and 22 is a terminal that extracts the image information extracted by the image information extractor. It is buffer memory that is temporarily stored. Reference numerals 23, 24, and 25 are line memories each storing one row's worth of image signals, and 26 and 27 are multiplexers. Reference numerals 28 and 29 are a decoding line address counter and a reference line address counter (when encoding is two-dimensional), respectively, when image information is decoded into an image signal. 30 is a print register, and 31 is a change point detection circuit. Reference numeral 32 denotes a comparison circuit for determining whether image signals for one row match, and also includes a line memory for one row. 33 is a control circuit, and 34 is an alarm circuit.

まず、この構成における画情報と画信号の流れ
を説明する。受信された信号は端子20から導入
され画情報抽出器21で歪補正され他の信号と分
離されたのちバツフアメモリ22に導入される。
このバツフアメモリ22に蓄えられた画情報(符
号例)を、特定のクロツクで呼び出し、復号テー
ブル(図示せず)を参照する事で復号化2値信号
(画信号)を得、マルチプレクサ26を通つてラ
インメモリ23,24,25のうち1つに書込
む。これは第1図の場合と同様に循環的に1行毎
に次のラインメモリ24,25,23に書込ま
れ、書込中でないラインメモリの1つからはマル
チプレクサ27を通して印字レジスタ30に画信
号を送る。ところでこれは1次元符号化信号の場
合であるが、2次元の時は復号化にあたつては、
参照ラインとなるべきラインメモリの内容から黒
→白又は白→黒の変化点を変化点検出回路31で
検出し、その個所を制御回路に導いて復号化に用
いる。これらの復号化、参照、各ラインメモリへ
の書込/読出はすべて所定のクロツクで制御する
ため、ラインメモリ23,24,25は復号化ラ
インアドレスカウンタ28と参照ラインアドレス
カウンタ29によつて歩進させる。
First, the flow of image information and image signals in this configuration will be explained. The received signal is introduced from a terminal 20, subjected to distortion correction by an image information extractor 21, separated from other signals, and then introduced to a buffer memory 22.
The image information (code example) stored in the buffer memory 22 is called with a specific clock, a decoded binary signal (image signal) is obtained by referring to a decoding table (not shown), and the decoded binary signal (image signal) is sent through the multiplexer 26. Write to one of the line memories 23, 24, and 25. This is written cyclically line by line to the next line memories 24, 25, 23 as in the case of FIG. send a signal. By the way, this is the case of a one-dimensional encoded signal, but when decoding a two-dimensional signal,
A change point detection circuit 31 detects a change point from black to white or white to black from the contents of a line memory to be a reference line, and the detected point is guided to a control circuit and used for decoding. Since decoding, reference, and writing/reading to each line memory are all controlled by a predetermined clock, the line memories 23, 24, and 25 are controlled by a decoding line address counter 28 and a reference line address counter 29. advance.

バツフアメモリ22からマルチプレクサ26に
信号援受する際、制御回路33では画情報又は画
信号からその信号に含まれる白信号の数と黒信号
の数を計数比較しそのほとんどが同一色かどうか
を判断する。これは前述の同一色判定器に相当す
るが、画信号の符号例となつているため全白(又
は全黒およびそれに準ずるもの)の復号テーブル
にマークをつけ、その復号テーブルが参照された
か否かを監視しておけば容易に判断される。そし
て同一色でない場合には200行毎(走査線密度が
3.85本/mmとして約5.2cm相当)に比較回路32
に信号を送る。比較回路32では、この信号によ
りマルチプレクサ27から印字レジスタ30に出
ようとしている1行分の画信号を内蔵するライン
メモリにとり込み、それとマルチプレクサ26を
通つてラインメモリ23〜25に書込まれようと
する1行分の画信号と比較する。その両者が異な
る時は比較回路32はそのまま比較動作を終了す
るが、等しい時は制御回路33に一致信号を送
る。一致信号を受けた制御回路33は次の200行
を待たずに信号を発生し再び比較させる事によつ
て前記一致が偶然か否かを判定させる。そして再
び一致信号を受けた時は異常とみなし警報回路3
4にオペレータに報知したり受信を中断させたり
する。
When receiving signals from the buffer memory 22 to the multiplexer 26, the control circuit 33 counts and compares the number of white signals and the number of black signals included in the signal from the image information or image signal, and determines whether most of them are of the same color. . This corresponds to the same color determiner described above, but since it is an example of the image signal code, it marks the decoding table for all white (or all black and similar) and determines whether that decoding table has been referenced. It is easy to judge if you keep an eye on it. If the color is not the same, every 200 lines (scanning line density is
3.85 lines/mm, equivalent to approximately 5.2cm)
send a signal to. In response to this signal, the comparator circuit 32 takes in the image signal for one line that is about to be output from the multiplexer 27 to the print register 30 into the built-in line memory, and then passes it through the multiplexer 26 to determine whether it is going to be written into the line memories 23 to 25. The image signal for one row is compared. If the two are different, the comparison circuit 32 ends the comparison operation, but if they are equal, it sends a match signal to the control circuit 33. Upon receiving the coincidence signal, the control circuit 33 generates a signal without waiting for the next 200 rows and compares again to determine whether or not the coincidence is a coincidence. When a matching signal is received again, it is considered abnormal and the alarm circuit 3
4, the operator is notified or the reception is interrupted.

即ち第1図の例においては毎行比較し一定長さ
以上同一画であれば異常としたのに対し、第2図
の例では一定行毎に比較し続けて同一画であれば
異常とした。尚いずれも検出間隔(前者で1cm後
者で5.2cm)は通常書かれる文字大きさ(5mm乃
至8mm)又は罫線間隔(7mm前後)の整数倍とな
らない方がよい。
That is, in the example shown in Figure 1, each line is compared and if the same image is longer than a certain length, it is considered abnormal, whereas in the example shown in Figure 2, each line is compared continuously and if the same image is the same, it is considered abnormal. . In both cases, the detection interval (1 cm for the former and 5.2 cm for the latter) should not be an integral multiple of the normally written character size (5 mm to 8 mm) or the ruled line interval (approximately 7 mm).

以上の如く本発明は、着信した信号から1行分
の画信号を記録する記憶回路と、その記憶回路に
記憶した画信号のn行後(但しnは自然数)の画
信号と記憶回路に記憶した画信号とを比較する比
較器と、比較器が両者の一致を判断した時に警報
を発する警報手段とを有したフアクシミリ受信機
であるから、送信機側で原稿がスリツプした時を
容易に検出し警報できる。
As described above, the present invention includes a memory circuit that records an image signal for one line from an incoming signal, and an image signal for n lines after the image signal stored in the memory circuit (where n is a natural number) and the image signal that is stored in the memory circuit. This facsimile receiver is equipped with a comparator that compares the original image signal and an alarm means that issues an alarm when the comparator determines that the two match, so it is easy to detect when the original slips on the transmitter side. It can be used to alert you.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例のフアクシミリ受信
機のブロツク図、第2図は本発明の他の実施例の
フアクシミリ受信機のブロツク図である。 1,20……端子、2,21……画信号(画情
報)抽出器、3,4,23,24,25……ライ
ンメモリ、5,20……印字レジスタ、7,22
……比較器(回路)、8……カウンタ、9……同
一色判定器、11,34……警報回路、12,3
3……制御回路、26,27……マルチプレク
サ。
FIG. 1 is a block diagram of a facsimile receiver according to one embodiment of the present invention, and FIG. 2 is a block diagram of a facsimile receiver according to another embodiment of the present invention. 1, 20... terminal, 2, 21... image signal (image information) extractor, 3, 4, 23, 24, 25... line memory, 5, 20... print register, 7, 22
... Comparator (circuit), 8 ... Counter, 9 ... Same color determiner, 11, 34 ... Alarm circuit, 12, 3
3...control circuit, 26, 27...multiplexer.

Claims (1)

【特許請求の範囲】[Claims] 1 送信原稿を順次送りながら読取り、読取つた
画信号を送信するフアクシミリ送信機よりの送信
信号から1行分の画信号を抽出して記憶する記憶
回路と、記憶回路の内容に基づき記録を行なうプ
リンタと、前記記憶回路に記憶した画信号のn行
後(但しnは自然数)の画信号と記憶回路に記憶
した画信号とを比較する比較手段と、比較手段が
両者の一致を検出した時送信原稿送りの異常と判
断し、受信及び記録を中断する制御手段と、警報
を発する警報手段とを有する事を特徴とするフア
クシミリ受信機。
1. A memory circuit that extracts and stores image signals for one line from the transmission signal from a facsimile transmitter that sequentially sends and reads the transmitted original and transmits the read image signals, and a printer that records based on the contents of the memory circuit. and comparing means for comparing the image signal of n rows after the image signal stored in the storage circuit (where n is a natural number) with the image signal stored in the storage circuit, and transmitting when the comparison means detects a match between the two. A facsimile receiver comprising a control means that determines that there is an abnormality in document feeding and interrupts reception and recording, and an alarm means that issues an alarm.
JP56129235A 1981-08-17 1981-08-17 Facsimile receiver Granted JPS5830270A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56129235A JPS5830270A (en) 1981-08-17 1981-08-17 Facsimile receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56129235A JPS5830270A (en) 1981-08-17 1981-08-17 Facsimile receiver

Publications (2)

Publication Number Publication Date
JPS5830270A JPS5830270A (en) 1983-02-22
JPS6156658B2 true JPS6156658B2 (en) 1986-12-03

Family

ID=15004511

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56129235A Granted JPS5830270A (en) 1981-08-17 1981-08-17 Facsimile receiver

Country Status (1)

Country Link
JP (1) JPS5830270A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63168449U (en) * 1987-04-23 1988-11-02

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0353028B1 (en) * 1988-07-28 1997-12-29 Canon Kabushiki Kaisha Image storing apparatus

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5327129B2 (en) * 1974-05-22 1978-08-07
JPS5473511A (en) * 1977-11-25 1979-06-12 Nec Corp Transmission error detector device for facsimile

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63168449U (en) * 1987-04-23 1988-11-02

Also Published As

Publication number Publication date
JPS5830270A (en) 1983-02-22

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