JPS6156918B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an image recording device that stores television images for a long time so that they can be read out and displayed at any time. By using memory to store regular television broadcast screens as binary signals, for example, characters and figures such as names and quantities of ingredients in cooking programs and addresses on postcards can be retained for long periods of time. The aim is to provide a device that can

Conventional image recording devices of this type used analog memories such as disk memories or large-capacity digital memories;
It was very expensive and had complicated peripheral circuits.

An object of the present invention is to provide a simple and low-cost device by converting a television signal into a simple binary signal and storing it in a pattern memory.

Hereinafter, the present invention will be explained with reference to the drawings. First, FIG. 1 shows a block diagram of this embodiment. Here, the parts numbered 1 to 18 are well-known so-called teletext receivers, where 1 is a tuner for receiving television signals, and 2 is a tuner for receiving television signals.
is the VIF circuit, 3 is the video detection circuit, 4 is the amplifier circuit,
5 is a mixing circuit for switching and mixing the readout signal from the memory 17 and the video signal from the amplifier circuit 4; 6 is a video output circuit; 7 is a cathode ray tube for display;
8 is a synchronization separation circuit, and 9 is a color subcarrier regeneration circuit. In addition, 10 is a circuit for shaping the waveform of a television signal into a binary signal, and 11 is a gate circuit for extracting only the 20th H character signal superimposed section during the vertical blanking period (VBL) in the case of teletext reception. The device is also capable of extracting the 21st to 258th H video signals as described later), 12 is a circuit that counts horizontal pulses and generates gate pulses during the period when the gate circuit 11 extracts the signal, 13 is a basic clock. This is an oscillation circuit that oscillates a signal of 8sc (≒28MHz), which is phase-synchronized with the color subcarrier sc using a PLL circuit or the like. 14 is a circuit that samples the output of the gate circuit 11 using the clock pulse output from the clock generation circuit 16; 15 is a circuit that detects a start signal in the control signal when receiving teletext; the detection output is The phase of the clock generation circuit 16 is controlled to properly match the sampling clock to the phase of the received signal. This clock generation circuit 16 is a circuit including a 1/5 frequency divider circuit, and is a circuit that includes a 1/5 frequency divider circuit.
The SC basic clock is divided by 1/5 to obtain phase-synchronized pulses with the same frequency as the bit rate of the received signal, and this is further divided or gated to obtain various necessary clock pulses. Reference numeral 17 denotes a memory for storing received character signals.If character information is expressed as a pattern signal of 256 bits per line, and one screen is composed of 200 lines in total, this memory 17 has a capacity of 51,200 bits. use something Note that if the number of lines on the screen is 256, a 64K bit general-purpose IC memory can be used. Memory control circuit 18 is memory 1
This circuit controls writing and reading of the signal No. 7. Since the operation of the circuit described above is well known as a so-called teletext receiver, a detailed explanation thereof will be omitted.

Next, an outline of the present apparatus, which uses the above-mentioned teletext receiver to store ordinary television broadcast screens, will be described first. Here, it is assumed that a screen displaying ingredients of a cooking program as shown in FIG. 2A is stored. It is often desirable to leave the contents of the screen displayed in such characters stationary for a while and take notes. Therefore,
In such a case, this device slices the received video signal, extracts only the signal with the white peak of characters as shown in Figure 2B, stores this in the memory for the teletext receiver, and then continuously reproduces it ( read). At that time, while adjusting the slice level, the slice output is displayed superimposed on the image receiving screen, and after the adjustment is completed, only the output read from the memory is displayed, or it is displayed superimposed on the image receiving screen as necessary. Do it like this.

Below, referring to FIG. 3, we will first describe a circuit that converts a TV screen into a binary signal. In Figure 3, 2
1 is a transistor forming an emitter follower stage, 22 is a capacitor of a clamp circuit, and 23 is a soft clamp circuit for pedestal clamping. Therefore, as shown in FIG. 4B, the color burst is not attenuated at the clamp output end (point _P1 ). Note that FIG. 4A shows the output waveform or the detected output of the video polarity. As shown in FIG. 4B, the pedestal is clamped to, for example, OV at point _P1 . Transistor 24 is for a buffer amplifier, 25 and 26 are transistors forming a differential amplifier, 27 is an output load resistor, and when relay 28 is short-circuited between A and C, variable resistor 29 is used.
The character information in VBL is formed into a binary signal and extracted from _two points P. On the other hand, when the adjustment knob in the adjustment circuit 19 shown in FIG. 1 is touched, the detection circuit 20 detects this and sets the FF 30. The touch detection means may be a calculator key, a TV channel key, a local adjustment knob known as a magic line, or the like. The most desirable type is one in which the output of the touch detection circuit 20 appears only while the knob of the adjustment circuit 19 is being touched. Turn the knob of the adjustment circuit 19 to quickly adjust so that only characters appear as the output of the slice circuit, as shown in FIG. 2B. Note that when a white peak hits a part of the screen and the level of the text has not reached the white peak, pixels other than the text will also appear as white figures in the waveform in Figure 2B, but if the text can be read, the target can be determined. I can accomplish it.
The signal waveform of X-X' in FIG. 2A is shown in FIG. 4A, and the slice output becomes FIG. 4C and is displayed as in FIG. 2B. 31 in FIG. 3 depends on whether the end of the output of the detection circuit 20 is detected (auto-reset) or manually reset with a switch.
This circuit resets the FF 30, and the FF 30 is a large output FF that activates the relay 28. Convert it to the same level as P ₂ points and send it to mixing circuit 5.

Now, since the memory 17 is generally a digital memory, it cannot be read and written at the same time.
30) transmits the output of the level shift circuit 32 to the cathode ray tube 7, and writes signals for about 240 lines of each field to the memory 17.

Next, writing to the extraction gate 11 and memory 17 will be described. When receiving teletext broadcasting, the extraction gate 11 is used for the character signal superimposed section in VBL, for example
The output of the waveform shaping circuit 10 is passed during 238H from the 21st H to the 258th H.

This part will be described in detail below with reference to FIGS. 5 and 6. In FIG. 5, 8A is a part of the synchronization separation circuit 8, and its output is a composite synchronization signal. 8V is a circuit that integrates the output to obtain a vertical pulse as shown in Figure 6E.For example, as shown in Figure 6F, the pulse falling at the 4th H (267th H) common to the two fields is Output. A flip-flop 8F is set with the output of the integrating circuit 8V, and the output shown in FIG. 6G is obtained. This output G, line counter 3
Supplied to the clear terminals of 3A and 33B. As the counters 33A and 33B, there is a 4-bit binary counter such as SN7493, for example. Counters 33A and 33B are enabled to count when G goes low, and count the leading edge of the 5H horizontal pulse (this pulse may be the horizontal flyback pulse of a normal television receiver). Therefore, the first
The 20th hour will be the 16th count. That is, a low level output is obtained from the decoder 34 in FIG. 5 for 1H of the 16th count, that is, the 20thH, and this is inverted.
Supply to AND gate 35. On the other hand, FF36 is the 17th
It is set at the beginning of the count (21st H), and
It is reset at the beginning of the 255th count (259th H), and the Q output of the FF 36 is transmitted to the AND gate 37. On the other hand, when the changeover switch 19S is short-circuited between a and b as shown in FIG.
5 is blocked, the output of OR gate 38 is
It becomes the Q output of FF36 and becomes high level during 238H from the 21st H to the 258th H, and the level shift circuit 3
2 is transmitted to the sampling circuit 14 via the AND gate 39 for 239H. That is, almost the entire screen of a typical television receiver (including most of the vertical overscan area) can be sampled and stored in memory.

For example, when the clock rate is 5.7MHz, the pulse width of 1 bit in the case of teletext is approximately 175ns, so in the horizontal direction, a portion of 0.175 x 256 = 44.8μs will be recorded, but if it is insufficient, it will be even longer. All you have to do is increase the capacity of the memory 17. Further, the roughness of the sampling in the horizontal direction is fine enough for practical use. In addition, in FIG. 5, when the changeover switch 19-S is short-circuited between b and c, the output of the OR gate 38 becomes high level only during the 20th H, and it works as a known teletext receiver. Nor.

As described above, it is possible to sample a normal television screen as points of 238 lines in the vertical direction and 256 bits in the horizontal direction.

Next, writing to the memory 17 may be done in the same way as writing the 20th H teletext signal, but in order to make it easier to understand, how to give an address will be explained with reference to FIG. 7. For simplicity, the horizontal direction is the same as when receiving teletext broadcasting. That is, when sampling and storing the teletext signal, that is, the 20th H
ONLY the AND gate 15A is made conductive, the start signal of the phase information signal in the character signal is detected, the start position is determined, and the horizontal address counter 18A is
make it work. At times other than the 20th H, the AND gate 15B is made conductive, the counter 15C counts 8sc basic clock pulses from the beginning of the horizontal flyback pulse, and a pseudo start pulse is generated at an appropriate position as the left edge of the screen.
A clock generating circuit 16 is driven through B and an OR gate 15O to determine the horizontal address of the display and the horizontal address when recording the above-mentioned television screen.

Next, we will discuss the vertical direction. In the case of teletext broadcasting, a control signal indicating the vertical display position in the character signal is sent, so this is stored in the latch memory 18M, converted to data so that it can be written to an appropriate location in the memory 17, and then set to the vertical address. Preset counter 18C. At this time, the address selector 18S passes the output of the counter 18C, so that data is written into the memory 17 as in the case of a normal teletext receiver. In the case of reading, the address selector 18S uses the counter 33.
The outputs of A and 33B are supplied to the memory 17. When storing a normal TV screen, the selector 18S always sends the outputs of the counters 33A and 33B to the memory 17.
tell to. Note that 14 is an 8-bit serial input->parallel output shift register.

To switch between writing and reading the memory 17,
This can be done as shown in FIG. That is, the output of the AND gate 35 is at a high level only at the 20th H when multiple characters are received, and when the write instruction signal is output at a high level from the memory control circuit 18, the output of the AND gate 40 is at a high level. Become. Therefore, NOR
The output of gate 41 goes low and memory 1
7 is in the write state. On the other hand, AND gate 35
When the output of is low level, when FF30 is high level, the output of AND gate 42 is high level,
The output of the NOR gate 41 becomes low level and the memory 17 enters the write state. Therefore, Q of FF30
While the output is at a high level, that is, when the switching adjustment circuit 19 is touched as described above, and the output of the touch detection circuit 20 is at a high level, the video signal is converted into a binary value and the memory 1
7. At this time, the output of the level shift circuit 32 is displayed on the cathode ray tube 7. During writing, the output level may be unstable depending on the type of memory 17, but with this method, during writing,
Since the memory write input signal is displayed, there is no effect of output fluctuations.

Next, the display during slice level adjustment will be described. In Figure 9, AND gates 5A to 5C and OR
Gate 5G is the content of mixing circuit 5.

5A, 5B, and 5C are analog switches that can be wired OR-combined, and 5D is a common resistor.
AND gates 5A to 5C are assumed to be conductive when the control input is at a high level.During adjustment, as mentioned above, the Q output of FF30 is at a high level, so
C becomes conductive, and the first bit of the parallel output of the sampling circuit 14 (that is, the level shift circuit 3 in FIG.
2) is transmitted to the buffer memory 5F. Also, during adjustment, the output of the OR gate 5G is at a high level, so the AND gate 5B becomes conductive, and the TV broadcast screen signal is obtained as its output.The output of the buffer memory 5F is the output of the slice circuit 10 sampled, Superimposed on the TV broadcast screen. Note that memory read circuit 1
Needless to say, the DC level, signal amplitude, etc. of 7R and the sampling circuit 14 must be adjusted using a variable resistor or the like as necessary. Now, when the adjustment is completed, the Q output of the FF 30 changes from low level to high level, the AND gate 5A becomes conductive, and the output of the memory read circuit 17R, that is, the 8-bit parallel output of the memory 17 in FIG. 7, is converted into series. The signal is transmitted to the buffer memory 5F. At this time, when the changeover switch 5S is connected to the single side, the output of the OR gate 5G is at a low level, so the AND gate 5B is cut off. Therefore, the input to the buffer memory 5F is only the output from the memory 17, and only characters are displayed on the screen as shown in FIG. 2B. When the switch 5S is connected to the superimposing side, the output of the OR gate 5G becomes high level, the AND gate 5B becomes conductive, and the television broadcast screen is obtained as the output of the AND gate 5B as described above. Therefore, at this time, the output of the memory 17 is displayed superimposed on the television broadcast screen. However, since the broadcast screen changes every moment, it has no relation to the characters output from the memory 17. With the above configuration, display switching between memory output and television screen can be performed arbitrarily.

Next, the switching adjustment section (third
19 and 20) in the figure will be supplementarily explained. 10th
In the figure, 20A to 20Z are examples of the detection circuit 20 in FIG. This is also the case where manual reset 40 is not used. 19K is a knob with a volume of 19V, which is plated with metal, and its mating part 19S with the shaft is covered with metal to ensure operation, and a spring 19A is in contact with this metal. When a person touches knob 19K (turns the knob),
By induction, the power frequency (50Hz or 60Hz) is transmitted to the base of transistor 20D. 20A and 20C are CRs with large time constants. 20B is the leak resistance, 20D is 60Hz (50Hz is omitted below)
At the top of the sine wave, conduction occurs and current flows through the resistor 20E. 20G is an emitter follower transistor, and 20H is a diode for preventing backflow. The same waveform as the collector of the transistor 20D is generated at the resistor 20J while a person is touching the knob 19K. Rectify this with a resistance of 20K and a capacitance of 20M,
The transistor 20N is always conductive. Therefore,
When a person touches knob 19K at time T ₁ , the 11th
As shown in the figure, the P ₁ point becomes a high level from T ₁ .
Resistor 20L is VR for sensitivity adjustment, and transistor 2
The operating point of 0N is determined. The waveform at _point P is the 10th waveform.
In the case of the figure, it is not a TTL level, but changes between, for example, 5 to 10V. Therefore, the level is converted by the Zener diode 20S, and the base of the transistor 20U is set to TTL level. The resistor 20R limits the current flowing through the diode 20S. 20
T is the base leak resistance of the transistor 20U, so the waveform at the collector ( _P2 point) of the transistor 20U has the opposite polarity to the _P1 point as shown in FIG. however,
Ignore the time delay between _P1 point and _P2 point. 20W is an inverter whose output ( ₃ points P) is as shown in Fig. 11, and it is connected to Δt by using a resistor of 20X and a capacitance of 20Y.
If the waveform is delayed by the amount of time, the waveform at point _P'3 becomes as shown in FIG. 11, _P'3 . At the falling edge of the waveform at _two points P, as mentioned above,
FF30 is set. Next, when the person releases the 19K, the waveform at _point P′ becomes low level at T ₂ +Δt, as shown in Figure 11, and the NAND gate 2
As shown in FIG. 11, the output P ₄ of 0Z becomes negative between T ₂ and _{T 4} Δt and resets the FF30, so the FF
30 is set only while a person is touching the VR knob 19K. With the configuration as described above, the reset circuit 31 shown in FIG. 3 becomes unnecessary.

As described above, according to the present invention, it is possible to easily store characters, etc. on a normal television screen using the digital memory of a teletext receiver, and read them out and display them at any time later. Moreover, a useful device can be obtained.

Additionally, while adjusting the slice level, the waveform shaping output is superimposed and displayed on a normal television screen, so you can clearly see how the memorized signal is and the shaping level. can be easily adjusted.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an image storage display device according to an embodiment of the present invention, FIGS. 2A and B are front views of the display state of the device, and FIG. 3 is a specific circuit diagram of a part of the device. Figure 4 is a waveform diagram of each part, Figure 5 is a specific circuit diagram of a part of the same device, Figure 6 is a waveform diagram of each part, and Figures 7, 8, 9 and 10 are the same. A specific circuit diagram of a part of the device, and FIG. 11 is a waveform diagram of each part thereof. 1...Tuner, 2...VIF circuit, 3...Video detection circuit, 4...Amplification circuit, 5...Mixing circuit, 6
...Video output circuit, 7...Cathode ray tube, 8...Synchronization separation circuit, 9...Color subcarrier regeneration circuit, 10...
Waveform shaping circuit, 11...Gate circuit, 12...Gate pulse generation circuit, 13...Basic clock oscillation circuit, 14...Sampling circuit, 15...Start signal detection circuit, 16...Clock generation circuit,
17...Memory, 18...Memory control circuit, 19
...Switching adjustment circuit, 20...Touch detection circuit.

Claims (1)

[Claims] 1. A waveform shaping circuit that shapes the video signal of a television broadcast screen transmitted as an analog signal at a predetermined level and converts it into a binary signal, and a television broadcast screen converted into a binary signal by the waveform shaping circuit. and a digital memory for storing approximately one field's worth of signals, and during the period when the shaping level of the waveform shaping circuit is being adjusted, the image output from the waveform shaping circuit and the television broadcast screen are superimposed on the display device. 1. An image storage display device comprising a switching circuit configured to switch the display device so that only the image read out from the digital memory is displayed on the display device when the adjustment is completed.