JPS6157638B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electro-optic display device in which a large number of display elements can be controlled by a relatively small number of drive signals. The present invention also relates to an electro-optical display device suitable for displaying graphs of single-valued functions.

Conventionally, in order to control a large number of electro-optical display elements arranged on a panel with a relatively small number of drive signals, a so-called matrix structure is used, in which two groups of conductors are arranged with display elements arranged at the intersections of different groups. Using a display board, only specific display elements emit light through the interaction of two drive signals. Various methods of applying the drive signal have been proposed depending on the physical characteristics of the electro-optic material used for the display element. For example, in a plasma display, a drive signal is configured so that when a selected element is ignited, a high voltage is applied only to that element and the arc is normally maintained at a low voltage. Furthermore, in a device using LEDs, a drive signal is configured so that a forward voltage is applied only to selected elements and a reverse voltage is applied to unselected elements by utilizing the rectifying properties of the elements. Devices using liquid crystals utilize the property that elements do not operate when the voltage is below a certain threshold, but emit color when the voltage exceeds the threshold.
The drive signal is configured so that a voltage exceeding the threshold is applied to the selected element and a voltage lower than the threshold is applied to the unselected element. In all of the above methods, instead of selecting many elements across the entire panel at the same time, they focus on one conductor in one group and select only the elements connected to it, and then shift this selection over time to select the elements within the group. It was designed to scan the conductor. Therefore, when attempting to drive a panel having a large number of rows and columns of elements, the time during which one element is selectively activated becomes a very small proportion of the total, making it impossible to obtain display contrast. Since a voltage is applied even in the non-selected state, crosstalk tends to occur, and the drive waveform is complex and requires multiple voltage sources. It has disadvantages such as being sensitive to voltage fluctuations and having strict requirements regarding the physical properties of the electro-optic material used in the display element.

The present invention has an electro-optical display element in which two groups of conductors that transmit display signals are connected in a matrix through an electro-optic substance, and n pieces belonging to one group are connected to each other in a matrix form. A conductor has 2/n between any two conductors.
A signal having a different voltage level is applied to each of the conductors belonging to the other group for a fixed percentage of time, and a signal equal to any one of the conductors belonging to said group is applied to produce an electro-optical display. All electro-optic display elements were made to be in a non-selected state, or a signal different from any of them was applied to make all electro-optic display elements in a selected state. Since voltage is applied simultaneously to a large number of selected elements in the entire panel without applying voltage to non-selected elements, it is difficult to create multi-line matrix display panels using incandescent light or liquid crystal, which has been difficult in the past. In addition, the drive circuit is simple regardless of the type of display element, only one type of voltage source is required, and sufficient contrast can be obtained because a sufficiently high voltage can be applied without worrying about crosstalk. Since we were able to eliminate the drawbacks of
It becomes possible to manufacture an inexpensive and easy-to-read display device, especially a display device suitable for graphically displaying a single-valued function.

Next, an embodiment of the present invention will be described with reference to the drawings. Fig. 1 is a block diagram showing the configuration of a display device of the present invention. 1 is a display panel 2, 3 is a conductor for transmitting a drive signal, and a first Group 2-1, 2-2,...2
-n and second group 3-1, 3-2,...3-m
Consisting of 4 is display element 4-1-1, 4-1-
2,...4-2-1...4-n-m display surface, each display element is a first group of conductors 2
and one of the conductors 3 of the second group. Examples of electro-optical materials include liquid crystal materials, electroluminescent materials, materials whose crystal structure changes due to an electric field such as PLZT, semiconductors such as LEDs, electroelastic deformable materials, electric discharge materials, incandescent resistors, heating materials, and temperature-sensitive materials. Coloring substances, electrophoretic substances, coils and magnetic substances, electrochemical coloring substances, etc. are used.

5 is a first drive circuit for generating a drive signal to be supplied to the conductors 2 of the first group; Give a signal with different voltage levels during periods. 6 is a second drive circuit for generating a drive signal to be supplied to the conductors 3 of the second group, and the conductors 3-- according to information from the display information generation source 7.
A drive signal is given to each of 1, 3-2, . . . 3-m. This drive signal is applied to the conductors 2-1, 2-2,...
It is a signal that is approximately equal to the signal applied to any one of 2-n, or has a voltage level that is different for a certain period of time exceeding 2/n. Reference numeral 8 denotes a clock generator for operating the display device, which may also serve as a clock for the display information generating source 7 if necessary. The illustration of the power supply was omitted.

Next, its operation will be explained. Now conductor 2-1, 2
Display elements 4-1-1, 4-1-2,...4-1-n connected between -2, 2-n and the conductor 3-1
think about. The voltage applied to the display element is equal to the difference between the drive signals applied to both connected conductors, respectively. Therefore, if conductor 3-
If the drive signal of conductor 1 is the same signal as that of conductor 2-1, then a voltage equal to the difference between the drive signals of conductors 3-1 and 2-1 will be applied to display element 4-1-1 connected to it. If the voltages of both drive signals are equal, the applied voltage becomes 0 and the display element becomes non-selected. Display elements 4-1-2...4-1-n are electrical conductors 2-2
... Since the drive signals 2-n and 3-1 are signals having different voltage levels for a certain period of time exceeding 2/n, a voltage is applied and all of them are in the selected state. The drive signal for the conductor 3-1 is transferred to the conductor 2-1...2
-n, the display element 4 has a different voltage level for a fixed percentage period exceeding 2/n.
Since a voltage is applied to all of -1-1, 4-1-2...4-1-n, a row of display elements 4-1-1, 4-1-2 connected to the conductor 3-1. …4-1
- All n become selected. In this way, the drive signal supplied to the conductor 3-1 is transmitted to the conductor 2-1...
Display elements 4-1- in one row depending on whether the signal is approximately equal to one of the drive signals of 2-n or the signal has a voltage level that is different for a certain period of time exceeding approximately 2/n from any of the drive signals. 1...4-1-n can be set to a non-selected state, or all of them can be set to a selected state. Similarly, the drive signal for the conductors 3-2...3-m can be set to a non-selected state or all of the display elements in a row, so a single-valued function can be used. It operates as a display device that can display graphics. In some cases, the current consumption can be reduced or the life of the display element can be improved by applying the drive signal intermittently and keeping the conductors short-circuited or open during the idle period. It is also possible to time-divide the drive signal and deselect a plurality of display elements one after another.

FIG. 2 shows a first drive circuit 5 and a second drive circuit 6.
A specific example is shown in FIG. 3, which shows voltage waveforms at various parts. 10, 11, 12, 13, and 14 are T-type flip-flops connected in series, and 15 is an input terminal to the first stage thereof. Flip-flop output
A ₁ , A ₂ , A ₄ , and A ₈ are connected to the input end of the exclusive OR gate group 20 of the first drive circuit 5 and the input end of the AND gate group 21 of the second drive circuit 6.

The flip-flop outputs 16 to 19 and the output of the exclusive gate group 20 are connected to the clock input terminal 23.
is connected to the input side of a group of latches 22 which are triggered by a pulse of , and whose output side is connected to each of the conductors 2 2-1, 2-2 . . . 2-n. The latch group 22 also serves as a power amplifier for driving the display elements. A signal source 24 holds display information, and when a pulse is input to one of the information selection lines 25, the information is output to a signal output line 26. The signal output line 26 is connected at one end to the input end of the AND gate group 21, and at the other end is connected to the input end of the NOR gate 28 together with the output 27 of the flip-flop 14.
The output terminal of the AND gate 21 is connected to the input terminal of the OR gate 30 together with the output of the NOR gate 28 via an exclusive OR gate group 29. The output of the OR gate 30 is a latch 31-1, 31-2...31-m triggered by each of the information selection lines 25 25-1, 25-2...25-m.
, whose output is connected to the input of a group of latches 32 triggered by a pulse at the clock input 33. The output side of the latch group is connected to each of the conductors 3 3-1, 3-2, . . . 3-m.

Next, to explain its operation, when the clock pulse shown in FIG.
A ₁ , A ₂ , A ₄ , A ₈ , A ₁₆ are shown in Figure 3 B, C, D,
Waveforms E and F are obtained. The waveform conversion circuit consisting of the exclusive OR group 20 is A ₁ , A ₂ , A ₄ , A ₈
The following waveform is created at the first input of latch 22 based on .

When i is expressed in binary as i=a ₁ + a ₂ × 2 + a ₄ × 2 ² + a ₈ × 2 ⁴ , the waveform Xi at the i-th input end is Xi = (a ₁・A ₁ ) (a ₂・A ₂ ) (a ₄ · A ₄ ) (a ₈ · A ₈ ) Here, represents an exclusive OR operation, and ・ represents an AND operation.

It is determined by As an example, the 15th input signal waveform is shown in FIG. The clock input 23 of the latch receives a pulse with the same period and a delayed phase as the pulse applied to the flip-flop input 15.
On the output side of the latch 22, that is, the conductors 2-1, 2-2
...Clock input 23 to 2-n with the same waveform as Xi
A drive signal synchronized with is output. Conductor 2-1
Figure 3 shows the waveform output.

Next, the creation of a drive signal to be sent to the conductor 3 will be explained. When a pulse is input to one of the information selection lines 25, information indicating which position in the corresponding row is to be made non-selected is sent from the signal source 24 to the signal output line 26 in the form of a binary number. 1st place signal b ₁ goes to 26-1 2nd place signal b ₂ goes to 26-2 ^2nd place signal
b ₄ is sent to 26-4, and the ^second -order signal b ₃ is sent to 26-8, which is then sent to AND gate group 21 and exclusive OR gate group 29. Y=b ₁ ×A ₁ b ₂ ×A ₂ b ₄ Since the calculation ×A ₄ b ₈ ×A ₈ is performed, this is the same as the signal of Xj expressed as j=b ₁ +b ₂ ·2 +b ₄ ·2 ² +b ₈ ·2 ⁸ . When j≠0, the output of the exclusive OR gate directly passes through the OR gate 30 and is connected to the latch 31-1,
The latches of the rows added to the input terminals of 31-2...31-m and selected by the information selection line 25 are set.
When j=0, if there is no position to be made unselected, then both signal output lines 26 are set to 0.
Therefore, ₁₆ appears at the output of NAND gate 28, which passes through OR gate 30 and becomes latch 31.
1, 31-2...31-m are added to the input terminals.
All the information selection lines 25 are scanned in a short period of time from when a pulse is input to the flip-flop input terminal 15 to when a pulse is input to the clock input terminal 23 of the latch 22 to select the latches 31-1, 31-2, . . . 31-.
Store the signal level in all m. Latch 3
When a pulse is applied to the clock input terminal 33 of Latch 2 at the same timing as the clock input terminal 23 of latch 22, the outputs of latches 31-1, 31-2...31-m become conductors 3-1, 3-2...3-m. It is sent out in synchronization with the conductor 2. In this way, according to the contents of the signal source 24, if j≠0, a signal with the same waveform as _{the j} -th signal , 33 are sent to the conductor 3 in synchronization with the pulse inputs of the pulses. j=0
In this case, if the period of waveform A ₁₆ is τ and the average value of the high level and low level of the drive signal is Eo, then ∫ ^to+ 〓 _tp {Xi(t)−Eo} { ₁₆ −Eo}dt=0 Therefore, ₁₆ has a voltage level that is different from any of Xi for a certain period of time exceeding 2/n. The OR gate 28 and the OR gate 30 are provided to prevent a DC component from being added to the display element 4 when j=0. Directly latch the final output of the OR gate group 29.
1, 31-2...31-m may be connected to the inputs.

FIG. 4 shows another embodiment of the first drive circuit 5. In FIG. 51 is a random number generator, and a clock generator 8
It is configured to generate n random numbers in synchronization with the signal from . In particular, when this display device is used as a display device for a computer, it can also serve as the arithmetic function of the computer. The n outputs of the random number generator 51 are connected to the n inputs of the latch group 22, and store random number signals in synchronization with the signal applied to the clock input 53. 2 as a drive signal. When you do not want to add a DC component to the drive signal, such as when driving a liquid crystal display element, one clock cycle is further divided into front and back halves, and the first half uses the random number signal as the drive signal, and the second half uses the random number signal as the drive signal. In the second half, a signal opposite to that in the first half may be used as the drive signal. Further, the output of the random number generator 51 does not necessarily have to generate n signals at the same time, but may output a small number of random number signals serially and distribute these to each of the latches 22 one after another.

When random numbers are used for the drive signal, there is no periodic regularity, so regular display noise does not occur even if the clock cycle is considerably reduced, making it suitable when the number n of conductors 2 is large. ing.

FIG. 5 shows another embodiment of the second drive circuit 6. In FIG. This generates a second drive signal based on the drive signal generated inside the first drive circuit 5, and the data input terminal 62 of the multiplexer 61 -
1, 62-2...62-n are connected to the respective output terminals of the signal source inside the first drive circuit 5, for example, the exclusive OR gate group 20 in FIG. The signal level to be supplied to -2...2-n is input. Input information to be displayed is input to the address input terminal 63 of the multiplexer, and the input signal of the address corresponding to the input is selected from among 62-1, 62-2...62-n and sent to the output terminal 64. Ru. The multiplexer can be configured by a combination of transfer gates 65-1, 65-2...65-n. The multiplexer output terminal 64 is connected to the latch groups 31-1, 31-2...
31-n and the latch group 32, and by scanning the signal on the information selection line 25, the multiplexer output signals are read into the latches 31-1...31-n one after another in synchronization with the signal applied to the clock input terminal 33. It is sent to each of the conductors 3 as a drive signal.

When the number of terminals of the output 2 of the first drive circuit 5 is small, it is not difficult to provide as many multiplexers as the number m of terminals of the output 3 of the second drive circuit 6. In that case, the drive circuits 5 and 6 can be constructed without including a latch group inside them. Further, the potential level of the drive signal is not limited to two values, high and low, and it is also possible to use a drive signal including an arbitrary potential level, such as a sine wave, for example.

FIGS. 6A and 6B show an embodiment of the electrode arrangement of a liquid crystal display panel when the display device of the present invention is used in a digital display liquid crystal watch. FIG. 6A shows a pattern of transparent electrodes formed on the first glass of the liquid crystal display panel, which are connected to the output end of the first drive circuit 5 through conductive parts 71-1 and 71-2, and are mutually connected. It is supplied with signals having different voltage levels for a fixed proportion of time exceeding 2/n. FIG. 6(b) shows a pattern of transparent electrodes applied to the second glass of the liquid crystal display panel, with conductive parts 72-
1, 72-2, 72-3, etc., and are connected to the output terminal of the second drive circuit 6. The numbers are displayed in 7 segments shown as a, b, c, d, e, f, and g in Fig. 7, and the conductive part 71-1 is shown in segments b and c, and the conductive part 71-2 is shown in other segments. Connected to segments. The conductive portion 72-1 is connected to segments a and b, the conductive portion 72-3 is connected to segments c and g, and the conductive portion 72-2 is connected to segment f.
A nematic liquid crystal is sandwiched between first and second glass plates and placed between two orthogonal polarizing plates to form a so-called twisted nematic liquid crystal display panel.
If a voltage approximately equal to that of the conductive portion 71-1 is now applied to the conductive portion 72-1, the segment a will be colored and the segment b will not be colored. When a voltage approximately equal to that of conductive portion 71-2 is applied to conductive portion 72-1, segment b develops color and segment a does not develop color. The conductive part 71- is connected to the conductive part 72-1.
When voltages having different voltage levels are applied to both segments 1 and 71-2 for a fixed period exceeding 2/n, segment ab develops color at the same time. Similarly, by selecting the drive signal applied to the conductive portion 72-3, either one of the segments c and g can be colored, or both segments c and g can be colored simultaneously. If a voltage approximately equal to that of the conductive portion 71-2 is applied to the conductive portion 72-2, the segment f will not develop color, and the segment f to which a voltage independent from the conductive portion 71-2 is applied will develop color. In this way, the numbers 0 to 9 can be displayed. In this way,
Compared to the conventional static drive method, the number of drive signal lines per digit is reduced by two, which simplifies the configuration.There is also no risk of crosstalk as with the matrix drive method, so the drive voltage can be changed to the liquid crystal display. It can be selected so that sufficient color development is achieved, and a sharp display can be obtained even with liquid crystals that have smooth voltage characteristics. In this embodiment, the wiring on the second glass is connected between segments a and b, and between segments c and g.
It is possible to select and connect segments such that there are no states in which the color disappears at the same time.

With the display device of the present invention, minutes and seconds can be displayed.
With 60 dots, you can easily construct a clock that displays the time using 12 dots. That is, a total of 132 points are arranged in a 12 x 11 matrix so that three points can be selected and displayed, and 12 points are connected to the first drive circuit.
Connect 11 wires to the second drive circuit. FIGS. 8A and 8B show a portion of an embodiment of the electrode arrangement of the liquid crystal display panel in this case. First row electrode 81 and electrode 85
The 60 dots formed by the electrodes 82 and 86 indicate the minutes, and the 12 dots formed by the electrodes 83 and 87 indicate the hours. Each of the electrodes 85, 86, and 87 is divided into 12 parts and connected to the first drive circuit by a conductor 88. The electrodes 81 and 82 are each divided into five parts,
The electrode 83 is directly connected to the second drive circuit by a conductor 84. It is clear that with only 23 conductors, any point in the hour, minute, or second can be selected. Since no voltage is applied to selected points, no color develops, while non-selected points develop color. Of course, in the case of a twisted nematic liquid crystal, by changing the orientation of the polarizing plate, only selected points can be colored.

FIG. 9 shows an embodiment in which the display device of the present invention is used for display on an electronic computer, and is used to display calculation results in a graph. 91 is a liquid crystal display panel with a nematic liquid crystal sandwiched between two glass plates.
It has two polarizing plates and a reflective plate on the back. In the graph display section 92, vertically arranged band-shaped transparent conductors 93 provided on one glass and horizontally arranged band-shaped transparent conductors 94 provided on the other glass face each other with a liquid crystal material in between. ing. The conductors 94 are connected to the first drive circuit, and drive signals having different voltage levels are applied to each of the conductors 94 for a certain period of time exceeding 2/n. The conductor 93 is connected to the second drive circuit, and a drive signal having a voltage level different from any of the drive signals of the conductor 94 for a period of a certain proportion exceeding 2/n or a drive signal that is the same as any one of the drive signals is connected to the second drive circuit. Given. Depending on the type of signal applied to the conductor 93, any one of the display elements in a row can be selected to turn off (or turn on) the display, allowing the graph of any single-valued function to be turned off (or colored). can be displayed. Of course, the vertical conductor 93 is
It is easy to display functions with more than two valences by using it every other book to display bivalent functions, or by alternately displaying different graphs every second. The coordinate axes and graph scales may be printed on the glass of the display panel, but they can also be displayed in time division using the liquid crystal display itself.

According to the present invention, even a display panel equipped with a large number of display elements can be driven with a small number of drive signals, and only one type of drive voltage is required. A display device with excellent contrast can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a block diagram for explaining the configuration of the present invention, FIGS. 2 and 3 are a concrete example of the drive circuit and its waveform diagram, and FIGS. 4 and 5 are other diagrams of the drive circuit. 6A and 6B are examples of the electrode arrangement when used in the digital display liquid crystal watch of the present invention, FIG. 7 is an explanatory diagram of the segment arrangement, and FIGS. 8A and 8B are the main FIG. 9 is a partial view showing an example of the electrode arrangement when the invention is used in a dot display liquid crystal watch, and FIG. 9 is a front view showing an example of the invention being used in the display of an electronic computer. DESCRIPTION OF SYMBOLS 1... Display panel, 2... First group of conductors, 3... Second group of conductors, 4... Display element, 5... First drive circuit, 6... Second drive circuit,
7...Display information generation source, 8...Clock generator, 2
2... 31-m, 32... Latch, 24... Signal source holding display information, 51... Random number generation source, 61... Multiplexer, 62-n... Data input source, 92... Graph display section.

Claims (1)

[Claims] 1. It has an electro-optic display element in which two groups of conductors that transmit display signals are connected in a matrix through an electro-optic substance, and the n conductors belonging to one group gives a signal with a different voltage level between any two conductors for a period of time exceeding 2/n, and to each of the conductors belonging to another group, one of the conductors belonging to said group An electro-optic display device in which one electro-optic display element is rendered unselected by applying an equal signal, or all electro-optic display elements are rendered selected by applying a different signal.