JPS6157735B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an amplifier circuit having a MOSFET configuration that removes noise and amplifies a signal with a good S/N ratio.

In conventional rotary head type VTRs, the control head plays back control signals recorded on the control track at the end of the tape for tracking control to ensure that the rotary head correctly scans the video track recorded on the tape during playback. Based on this playback control signal,
A method of controlling tape travel and head scanning is commonly used. The control signal reproduced from this control track is generally several mV.
Since the signal is extremely small, such as the following, a so-called linear amplification circuit such as a negative feedback amplification circuit using bipolar transistors has conventionally been used to amplify this signal to a sufficient level.

FIG. 1 is a waveform diagram showing a control signal waveform that has been regenerated and amplified by a conventional linear amplifier circuit. a is the first stage linear amplifier circuit (not shown)
The waveform shown by the solid line is the required control signal. As mentioned above, the signal regenerated by the control head is very small, and the impedance of the control head that regenerates the control signal is relatively large and easily affected by external inductive noise, so it is difficult to obtain a sufficient S/N ratio. It's hard to get a comparison. Therefore, noise as shown by the broken line in a is mixed in and linearly amplified together with the control signal shown in the solid line.

b and c show waveforms obtained by further amplifying the signal of a in a pulse shaping circuit (not shown) in the next stage and shaping it into a pulse signal. b shows the waveform when the threshold level is set to V ₁ of a; in this case, only the desired control signal can be obtained. On the other hand, if the threshold level is set to _V2 , noise will also be output as shown in c.

Furthermore, even if the threshold level of the pulse shaping circuit is set to V ₁ in a above, due to the bias of the first stage linear amplifier circuit and fluctuations in the input signal level, the output waveform of the amplifier circuit may change as shown in d. If the control signal is clipped at the lower limit of the dynamic range and the peak value becomes below the threshold level _V1 , the control signal may not be output, as shown in e.
There was a problem in that the signal was clipped at the top of the dynamic range, and noise was output in addition to the desired control signal, causing the tracking control to malfunction.

In this way, in conventional linear amplifier circuits, in order to remove noise signals, it is necessary to widen the dynamic range of the first stage linear amplifier circuit, stabilize the bias, or improve the pulse shaping circuit of the next stage. There was a problem in that it became necessary to adjust the threshold level, and the circuit scale increased.

On the other hand, in recent years, servo circuits in VTRs and other devices have been digitized to reduce power consumption, improve performance and reliability, and reduce the number of circuit components.
Attempts have been made to implement LSI using logic elements such as CMOS, but since it is essential to have a circuit that amplifies analog signals like the control signal mentioned above and interfaces them with the CMOS logic circuit, the It became necessary to add a linear amplifier circuit external to the IC, and therefore
When servo circuits are integrated using CMOS, a large number of peripheral circuits are required, which poses a problem in that the actual degree of circuit integration is significantly reduced.

The purpose of the present invention is to eliminate the above-mentioned drawbacks of the prior art, to eliminate noise from input signals, amplify signals with a good S/N ratio, and to provide an amplifier circuit that can directly interface with logic circuits using MOS elements. It is on offer.

In order to achieve the above object, the present invention configures a differential amplifier circuit entirely with MOSFETs, and connects the output of the differential amplifier circuit to the second input terminal of the MOSFETs forming a differential pair. In order to increase the output voltage, negative feedback is provided via a low-pass filter consisting of a resistor and a capacitor, and the differential amplifier circuit is operated with negative feedback non-inverting amplification, and the output is supplied to the capacitor via a diode. MOSFET that peak-clamps and forms the above differential pair
It amplifies only the vicinity of the peak level of the input signal supplied to the first input terminal of the device, performs linear amplification to remove noise at a lower level, and then directly interfaces with the MOS logic circuit connected to the subsequent stage. The signal is amplified to the amplitude level.

The present invention will be explained in detail below with reference to the embodiment shown in FIG. FIG. 2 is a circuit diagram showing an embodiment of the present invention for amplifying only the positive peak level of an input signal, and FIG. 3 is a diagram showing waveforms of various parts of FIG. 1 is the signal input terminal, 2 is the output terminal, 3 is the power supply voltage Vcc
supply terminals, 4 to 23 are each MOSFET (hereinafter referred to as
(abbreviated as MOS). 4, 6, 8, 9, 13,
17, 18, 22 are P-type MOS, 5, 7, 10,
11, 12, 14, 15, 16, 19, 20, 2
1 and 23 are N-type MOSs. The symbols D, G, S, and B written on the P-type MOS 4 and the N-type MOS 5 indicate the drain, gate, source, and substrate, respectively.

In Figure 2, MOS4, MOS5 and MOS
6 and MOS7 each constitute a bias circuit, and each divides the power supply voltage Vcc to generate constant bias voltages B1 and B2. The former bias voltage B1 is applied to the gate of MOS11 to which the input signal is supplied, and the latter bias voltage B2 is applied to the gate of MOS12,
It is supplied to the gates of MOS14, MOS21, and MOS23. MOS8 to MOS16 constitute the first stage differential amplifier circuit A1, and MOS8, MOS9 and MOS1
0 and MOS11 are a pair of MOSFETs with the same characteristics.
is formed. MOS10 and MOS11 constitute a differential pair, MOS12 acts as a constant current source for this differential pair, and MOS8 and MOS9 constitute MOS10 and MOS9, respectively.
Acts as a load for MOS11, MOS10, MOS1
Amplify the difference in voltage applied to the gate of 1,
It is output as O' ₁ from the drain side of MOS11.
The output O' ₁ from this MOS11 is the next P-type MOS13.
The signal is applied to the gate of MOS 13 and further amplified by this MOS 13. MOS14 acts as a constant current source load for MOS13. The output from MOS 13 is further applied to the gate of MOS 15 that constitutes the source follower, and the impedance is converted, resulting in a voltage waveform O ₁ from the source of MOS 15 with low output impedance.
is output as MOS16 acts as a load for MOS15.

MOS17 to MOS23 constitute a second-stage differential amplifier circuit A2, and similarly to the first-stage differential amplifier circuit A1, a pair of MOS19 and MOS20 with the same characteristics constitute a differential pair, and MOS21 constitutes a differential pair. MOS17 and MOS18 each act as a constant current source.
Acts as a load for MOS19 and MOS20, and MOS1
9. Amplify the difference in voltage applied to the gate of MOS 20 and output it as O' ₂ from the drain side of MOS 20. The output O′ ₂ from this MOS20 is
It is applied to the gate of MOS22, further amplified, and output from the drain of MOS22 as output _O2 . MOS23 acts as a constant current source load for MOS22.

As explained above, the differential amplifier circuits A1 and A2
are all composed of MOSFETs. Next, the circuit operation will be explained. The input signal I from the terminal 1 is supplied via the capacitor C1 to the gate of the MOS 11, which is the first input terminal of the differential amplifier circuit A1, using the source-drain voltage B1 of the MOS 5 as a bias voltage. On the other hand, this differential amplifier circuit A1
The output _O1 from MOS15 is passed through resistor R1 to MOS10, which is the second input terminal of differential amplifier circuit A1.
Negative feedback is sent to the gate. The gate of this MOS10 is grounded via a resistor R2 and a capacitor C2 connected in series. These resistors R1, R2 and capacitor C2 constitute a low-pass filter, and have the effect of making the amount of DC negative feedback larger than the amount of AC negative feedback. The gate of this MOS10 is connected to the gate of MOS19 which is one input terminal of the differential amplifier circuit A2, and the output _O1 of the first stage differential amplifier circuit A1 is connected to the gate of MOS20 which is the other input terminal of the differential amplifier circuit A2. Supplied to the gate. Further, the output _O1 of the differential amplifier circuit A1 is supplied to the connection point between the resistor R2 and the capacitor C2 via the diode D1. First, the operation of the differential amplifier circuit A1 will be explained using the waveform diagram of FIG. When the frequency of the input signal is sufficiently higher than the cutoff frequency of the above-mentioned low-pass filter and the open gain of the differential amplifier circuit A1 is sufficiently large, the amplification degree G of A1 can be approximated by the following equation.

G=R ₂ +R ₁ /R ₃ ...(1) The input signal I from terminal 1 (I in Figure 3) is non-inverted with an amplification degree equal to G in equation (1) above in differential amplifier circuit A1. amplified. The output from the amplifier circuit A1 (source side output of MOS15) at this time is shown in Figure 3.
Shown in V ₀ . Assuming that the DC average voltage of this output V ₀ is E ₀ , if there is no diode D1, the gate side terminal voltage V ₂ of the MOS 10 of the differential amplifier circuit A1 and the terminal voltage V ₃ of the capacitor C2 are total feedback in terms of DC. However, in terms of alternating current, negative feedback is provided by the feedback amount determined by the ratio of the resistors R1 and R2, so that both become approximately equal to _E0 . Further, since these V ₂ , V ₃ and E ₀ are fully fed back in a direct current manner, they become approximately equal to the bias voltage B1 determined by MOS4 and MOS5.

Next, according to the present invention, a device composed of MOSFETs,
Negative feedback was applied to the differential amplifier circuit A1 via a diode D1. The operation of the amplifier circuit will be explained.

As shown in Figure 2, the output from the differential amplifier circuit A1
O ₁ through diode D1 to capacitor C2
, the terminal voltage V ₃ of the capacitor C2 is charged to be approximately equal to the peak level V _P of the output O ₁ from the differential amplifier circuit A1, and as described later, the peak level V _P of this output O ₁ is increased. As a result, the differential amplifier circuit A1 performs a non-inverting amplification operation so as to always amplify only the vicinity of the peak level of the input signal I.

The input signal shown by I in FIG. 3 (the signal shown by the solid line is the desired signal and the signal shown by the broken line is the noise signal) is processed by the differential amplifier circuit A1 at the amplification degree G of the above equation (1). It is inverted and amplified. When this input signal I is amplified and _O1 shown in FIG. 3 is output, the diode D1 becomes conductive at its peak level V _P and the capacitor C2 is instantly charged. If the potential drop across the diode D1 at this time is _VF , the voltage _V3 charged in the capacitor C2 is equal to _VP - _VF . On the other hand, during the period when the potential of the output _O1 from the differential amplifier circuit A1 is lower than V _P -V _F , the diode D
1 is non-conductive. Therefore, during this period, capacitor C2 is discharged via resistors R1 and R2. The discharge time constant at this time is approximately given by C2×R1×R2, and if this is sufficiently large with respect to the repetition period of the input signal, the amount of discharge of the capacitor C2 is small. Therefore, since charging and discharging of the capacitor C2 is repeated at the period of the positive peak signal at the output _O1 of the differential amplifier circuit A1, the terminal voltage of the capacitor C2 increases.
V ₃ is set to be approximately equal to a constant DC voltage V _P -V _F corresponding to the peak level V _P of this output O ₁ .
It will be charged. This V ₃ is due to the negative feedback operation mentioned above.
As a result, the peak level V _P of the output O ₁ of the differential amplifier circuit A1 becomes approximately B1 + V _F , which is approximately equal to the bias voltage B1.
be clamped to.

If a large noise signal that reaches near the peak level of the input signal I is mixed in, the third
The noise signal is also amplified as shown by the broken line _O1 in the figure, but in Figure 2, one input terminal (gate of MOS20) of the differential pair of the second-stage differential amplifier circuit A2 is The output signal _O1 from the first stage differential amplifier circuit A1 is supplied, and the other input terminal (gate of MOS19) has a voltage approximately equal to the above V _P -V _F.
Since V ₂ is applied, the output signal O ₁ and the voltage V 2 (that is, V _P -V F ) are compared in level in the differential amplifier circuit A2, and as a result, the output signal O 1 and the voltage V ₂ (that is, V P −V _F ) are compared in level, and as a result, the output signal O 1 and the voltage V 2 (that is, V P −V F ) are
As shown in _O2 , a positive pulse is output only during the period when the level of signal _O1 is equal to or higher than V _P -V _F , and V _P
Noise signals at a level below -V _F are completely removed.

As explained above, the present invention performs negative feedback non-inverting amplification of only the vicinity of the peak level of the input signal, and
It has a good N ratio and stably amplifies only a desired signal, and all of the two differential amplifier circuits A1 and A2 are composed of MOSFETs.

In addition, since only the desired signal can be obtained from the second stage differential amplifier circuit A2 at a sufficiently large amplitude level, this output O ₂ can be output from a logic element composed of, for example, PMOS or NMOS. It can be directly interfaced with a logic element or a CMOS logic element that is complementary to PMOS and NMOS. Therefore, these differential amplifier circuits can be integrated together with digital circuits composed of MOS logic elements, making it easy to integrate large-scale ICs including analog circuits and digital circuits.

As described above, according to the present invention, even if the signal is a small signal with a poor S/N ratio, it is possible to reliably remove noise and always stably amplify only the desired signal. Since everything, including the bias circuit and output stage, is composed of MOSFETs,
It can be directly interfaced with MOS logic circuits, and most parts of the circuit except for capacitors can be integrated with MOS, which has the effect of increasing the degree of circuit integration and further reducing power consumption. can get.

[Brief explanation of the drawing]

FIG. 1 is a waveform diagram showing a signal waveform amplified by a conventional amplifier circuit, and FIG. 2 is a waveform diagram showing a signal waveform amplified by a conventional amplifier circuit.
FIG. 3 is a circuit diagram showing an embodiment of an amplifier circuit using MOSFETs, and FIG. 3 is a waveform diagram of each part of FIG. 2. 4 to 23...MOSFET, A1, A2...differential amplifier circuit, D1...diode.

Claims (1)

[Claims] 1. The sources of the commonly connected differential pair MOSFETs are of the same P type or N type as the MOSFETs.
It has first and second differential amplifier circuits connected to a MOSFET constant current source, a signal is input to the first input terminal of the first differential amplifier circuit, and the first differential amplifier circuit negative feedback to the second input terminal,
The second input terminal is grounded in an alternating current manner via a capacitor, and the output of the first differential amplifier circuit is supplied to the capacitor via a diode, and the output of the first differential amplifier circuit is The voltage applied to the second input terminal of the first differential amplifier circuit is input to one gate of the differential pair MOSFET of the second differential amplifier circuit, and the voltage applied to the second input terminal of the first differential amplifier circuit is supplied to the other gate. The differential amplifier circuit compares the voltage applied to the second input terminal of the first differential amplifier circuit and the output of the first differential amplifier circuit, and amplifies the difference voltage between the two. An amplifier circuit characterized in that it is configured as follows. 2 A source follower is used in the output stage of the first differential amplifier circuit, and this source follower is configured.
Claim 1, characterized in that a load of a P-type or N-type MOSFET of the same type as the MOSFET is connected to the source of the MOSFET, and a differential amplified output is obtained from the source of the source follower MOSFET. The amplifier circuit described in .