JPS6161417B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a control circuit in which microcomputer-based control is executed.

The control circuit in which microcomputer-based control is executed includes an instruction memory 1, a program counter 2, a subroutine stack 3, a stack pointer 4, and a control section 5, as shown in FIG. . In such a control circuit, for example, the flow of a program when two-level subroutines are used, and the subroutine stack (hereinafter referred to as stack) corresponding to this flow.
3 and the stack pointer (hereinafter referred to as SP) 4 will be explained using the flowchart of FIG. 2 and the state diagram of the stack and SP of FIG. 3. In addition,
In the figure, △△△ is an arbitrary instruction, a and b are return addresses from the subroutine, □
indicates stack, and → indicates SP.

While the main program is being executed, subroutine level 1 is called by subroutine call instruction CALL1. At this time, return address a for CALL1 is written in the stack, and SP specifies this return address a.

Next, run the program. Finally, subroutine level 2 is called by subroutine call instruction CALL2. At this time, return address b corresponding to CALL2 is written in the stack, and 1 is added to SP to specify return address b. When the program is executed, the last return instruction RETURN2 returns to address b specified by SP. SP is decremented by 1 and specifies address a.
When the next program is executed, the last return instruction RETURN1 returns to address a specified by SP, and the main program is executed. At this time, 1 is subtracted from SP.

As is clear from the above explanation, subroutine control is performed by a combination of stack and SP. It is important to note that when controlling such subroutines, for return commands,
There must be a call instruction corresponding to this, and if the call instruction does not exist, the program has no meaning.

In the known control circuit shown in FIG. 1, although the subroutine is controlled as described above,
If the principle of correspondence between a return instruction and its corresponding call instruction is disrupted due to the influence of noise, the program enters an infinite loop and the control function is lost.

The situation in which the above-mentioned problem occurs will be explained below with reference to the flowchart shown in FIG. 4, the state diagram of the stack and SP shown in FIG. 5, and the state diagram showing an infinite loop entered in FIG.

As shown in Fig. 4, for example, if a noise occurs during the execution of the program and the contents of the program counter change, the program deviates from the normal program flow shown by the dotted line and shifts to the program flow shown by the solid line. Jump into other programs.

FIG. 5 is a diagram illustrating the state of the stack and SP when such a situation occurs. That is, the call instruction CALL1 writes address a on the stack and the program is executed, and then the call instruction CALL3 writes address b on the stack and starts executing the program.
By the way, if noise occurs during the execution of the program, another program will be executed along the route '. Next, when the instruction based on the call instruction CALL4 is executed, the return address c is written in the stack where the return address to the main program was written, and therefore the information about the return address to the main program is lost. Therefore, execute the program and return command RETURN4
The process returns to address c.

The next program is executed, and finally the return instruction RETURN2 is executed. At this time, since SP specifies return address b, control is transferred to b by the return instruction RETURN2, and SP
is subtracted, specifying the return address c. Next time you run the program, the return instruction
RETURN1 appears. At this time, since SP specifies return address c, control is transferred to c, SP is decremented by 1, and specifies return address b. Now run the program again,
A return command RETURN2 appears.

Due to this operation, as shown in Figure 6,
An infinite loop is formed by the loop of b-RETURN1-c-RETURN2-b.

Figures 7 to 9 are diagrams showing the most common cases of three levels of subroutines, and if we focus only on return instructions and call instructions, an infinite loop will be formed in a state where there is no call instruction and the return instruction is repeated. Ru. In other words, in the flowchart shown in Figure 7, if noise occurs while the program is being executed and the contents of the program counter change, the program moves to the flow shown by the solid line and is interrupted by jumping into another program. Finally, the above infinite loop is formed. Incidentally, the occurrence of such an infinite loop is not due to the special characteristics of the program, but is due to the configuration itself consisting of the program counter, stack, and SP.

Generally, when a subroutine call or return is executed, two operations are performed: moving SP (SP ± 1 → SP) and passing data between the program counter (PC) and the stack (STACK). Two operations are required: (PC→STACK, STACK→PC). In addition, in control circuits such as microcomputers, in order to save hardware, the two operations described above are not executed at exactly the same timing, and the first
As shown in FIGS. 0 and 11, two operations, a call instruction and a return instruction, are often executed in chronological order to save hardware.
However, when one instruction is executed at two different timings as described above, there is a possibility that only half of the instruction is executed due to the influence of noise and the like. For example, when executing a call instruction,
If noise occurs immediately after executing the first half of the instruction to move the SP (SP+1→SP), data transfer between the program counter and the stack (PC→
The latter half of the instruction that performs STACK) will not be executed.

FIGS. 12 and 13 are flowcharts showing how the above-mentioned problems occur, and the stack and
It is a state diagram of SP. That is, in the program of FIG. 12, execute the program up to
Immediately after executing SP+1→SP among CALL3 instructions, noise occurred, and although 1 was added to SP,
Assume that the program does not proceed to the control program. In this case, the program continues,
Execute the CALL4 program, RETURN4 program, and RETURN1. By the way, in CALL 3, 1 is added to SP, so the stack position is out of order. Therefore,
When RETURN1 is executed, control is transferred to the return address b specified by SP, as shown in Figure 13, and therefore the further program,
CALL3 program, RETURN3 program, CALL4 program,
RETURN4, program and RETURN
1 is executed. However, as shown in Figure 13, at the time of the program, d and d are written in the stack, so RETURN is
By executing the instruction 1, control is transferred to d.

Therefore, between RETURN1 and the return address d for the immediately previous call instruction, that is,
It goes into an infinite loop with d-RETURN1.

Figures 14 and 15 are diagrams illustrating the case of the subroutine 3 level. During execution of the CALL4 instruction, when 1 is added to SP, it is affected by noise and the call address is not loaded into the program counter. The case is shown below.

In this case, execute the program after 〓 program, h→RETURN1→i→
Enters an infinite loop during RETURN8.

In these cases, if we focus only on the subroutine call instruction and the return instruction, an infinite loop is formed due to the return instruction being repeated without the call instruction.

As explained above with some examples,
In the control circuit shown in Figure 1, which is composed of an instruction memory, a program counter, a subroutine stack, and a stack pointer, there is a risk of entering an infinite loop associated with a return instruction due to noise, regardless of the program. There is. Furthermore, once the system enters an infinite loop, it is no longer possible to return to the normal state. Furthermore, as shown in the flowchart, the infinite loop described above occurs in a part where nesting is performed, so it can occur in many parts within one program.To prevent this, It was almost impossible to implement countermeasures for this problem in a program.

As explained above, the present invention realizes a control circuit that can escape from an infinite loop even when the control circuit enters an infinite loop. The control circuit will be explained with reference to the drawings.

FIG. 16 is a block diagram showing the configuration of the control circuit of the present invention, the basic part of which is composed of an instruction memory 1, a program counter 2, a subroutine stack 3, a stack pointer 4, and a control section 5. It is the same as a conventional control circuit in this respect, but it differs from a conventional control circuit in that it has an additional counter (return counter) 6 that is incremented by 1 when a return instruction from a subroutine is issued and cleared by a call instruction. are doing. and,
The output (Cout) generated when the count of the counter 6 reaches a predetermined value is used to load a certain location into the program counter 2, and execution of the program is started from the loaded certain location.

By the way, since the return counter 6 is incremented by 1 by a return instruction and cleared by a call instruction as described above, it counts up by 1 only when a return instruction is executed without a call instruction. This state occurs when the control circuit enters an infinite loop, and the return counter 6 is counted up indefinitely. Therefore, it is possible to detect whether the control circuit has entered into an infinite loop by detecting whether the return counter 6 has counted up to the number of nestings that are possible for the control circuit or more. I can do it.

A terminal 7 attached to the program counter 2 is a terminal for loading a certain address based on the occurrence of an output (Cout) in the return counter 6 that detects that the program has entered an infinite loop. and,
For example, by writing an error handling program to escape a control circuit from an infinite loop from a single location, or by specifying a program initialization routine at a single location without creating a specific program. This will restore the control circuit system to normal.

Note that as a method of loading a constant value into the program counter 2, either a method of directly loading the program counter or a method of loading a substantially constant value by activating the clear circuit of the control circuit may be adopted. good.

The case of subroutine level 2 will be explained below as an example.

In the control circuit shown in FIG. 16, the set count number of the return counter 6 is 3, and the fixed location is 4.
It is also assumed that an error handling routine is written starting from address 4. When the control circuit with this condition setting is operating normally,
Since the subroutine nesting is at two levels, the return instruction is never executed three or more times in a row.

That is, the return counter 6 is cleared by a call instruction and does not reach a number of 3 or more. By the way, if the control circuit enters an infinite loop as shown in the program chart of FIG. 4, the return command is repeated without the call command, as already explained.

Figure 17 shows the return counter 6 and program counter 2 when the control circuit enters an infinite loop.
FIG. CALL4 as shown
When the instruction is executed, the return counter is cleared and becomes 0, but after this, the program
RETURN4, program, RETURN2,
By executing the program and RETURN1, the content of the return counter becomes 3,
Here, the set count number 3 is detected. Based on this detection, address 4 is loaded into the program counter, an error handling routine is executed, and the infinite loop is exited.

In this manner, the control circuit of the present invention can escape from the infinite loop even if it once enters the infinite loop due to the influence of noise. Note that even if the number of nested subroutines is large, it is possible to escape from the infinite loop in the same way by setting the count number of the return counter accordingly. Furthermore, the control circuit of the present invention has the advantage of being able to detect if a subroutine with a nesting level higher than the possible nesting level is erroneously used.

[Brief explanation of the drawing]

Figure 1 shows the configuration of a conventional control circuit, Figure 2 shows the configuration of a conventional control circuit.
Figures 4 and 3 are diagrams showing the flow of a program when a two-level subroutine is used and the corresponding states of the stack and stack pointer, and Figures 4 to 6 explain the state of entering an infinite loop. Figures 7 to 9 are diagrams showing the state of entering an infinite loop under the subroutine 3 level, Figure 10
11 is a diagram showing the execution state of a call instruction and a return instruction, FIGS. 12 and 13 are diagrams for explaining inconveniences that occur under chronological instruction execution, and FIGS. 14 and 15. The figure is a diagram to explain the state in which an infinite loop occurs when the call address is not loaded under the subroutine 3 level.
FIG. 16 is a block diagram showing the configuration of the control circuit of the present invention, and FIG. 17 is a diagram showing the states of the return counter and program counter when the control circuit of the present invention enters an infinite loop. 1... Instruction memory, 2... Program counter, 3... Subroutine stack,
4...Stack pointer, 5...Control unit, 6...
Return counter, 7...Terminal for loading to a certain location.

Claims (1)

[Claims] 1 comprises an instruction memory, a program counter, a subroutine stack, a stack pointer, and a control section, the subroutine is controlled by the subroutine stack, the stack pointer, and the program counter, and the instruction memory is controlled by the output of the program counter. A counter that is cleared by a call instruction and counts by a return instruction is added to a control circuit that performs overall control by addressing the memory contents at the same address and inputting the memory contents at the same address to the control unit. A control circuit, characterized in that when a count value of reaches a predetermined value, a predetermined address is loaded into the program counter.