JPS6210466B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a facsimile transmitter, and particularly to a facsimile transmitter that controls sub-scanning for line skipping depending on the presence or absence of a significant signal in an image signal obtained by reading scanning. The purpose of this invention is to ensure the detection of significant signals.

In recent years, facsimile transmitters equipped with a line-skipping function, etc., use a so-called self-scanning type reader such as a CCPD to read and scan a document repeatedly at a constant period. Figure 1 shows the configuration of the above-mentioned reader, which in principle consists of a photoelectric conversion element group Pa, which receives each line of light from the original.
It can be thought of as a combination of Pb...Pn, a group of switches Sa, Sb...Sn that extracts signals from each element, and a group of shift registers Ra, Rb...Rn for parallel/serial conversion of each extracted signal. .

In such a reader, the photoelectric conversion element groups Pa,
The signals from Pb...Pn are transferred to the register group Ra, Rb...Rn at the timing of the start signal ST in Fig. 2, and are read out from this register group by the clock pulse CP for each high level period of VT in Fig. 2. At that time, each one line of image signals read out in each of the readout periods V _{1 ,} V _{2 ,} . It has been accumulated in

However, as shown in Figure 3, the relationship between the accumulation period and output voltage of each element in the photoelectric conversion element group Pa, Pb,...Pn generally has a relatively long rise time To, and moreover, in recent facsimile devices, For high-speed processing, the accumulation times C ₁ , C _{2 .} . . are selected to be shorter than the rise time To.

For this reason, when performing a line-skipping operation, as with conventional facsimile transmitters, it is first checked whether or not there is a significant signal (usually a black signal) in each line of image signals derived from the reader. If the same line is read and scanned again when a significant signal is detected and the image signal obtained by the second reading scan is stored in the low-speed conversion memory, the above-mentioned accumulation period The disadvantage is that the detection accuracy of the above-mentioned significant signal differs due to the fact that the sub-scanning drive pulse may or may not be generated during the process, and therefore the significant signal in the image signal cannot be accurately determined. It was hot. First, this will be explained in more detail with reference to FIG.

In FIG. 2, the reading scan by the reader in FIG. 1 is performed 10 times during one period T _L of the phase signal PS, and two of these scans are performed during the phase signal period T _p . The frequencies of the start signal ST and driving clock CP mentioned above are selected. Therefore, the time relationship between the phase signal PS, the reading timing VT of the reader, that is, the shift register group in FIG. 1, and the start signal ST is as shown in the figure.

Now, in FIG. 2, the conventional facsimile transmitter described above is as follows. That is, V ₁ of the derivation (reading) timing VT of the image signal from the reader
A significant signal exists in the image signal derived during the period,
Assuming that it is detected by the image signal determination circuit, in this case, the image signal of the above V ₁ period is not written to the memory for low-speed conversion, and the image signal derived in the next V ₂ period is written to that memory. It can be done. Then, after the writing is completed, r ₁ of the sub-scanning drive pulse MR is
is generated. In other words, in this case, V ₁ in Figure 2
In the period and _V2 period, the image signal corresponding to the same line of the document is derived twice in succession, a significant signal is detected for the first image signal, and the second image signal is It will be written to the aforementioned memory. WT in FIG. 2 represents the write timing of the memory.

For example, when the determination circuit detects that no significant signal exists in the image signal derived during the _V11 period in FIG. 2, writing to the memory is prohibited until the next significant signal is detected. and the following
At a predetermined timing up to the start of the _V12 period, a sub-scanning driving pulse _r2 is generated to move the document by one line. Then, when there is no significant signal in the image signal derived during the _V12 period, the sub-scanning driving pulse _r3 is similarly generated until the next _V13 period.
It is becoming more and more likely to occur. Note that RT in FIG. 2 represents the above-mentioned memory read timing.

By the way, if we pay attention to the V ₁₁ period and V ₁₂ period in Fig. 2, the image signal derived from the reader during the V ₁₁ period is accumulated in the previous C ₁₀ period, as mentioned above, and similarly The image signal derived during the _V12 period is the one accumulated during the _C11 period. At this time, since no sub-scanning driving pulse is generated during the _C10 period, the image signal derived during the _V11 period corresponds to one certain line. but,
Since the sub-scanning drive pulse _r2 is generated in the _C11 period, the image signals derived in the _V12 period correspond to two lines.

Therefore, significant signals are not detected with the same accuracy in the V ₁₁ period and the V ₁₂ period. That is, in determining the image signal in the V ₁₁ period (detection of a significant signal), since the image signal corresponds to a certain line accumulated in the C ₁₀ period, it can be easily determined that there is no significant signal. It can be determined that But V ₁₂
In the period, the image signal is a composite output of the one accumulated in the C11a period corresponding to the above line (no significant signal) and the one accumulated in the C11b period corresponding to the next line. Therefore, that
Even if a significant signal exists on the line corresponding to the C11b period, this line cannot be determined to have a significant signal because the C11b period is shorter than the entire _C11 period. Therefore, in the _V12 period, it is mistakenly determined that there is no significant signal when it should be determined that there is a significant signal. This means that when the document changes from white (no significant signal) to black (with significant signal) in the sub-scanning direction, a malfunction occurs in which the first black line is detected as a white line.

Therefore, the present invention has been made to eliminate such drawbacks. That is, in the facsimile transmitter of the present invention, the image signals sequentially derived from the reader are directly written into the low-speed conversion memory regardless of the presence or absence of a significant signal, and at the same time, the presence or absence of the significant signal is detected;
A sub-scan driving pulse is generated at a predetermined timing depending on the presence or absence of the significant signal,
This ensures that the significant signal detection operation is always performed with the same accuracy.

The details of the facsimile transmitter of the present invention will be explained in the fourth section below.
This will be explained with reference to the drawings and FIG.

In FIG. 4, reference numeral 1 denotes a reader configured as shown in FIG. It is now converted into a value image signal. Reference numeral 4 designates the image signal determination circuit as described in the prior art example, and the two outputs DA and DB of this circuit become high level when a significant signal is detected. 5 is a drive circuit for the reader 1;
To this circuit, a high-speed first clock pulse _CP1 from a frequency dividing circuit 9, which will be described later, is applied as the aforementioned driving clock, and the output of the starting signal generating circuit 7 is applied as a start signal ST.
Further, 6 is a counting circuit that counts the clock pulse CP ₁ every time it is reset by the start signal ST, and its output VT changes from high level to low level when the number of elements corresponding to the number of elements of the reader 1 is counted. Invert.

On the other hand, reference numeral 8 denotes a reference clock pulse generation circuit, and the frequency dividing circuit 9 receives the output from the reference clock pulse generation circuit to generate the aforementioned first clock pulse _CP1 and a low-speed second clock pulse.
CP ₂ is created, and these CP ₁ and CP ₂ are supplied to a memory control circuit 14, which will be described later. Further, 10 is a phase signal generating circuit which obtains one of the clock pulses _CP1 and generates a first phase signal PA and a second phase signal PB. The time relationship between the above two phase signals PA and PB is the fifth
It is as shown in the figure, and each phase signal period is selected to be 1/20 of one period. As can be seen from ST in FIG. 5, the reader 1 performs reading once in a time corresponding to 1/2 of the phase signal period, and therefore, during one period of both the phase signals PA and PB. The reading operation is performed 10 times at regular intervals. 11 is the third clock CP ₃ from the frequency dividing circuit 9 and the outputs DA, DB of the image signal determination circuit 4;
is a pulse motor control circuit supplied with 12
is a sub-scanning pulse motor driven by the output pulse MR.

Further, 13 is a buffer memory for low-speed conversion of each line of binary image signal VD from the binarization circuit 3, and 14 is a control circuit for the memory. This control circuit 14 is supplied with the aforementioned clock pulses CP ₁ and CP ₂ , the two-phase signals PA and PB, and the image signal determination outputs DA and DB. Reference numeral 15 is a transmission control/controller that obtains one of the image signal determination outputs DA, creates a line skip signal, and sends this signal to the receiver side together with the image signal VD read out from the memory 13 and the second phase signal PB. It is a modulation circuit.

Next, the operation of such a facsimile transmitter will be explained with reference to FIG.

The reading timing within B ₁ of the second phase signal PB, i.e.
The image signal derived from the reader 1 during the V ₁ period passes through the amplifier circuit 2 and is then binarized by the binarization circuit 3.
The binary image signal VD is written into the buffer memory 13 by the first clock pulse CP ₁ from the memory control circuit 14, and at the same time is introduced into the image signal determination circuit 4. WT in FIG. 5 represents the write timing of the memory 13.

Now, assuming that there is no significant signal in the image signal VD derived during the V ₁ period, the outputs DA and DB of the determination circuit 4 are at a low level at this point, so that the motor control circuit 11 , the memory control circuit 14, and the transmission control/modulation circuit 15, respectively, are controlled as follows.

That is, the memory control circuit 13 outputs the judgment output.
When both DA and DB are at low level, the buffer memory 13 is kept in the write state and the next
Waits for writing of the image signal derived from the binarization circuit 3 during the _V2 period.

On the other hand, the motor control circuit 11 outputs the judgment output.
When both DA and DB are at low level, the sub-scanning drive pulse MR is generated after a certain period of time Δτ has passed from the time when the output VT of the counting circuit 6, which represents the reading timing, switches to low level. The driving pulse r ₁ is generated at the time shown and is sent to the pulse motor 12 . As a result, the original is transferred by one line in the sub-scanning direction.

Then, the transmission control/modulation circuit 15 outputs one of the above judgment outputs at the reading timing when DA is at low level.
Since the line skip signal is generated from the falling point of VT, its reading timing is
_S1 of the line skip signal LS is generated between the _V1 period of VT and the next _V2 period. Therefore, in this state, no image signal is sent from the modulation circuit 15, and only the line skip signal _S1 and the preceding second phase signal PB _B1 are sent to the receiving side.

Next, the image signal VD derived from the binarization circuit 3 during the V ₂ period is also written into the buffer memory 13 (W ₂ period in FIG. 5) and is introduced into the image signal determination circuit 4. , assuming that a significant signal exists in the image signal during the _V2 period, the outputs DA and DB of the determination circuit 4 are both at a high level. One of these outputs, DA, is held until the start of the next _V3 period, and the other, DB, becomes high level and is held until the first fall of _B2 , which is the second phase signal PB. When both outputs DA and DB are at high level, the motor control circuit 11, memory control circuit 14,
The transmission control and modulation circuits 15 are controlled as follows.

That is, the memory control circuit 14 outputs the judgment output.
When both DA and DB are at a high level, writing and reading from the buffer memory 13 is prohibited, and when one of the judgment outputs, DB, is switched to a low level, the memory is placed in a read mode. That is, it is read out during the _R1 period of the read timing RT synchronized with the second phase signal PB. Therefore, the read timing VT
Each image signal derived from the binarization circuit 3 during the V ₃ , V ₄ , ..., V ₂₀ period is not written into the memory 13, and the image signal written during the previous V ₂ period is read out at the read timing RT. Slow second clock pulse for _R1 period of
It is sent to the transmission control and modulation circuit 15 by CP ₂ .

On the other hand, the motor control circuit 11 outputs the judgment output.
When both DA and DB are at high level, the sub-scanning drive pulse MR as described above is not generated, and when one of the judgment outputs DB switches to low level, the above drive pulse is generated at the timing of the rise of the first phase signal PA. Generate r ₂ of pulse MR. Therefore, between r ₁ and r ₂ , the document is not transferred at all and the reader 1 faces the same line, so one of the image signal judgment outputs DA
changes as shown. Further, at this time, since the time relationship between the first and second phase signals PA, PB and the reading timing VT is selected as described above, r ₂ will occur after the aforementioned Δτ time from the end of V ₂₀ .

Then, when one of the judgment outputs DA is changing as shown in the figure, the transmission/control circuit 15 does not generate the line skip signal LS as described above,
The image signal read out from the memory 13 during the _R1 period and the second phase signal from the phase signal generation circuit 10
Send PB to the receiving side.

Next, the document is moved by one line by _r2 of the sub-scanning drive pulse MR, and in the next _V21 period, the image signal derived from the binarization circuit 3 is judged by the image signal judgment circuit 4. However, if a significant signal is detected for this image signal as well, at this time, as in _the previous case, the memory 1 is
The image signal written in the second phase signal PB is read out during the R2 period of the read timing RT synchronized with the _second phase signal PB.
Then, the low-speed converted and read image signal is sent out from the transmission control/modulation circuit 15 in the same manner as described above. Also, at this time, the sub-scanning drive pulse MR is
_r3 is generated at the timing of the rising edge of _A4 of the first phase signal PA.

Next, the image signal derived during the V ₃₁ period of the reading timing VT is judged by the image signal judgment circuit 4. Assuming that there is no significant signal in this image signal, the waveform of each part will be explained first. The result will be as shown in the figure, and the same operation will be repeated from now on.

Now, if we pay attention to, for example, the V ₂ period and the V ₂₁ period in FIG. 5, the image signal derived from the reader 1 during the V ₂ period is accumulated during _the C ₁ period, and
The image signals of the period are accumulated in the C ₂₀ period, and the sub-scanning drive pulses r ₁ and r ₂ are generated at the same timing within each accumulation period C ₁ and C ₂₀ , respectively. This is the _V2 period after line skipping and the _V21 period after normal sub-scanning.
The detection of a significant signal by the image signal determination circuit 4 for each period is under exactly the same conditions (i.e., the first half and the second half of the accumulation period correspond to each of two adjacent lines, and the time period corresponds to one of them). This means that it is always carried out in a constant state). Therefore, in the embodiment shown in FIG. 4, if the detection accuracy of the image signal determination circuit 4 is selected to be sufficiently high, the significant signal detection operation can always be performed reliably with constant accuracy regardless of the presence or absence of line skips. become.

Furthermore, each image signal introduced into the binarization circuit 3 also corresponds to image information for two adjacent lines, but since this is true for all lines of the original, each image signal There is no risk of erroneous binarization, and therefore a binary image signal faithful to the original image information can be obtained from the binarization circuit 3.

As explained above, the facsimile transmitter of the present invention can always reliably and accurately detect the presence or absence of a significant signal in an image signal with constant accuracy regardless of the switching operation of sub-scanning by line skipping. This eliminates the malfunction in which the first black line is binarized as a white line when the line changes from white to black in the sub-scanning direction.
Therefore, it has the advantage of always being able to derive an image signal that is faithful to the original image information, making it an excellent facsimile transmitter with a line-skipping function.

[Brief explanation of the drawing]

Figure 1 is a diagram showing the basic configuration of an example of a self-scanning type document reader, Figure 2 is a time chart for explaining the operation of a conventional facsimile transmitter using this reader, and Figure 3 is a diagram showing the basic configuration of an example of a self-scanning type document reader. FIG. 1 is a diagram showing the characteristics of a reader, FIG. 4 is a diagram showing a schematic configuration of a facsimile transmitter according to the present invention, and FIG. 5 is a time chart for explaining its operation. DESCRIPTION OF SYMBOLS 1... Reader, 2... Image signal amplification circuit, 3... Binarization circuit, 4... Image signal determination circuit, 5... Reader drive circuit, 6... Counting circuit, 7... Starting signal creation circuit, 8...
Reference clock generation circuit, 9... Frequency dividing circuit, 10... Phase signal generation circuit, 11... Pulse motor control circuit,
12... Sub-scanning pulse motor, 13... Buffer memory, 14... Memory control circuit, 15... Transmission control and modulation circuit.

Claims (1)

[Scope of Claims] 1. In a facsimile transmitter configured to read and scan a document at high speed at a constant cycle, and to control line skipping operations according to the content of image signals for each line obtained thereby, the reading method comprises: The image signals for each line of scanning are written into a memory for low-speed conversion, and the presence or absence of a significant signal in each image signal is detected, and if no significant signal is detected in the image signal for a certain line. When a significant signal is detected, a sub-scan driving pulse is generated at a predetermined timing between the end of the reading period and the start of the next reading period, and when a significant signal is detected, the image signal obtained from the subsequent reading scan is stored in the memory. After that, after the phase signal arrives, the image signal stored in the memory is read out and sent to the receiving side, and from the end of the reading period immediately before the end of reading to the beginning of the next reading period. A facsimile transmitter characterized in that a sub-scanning drive pulse is generated at a predetermined timing between the two.