JPS6214824B2 - - Google Patents
Info
- Publication number
- JPS6214824B2 JPS6214824B2 JP12971779A JP12971779A JPS6214824B2 JP S6214824 B2 JPS6214824 B2 JP S6214824B2 JP 12971779 A JP12971779 A JP 12971779A JP 12971779 A JP12971779 A JP 12971779A JP S6214824 B2 JPS6214824 B2 JP S6214824B2
- Authority
- JP
- Japan
- Prior art keywords
- pattern
- mask
- patterns
- electron beam
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000000034 method Methods 0.000 claims description 12
- 238000010894 electron beam technology Methods 0.000 claims description 10
- 239000004065 semiconductor Substances 0.000 claims description 9
- 238000004519 manufacturing process Methods 0.000 claims description 8
- 238000005516 engineering process Methods 0.000 description 4
- 239000002131 composite material Substances 0.000 description 3
- 238000001259 photo etching Methods 0.000 description 3
- 230000010354 integration Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000005530 etching Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/20—Exposure; Apparatus therefor
- G03F7/2022—Multi-step exposure, e.g. hybrid; backside exposure; blanket exposure, e.g. for image reversal; edge exposure, e.g. for edge bead removal; corrective exposure
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Preparing Plates And Mask In Photomechanical Process (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
Description
【発明の詳細な説明】
本発明は写真食刻用マスクの製造方法に関する
ものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a photolithographic mask.
半導体装置の高周波化、高集積化のため微細パ
タ―ン加工をする際パタ―ン加工が強い要望とな
つてきている。微細パタ―ン加工をする際の必須
技術である写真食刻に使用するガラスマスク、金
属マスク等のマスク上に形成しているパタ―ンの
工業的に均一かつ再現性よく形成しうる最小寸法
は現状の技術水準では1ミクロン程度である。そ
こでサブミクロンの寸法を有するパタ―ンの加
工、焼付けを実現するため波長2000Å〜2500Åの
遠紫外光X線、電子線を使用した写真食刻法が提
案、研究されている。 There is a strong demand for pattern processing when processing fine patterns due to the higher frequency and higher integration of semiconductor devices. The minimum dimension that can be industrially uniformly and reproducibly formed on a mask such as a glass mask or metal mask used in photo-etching, which is an essential technology for fine pattern processing. is about 1 micron at the current technological level. Therefore, in order to realize the processing and printing of patterns with submicron dimensions, a photographic etching method using deep ultraviolet X-rays and electron beams with a wavelength of 2000 Å to 2500 Å has been proposed and researched.
電子線を用いた写真食刻法、いわゆる電子ビ―
ム露光においては直径5〜15cmの半導体ウエハに
パタ―ンを一点一点形成せねばならず、一枚のウ
エ―ハ全域に直接パタ―ンを焼き付ける時間はパ
タ―ンの難度にもよるが、通常は数時間以上必要
である。従つて半導体ウエ―ハ上に電子ビ―ム露
光を用いて直接パタ―ンを形成する方法は半導体
装置の量産には適さない。一方遠紫外光、X線を
使用する写真食刻技術では半導体ウエ―ハ上に一
度にパタ―ンを焼きつける利点はあるが、サブミ
クロンの精度のパタ―ンを多数形成した半導体ウ
エフア―とほぼ同面積のマスクを必要とする。こ
のサブミクロンパタ―ンを形成するには現状の光
を用いた大きなパタ―ンを縮小する方法では回折
限界の問題で不可能である。従つてサブミクロン
パタ―ンを形成するには電子ビ―ム露光に頼らざ
るを得ない。 Photo-etching method using electron beam, so-called electronic beam
In photolithography, patterns must be formed point by point on a semiconductor wafer with a diameter of 5 to 15 cm, and the time it takes to directly print a pattern over the entire area of a wafer depends on the difficulty of the pattern. However, it usually takes several hours or more. Therefore, the method of directly forming a pattern on a semiconductor wafer using electron beam exposure is not suitable for mass production of semiconductor devices. On the other hand, photo-etching technology that uses deep ultraviolet light and Requires a mask with the same area. In order to form this submicron pattern, it is impossible to use the current method of reducing a large pattern using light due to the problem of diffraction limit. Therefore, in order to form submicron patterns, it is necessary to rely on electron beam exposure.
どんなに微細な精度を要求されるマスクも、一
つのパタ―ンの中にはサブミクロンの寸法を有す
る部分と数ミクロンから数十ミクロンの広い寸法
を有する部分が混在している。電子ビ―ム露光で
サブミクロンのパタ―ンを形成するためには電子
ビ―ム径はさらにその寸法の数分の一以下にせね
ばならない。従つて広いマスクを形成するには、
半導体ウエ―ハ上に直接露光するのと同様に非常
に時間がかかり、マスクの製造費は非常に高くな
る。また、マスクの使用回数の限界は一般に数十
回以下であるため、半導体装置に占めるマスクの
製造費をさらに上昇する欠点を有している。 No matter how precise a mask is, a single pattern includes parts with submicron dimensions and parts with wide dimensions ranging from several microns to several tens of microns. In order to form a submicron pattern by electron beam exposure, the diameter of the electron beam must be further reduced to a fraction of that dimension. Therefore, to form a wide mask,
Like direct exposure onto a semiconductor wafer, it is very time consuming and the cost of manufacturing the mask is very high. Furthermore, since the limit on the number of times a mask can be used is generally several tens of times or less, it has the disadvantage of further increasing the manufacturing cost of the mask, which is a part of a semiconductor device.
本発明は遠紫外露光に使用するサブミクロン寸
法を有するマスクを低価格で提供し、もつて半導
体装置の高周波化、高集積化を容易且つ安価に達
成せしめようとするものである。 The present invention aims to provide a mask with submicron dimensions for use in deep ultraviolet exposure at a low cost, thereby making it possible to easily and inexpensively achieve higher frequencies and higher integration of semiconductor devices.
本発明によれば、微細加工技術を必要としない
大きなパタ―ンを光露光法によつて形成し、一方
微細加工技術を必要とする細かいパタ―ンを電子
ビ―ム露光法によつて形成する。 According to the present invention, large patterns that do not require microfabrication technology can be formed by light exposure, while fine patterns that require microfabrication technology can be formed by electron beam exposure. do.
以下、本発明を図面を参照してより詳細に説明
する。 Hereinafter, the present invention will be explained in more detail with reference to the drawings.
広いパタ―ンや大まかなパタ―ンは光露法を用
いた縮小の方法によつても製作可能である。従つ
てまず第1図に示すように、広いパタ―ン1を目
合せパタ―ン2とともに光露光法を用いた縮小の
方法によつて形成する。 A wide pattern or a rough pattern can also be produced by a reduction method using a light exposure method. Therefore, as shown in FIG. 1, first, a wide pattern 1 and an alignment pattern 2 are formed by a reduction method using a light exposure method.
次に、全体にレジストを塗布し、目合せパタ―
ン2を基準にして微細なパタ―ン3を電子ビ―ム
露光法によつて、第2図の如くに加工する。この
時微細パタ―ン3の部分がレジストが溶解し、他
のレジストが硬化するようにする。この硬化した
レジストをマスクとして第3図に示すように、本
来のマスク材料をエツチングして広いパタ―ン1
と微細なパタ―ン3との両方を含む合成パタ―ン
4のマスクを形成する。 Next, apply resist to the entire surface and use the alignment pattern.
Using the pattern 2 as a reference, a fine pattern 3 is processed by electron beam exposure as shown in FIG. At this time, the resist is dissolved in the portion of the fine pattern 3, and the other resist is hardened. Using this hardened resist as a mask, the original mask material is etched to form a wide pattern 1, as shown in Figure 3.
A mask of a composite pattern 4 including both the pattern 3 and the fine pattern 3 is formed.
この方法により二つのパタ―ンの相対的な目合
わせ精度は±0.1ミクロンにできることが本出願
人によつて確認されており、実用上充分な精度で
二つのパタ―ンを合成しうる。さらに石英基板上
にマスク材料を設けたものの上に遠紫外露光によ
つて上記の複合パタ―ンを転写すれば容易に上記
のようなマスクが多数製作できる。またおおよそ
のパタ―ンを縮小の方法でつくり、パタ―ン精度
が重要となる部分のみ電子ビ―ム露光で作成すれ
ば容易にパタ―ン精度のよいマスクが製作でき
る。 The applicant has confirmed that this method allows the relative alignment accuracy of two patterns to be ±0.1 micron, and it is possible to synthesize two patterns with sufficient accuracy for practical use. Further, by transferring the composite pattern described above onto a quartz substrate provided with a mask material by deep ultraviolet exposure, a large number of masks as described above can be easily manufactured. In addition, a mask with good pattern accuracy can be easily produced by creating a rough pattern using a reduction method and using electron beam exposure to create only the parts where pattern accuracy is important.
第1〜3図は本発明の一実施例による各工程の
部分平面図である。
1……広いパタ―ン、2……目合せパタ―ン、
3……微細パタ―ン、4……合成パタ―ン。
1 to 3 are partial plan views of each process according to an embodiment of the present invention. 1... wide pattern, 2... alignment pattern,
3... Fine pattern, 4... Composite pattern.
Claims (1)
程と、該第1のパタ―ンの少くとも一部を位置基
準として電子ビ―ム露光により第2のパタ―ンを
形成する工程とを有し、もつて第1および第2の
パタ―ンの合成されたマスクを形成することを特
徴とする半導体装置製造用マスクの製造方法。 2 前記第1および第2のパタ―ンの合成された
マスクを遠紫外光を用いて複製することを特徴と
する特許請求の範囲第1項記載の半導体装置製造
用マスクの製造方法。[Claims] 1. A step of forming a first pattern by a light exposure method, and forming a second pattern by electron beam exposure using at least a part of the first pattern as a position reference. 1. A method of manufacturing a mask for manufacturing a semiconductor device, comprising the step of forming a mask in which first and second patterns are synthesized. 2. The method of manufacturing a mask for manufacturing a semiconductor device according to claim 1, characterized in that the mask in which the first and second patterns are combined is replicated using deep ultraviolet light.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12971779A JPS5652754A (en) | 1979-10-08 | 1979-10-08 | Manufacture of mask for manufacturing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12971779A JPS5652754A (en) | 1979-10-08 | 1979-10-08 | Manufacture of mask for manufacturing semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5652754A JPS5652754A (en) | 1981-05-12 |
| JPS6214824B2 true JPS6214824B2 (en) | 1987-04-03 |
Family
ID=15016459
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12971779A Granted JPS5652754A (en) | 1979-10-08 | 1979-10-08 | Manufacture of mask for manufacturing semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5652754A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5751000U (en) * | 1980-09-04 | 1982-03-24 |
-
1979
- 1979-10-08 JP JP12971779A patent/JPS5652754A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5652754A (en) | 1981-05-12 |
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