JPS6215943B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a PCM signal processing device. If the audio signal is processed using the PCM method, the dynamic range can be increased as much as possible depending on the number of bits used, and distortion can also be extremely reduced. The quality is dramatically improved compared to transmission using the modulation method. Furthermore, in recent years, with the development and price reduction of digital equipment, the practicality of signal processing methods based on the PCM method is increasing.

The present invention aims to propose a PCM signal processing device that converts PCM signals into the same signal format as television signals. By using the same signal format as television signals, when applying a high-quality PCM audio signal transmission system to television broadcasting, it becomes possible to use the broadcasting station's existing broadcasting equipment as is.
On the other hand, receivers can record received TV signals (PCM signals) and easily enjoy high-quality audio playback by combining a decoder with an inexpensive home-use VTR. There are advantages.

Now, as is well known, a television signal has periods in which no video signal is present, such as a vertical blanking period including a vertical synchronizing signal, an equalization pulse, etc., and a horizontal blanking period including a horizontal synchronizing signal.
On the other hand, since the audio signal is continuous, the sampling frequency of the audio signal is
This must be different from the word frequency of the PCM signal. That is, the audio signal is sampled, the serial format PCM signal obtained by AD conversion is compressed on its time axis using memory, shift registers, etc., and the data missing period is equal to the horizontal blanking period and the vertical blanking period. It is made to have. Conversely, on the decoder side, the time axis is expanded to create a continuous PCM signal, and then the DA
After conversion, a continuous audio signal will be obtained.

For ease of understanding the present invention, as described above,
An example of a PCM signal processing apparatus in which a PCM signal is in the same signal form as a television signal and uses, for example, a VTR as a transmission medium will be described with reference to FIG.

In FIG. 1, reference numeral 1 indicates a rotary two-head type VTR of helical scan type, 2i is its recording signal input terminal, and 2o is its reproduction signal output terminal. Further, 3L indicates an input terminal for the left signal of an audio signal, for example, a 2-channel stereo signal;
This signal is passed through a low-pass filter 4L to somewhat limit the high frequency range, sampled by a sampling hold circuit 5L, and then sent to an AD converter 6L.
The sampling output is converted into a parallel code, and further converted into a serial code by a parallel-to-serial converter 7, and written into a memory device 8 for time-base compression. On the other hand, the right signal is supplied from the input terminal 3R, is converted into a parallel code by passing through a low-pass filter 4R, a sampling hold circuit 5R, and an AD converter 6R, and is further converted into a serial code by a parallel-to-serial converter 7, and is then converted to a serial code in the memory. Written to device 8. The readout output of the memory device 8 has a data missing period approximately every field, and is supplied to the mixer 9, where an equalization pulse and a synchronization signal are added, and the output is sent to the recording signal input terminal 2i of the VTR 1. 2 through the recording system of VTR 1, which includes an FM modulator (not shown).
The tracks are sequentially recorded as inclined tracks on the magnetic tape by two rotating magnetic heads.

In addition, 10 is a sampling hold circuit 5L,
5R, a clock pulse for the AD converters 6L, 6R and the parallel-to-serial converter 7, a clock pulse for the memory device 8, and a pulse generator that generates equalization pulses and synchronization signals; 11 is a fixed reference oscillator; shows.

During playback, a playback signal with a waveform similar to the recording signal waveform appears from the output terminal 2o, and is passed through the noise removal filter 12, waveform shaping circuit 13, and synchronization separation circuit 1.
4 to the data extraction circuit 15. The output of data extraction circuit 15 does not include a synchronization signal and this data is written to memory device 16. The memory device 16 expands the data along the time axis, contrary to the recording process, and removes time axis fluctuations such as jitter, so that the read output of the memory device 16 has no missing periods and time axis fluctuations are removed. This is converted into a parallel code by the serial/parallel converter 17, and then converted into a parallel code by the DA converter 1.
8L, 18R and low pass filter 19L, 19
Terminals 20L and 20 through R respectively.
A stereo left signal and a stereo right signal continuous to R are demodulated and obtained. The synchronization signals separated by the synchronization separation circuit 14 are supplied to the pulse generator 21, and based on these synchronization signals, gate pulses to the data extraction circuit 15 and memory device 1 are generated.
6, serial parallel converter 17, DA converter 18L, 1
The clock pulse for 8R is generated by pulse generator 2.
1.

The present invention provides a PCM signal processing device as described above, as shown in _FIG . Data is inserted into τ ₂ , 1H = 1/ _h = τ ₁ + τ ₂ = τ ₁ + k・K/ _ch (K is the number of words in one horizontal period, k is 1
The number of bits in a word, _ch is the bit frequency).

In more detail, the reference oscillator 1 with a frequency of ₀
When the pulse generator 10 connected to the reference oscillator 1 is configured with a frequency divider as shown in FIG.
The output of 1 is supplied to a 1/N ₁ frequency divider 31 to form a clock pulse with a bit frequency of AD conversion of _cs , and a 1/n frequency divider 32 connected to the frequency divider 31 generates a clock pulse of _s . A frequency sampling pulse is formed. Further, a 1/ _N2 frequency divider 33 connected to the _reference oscillator 11 forms a clock pulse at the bit frequency of the PCM signal, which has the same signal form as the television signal channel. The 1/m frequency divider 34 forms an equivalent pulse with a frequency of _eq (31.5kHz), and the frequency divider 35 divides this equivalent pulse into 1/2 to form a 15.75kHz horizontal synchronizing signal. The equivalent pulse is divided into 1/525 by a frequency divider 36 to form a 60 Hz vertical synchronizing signal. Let's consider each frequency here.

First, the frequency ₀ of the reference oscillator 11 is set to ₀ < 50 MHz (1) in consideration of the ease of configuring the frequency divider connected thereto. Furthermore, in order to simplify the configuration of the pulse generator 10 by generating sampling pulses and horizontal synchronization signals from one reference oscillator 11 as in the configuration shown in FIG. 3, _h / _s = N ₁ · n/2 N ₂ · m...The relationship (2) must be satisfied. Furthermore, when recording and reproducing PCM signals on a rotating two-head type VTR as described above, data cannot be input into the portion where noise occurs when switching heads. VTR
In some cases, the head switching timing is set, for example, about 5 to 8 hours before the vertical synchronizing signal.
Therefore, when converting a PCM signal to the same signal format as a TV signal, vertical synchronization signals, horizontal synchronization signals,
No data can be entered into the equivalent pulse and head switching parts. Also, 3H following the vertical synchronization signal
Assuming that there is no particular need for equalization pulses, the period during which data can be input is (262.5H−14H=
248.5H). Furthermore, it is desirable that the number of words of the PCM signal included in 1H be an integer. Otherwise, the configuration that processes the horizontal synchronization signal as a timing pulse will be extremely complicated, and if a dropout occurs, the dropout compensation circuit installed in the VTR will operate and the dropout period will be replaced with a signal from 1H earlier. Therefore, when using such a dropout compensation circuit,
It is preferable that the number of words of the PCM signal included in 1H is an integer. In order to prevent the number of words in one field from complicating the configuration of the signal processing circuit and to enable editing in units of one field,
Preferably it is an integer. Therefore, if the number of words in 1H is K and the number of words in 1 field is ΣK, then [248.5×K]≧ΣK (3). In the above formula, [ ] means a Gaussian function.
Therefore, the sampling frequency _s is ΣK· _v = _s (4). Further, the relationship between the sampling frequency _s and the bit frequency _cs during AD conversion is _cs = n· _s (5). If n is the number of bits in one word of the PCM signal, the circuit configuration will be simplified in signal processing, but this is not necessarily a necessary condition. As shown in FIG. 2, the relationship between the horizontal frequency _h and the bit frequency _ch of the PCM signal is such that the horizontal synchronizing signal and its back porch enter the period _τ1 at the same time as the television signal. In addition, the PCM signal begins to enter during period τ ₂ , and if the number of bits in one word of the PCM signal is k, then 1H = 1/ _h = τ ₁ + τ ₂ = τ ₁ + k・K/ _ch ...
(6) is chosen for the relationship. Also, if necessary during period τ ₁ ,
A front porch of the horizontal synchronization signal may also be included, in which case τ ₁ will coincide with the horizontal blanking period of the television signal.

In one example of the invention, the number of words K within one horizontal period is
is 3, and the number of words ΣK in one field is 735.
Assume that the number of bits in one word k (=n) is 32. The configuration of the pulse generator 10 in this case is shown in FIG. That is, as is clear from the correspondence with Fig. 3, (N ₁ = 5, n = 32, N ₂ = 4, m = 56), ( ₀ = 7.056MHz, _cs = 1.4112MHz, _ch =
1.764MHz). Further, the pulse generator 21 of the reproduction system (decoder system) in the configuration shown in FIG.
The horizontal synchronization signal separated by the synchronization separation circuit 14 is supplied to, for example, a PLL circuit to form a signal with a frequency of ₀ (7.056MHz) synchronized with the horizontal synchronization signal, and the frequency _cs , _s
The configuration may be such that signals of and _channels are obtained.

FIG. 5 shows a waveform of a PCM signal converted into a signal format similar to that of a television signal according to an example of the present invention described above. Figure 5A shows an enlarged view of one horizontal period, in which one word consists of 32 bits during the remaining period excluding the period of the horizontal synchronizing signal HD with a pulse width equivalent to 8 bits and its back porch period corresponding to 8 bits. Three words of data are inserted. Of these 32 bits, 16 bits are one signal of the stereo signal, for example, a left signal PCM signal, and the other 16 bits are a right signal PCM signal. Furthermore, a check bit for code error detection may be inserted. As for the entire PCM signal, in the first field, as shown in Figure 5B, there is a period of 8H length that includes the head switching noise _So , and a period of 9H length that includes the equivalent pulse and vertical synchronization signal. is defined as a data missing period, followed by 245H, ie, 735 words of data. In the next field, as shown in Figure 5C, there is an 8.5H long period that includes the head switching noise _So , and a 9.5H long period that includes the equalization pulse and vertical synchronization signal, where data is missing. period, followed by 245H (735 words) of data.

As described above, according to the present invention, an analog signal such as an audio signal is converted into PCM and has the same signal format as a television signal, so it can be transmitted in the same way as television broadcasting using existing television broadcasting equipment. ,
Furthermore, it becomes possible to record and play back on a television signal recording/playback device such as a VTR, which has the advantage of allowing high-quality audio playback to be enjoyed close at hand. However, according to the present invention, since an integer word can be inserted within 1H, signal processing becomes easier, such as using the horizontal synchronizing signal HD as a timing pulse, and the dropout that is normally provided in a VTR is simplified. This has the advantage that the compensation circuit can be used effectively.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an example of a PCM signal processing device used to implement the present invention, FIGS. 2 and 5 are waveform diagrams used to explain the present invention, and FIGS. 3 and 4 are diagrams for implementing the present invention. FIG. 2 is a block diagram of a pulse generator used for 1 is a VTR, 8, 16 is a memory device, 10,
21 is a pulse generator, and HD is a horizontal synchronizing signal.

Claims (1)

[Claims] 1. A PCM that converts a continuous analog audio signal into a serial format PCM signal that can be recorded and reproduced using a helical scan VTR in which a rotating magnetic head is switched in the vicinity of a vertical synchronization signal.
In the signal processing device, the above analog audio signal is _s = ΣK・_v
The PCM signal is sampled at a sampling frequency _s and converted into a PCM signal, which has a first data-missing period with a relatively short time interval corresponding to at least the horizontal synchronization signal period of a standard television signal, and this horizontal synchronization signal period. each time a relatively short time interval corresponding to a signal period is repeated multiple times at least at the horizontal synchronization signal frequency of the standard television signal, the period includes at least a vertical synchronization signal period of the standard television signal that is an integral multiple of the horizontal synchronization signal period; The time axis is compressed in such a way that it is evenly distributed over each video signal period τ ₂ of the effective horizontal line, excluding the vertical blanking period and a second data missing period having a relatively long time interval corresponding to the head switching period. At the same time, the horizontal synchronization signal and vertical synchronization signal of the standard television signal are inserted into the first and second data missing periods and transmitted as a signal having substantially the same format as the standard television signal, 1/ _h = τ ₁ + τ ₂ = τ ₁ +k・K/ _ch (where, _v is the field frequency, _h is the horizontal frequency, τ ₁ is at least the horizontal synchronization signal period of one horizontal period and the period of its back porch, and τ ₂ is the remaining period of one horizontal period) , K is the number of words in one horizontal period of the above PCM signal and is an integer of 2 or more, ΣK is the above
The number of words in one field of the PCM signal, and _k is the number of bits in one word of the PCM signal. A PCM comprising: a clock signal generator that generates a clock signal having a clock signal, and processes a PCM signal having substantially the same format as the standard television signal in synchronization with the clock signal.
Signal processing device.