JPS6216474B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor integrated circuit that allows circuit functions to be added without increasing the number of input terminals for external signals.

FIG. 1 shows an example of the configuration of a conventional semiconductor integrated circuit in which a plurality of circuits having certain functions are integrated on a semiconductor substrate 1. As shown in FIG. Here, P, Q, R ₀ ,
... _R7 is an input signal, 2 is a buffer circuit that generates an in-phase output signal P from input signal P, 3 is a buffer circuit that generates an opposite-phase output signal from input signal Q, and 4 is an in-phase signal from input signal _R0 . and a buffer circuit that generates two complementary output signals R ₀ and ₀ of opposite phase, 5 is a circuit that performs the first function by the output P of the buffer circuit 2 which receives P as input, and 6 has Q as input. 7 is a circuit that performs the second function using the output of the buffer circuit 3, and 7 is the output R ₀ , 0 , ..., of the eight buffer circuits ₄ whose inputs _are R ₀ , .
This is a circuit that uses R ₇ and ₇ to perform the third function. When a certain kind of circuit function is added to the semiconductor integrated circuit shown in FIG. 1, the new semiconductor integrated circuit has a configuration shown in FIG. 2, for example, according to the conventional technology. Here, we have introduced the following two additional features:

(1) A fourth function that is selectively required only when the output P is at a high level. (2) A fifth function that temporarily lowers both R ₇ and ₇ to a low level in order to diagnose the operation of the circuit 7. In order to add function (1), an internal signal S is required to control the circuit 8 that performs the fourth function, and in the example shown in Fig. 2, this signal S is generated by the input signal S. . In addition, in order to add function (2), an input signal _R'7 is added, so that _R7 and _R7 can be set independently. That is, when adding a new function to a conventional semiconductor integrated circuit, it is necessary to add at least one input signal for each additional function, and therefore it is necessary to increase the number of input terminals. It was hot. Due to this configuration, a semiconductor integrated circuit having many functions has a large number of terminals, which makes it difficult to miniaturize the semiconductor integrated circuit. Another drawback is that semiconductor integrated circuits with a limited number of terminals cannot realize many functions.

In order to eliminate these drawbacks, the present invention provides a semiconductor integrated circuit in which input terminals are shared and circuit functions can be added without increasing the number of terminals.

The present invention will be explained in detail below with reference to the drawings.

FIG. 3 is an embodiment of the present invention, and shows the configuration of a semiconductor integrated circuit in which two types of functions are added to the semiconductor integrated circuit shown in FIG. 1 without increasing the total number of input signals. . The additional functions are the same two types of functions (1) and (2) as those mentioned in the description of the conventional technology. Here, 9 is P or
This is a comparison circuit that generates a control signal S or S' by comparing the voltage of the input signal of _R7 with a certain reference voltage, and is configured as shown in FIG. 4, for example. Since S is connected to circuit 8 which performs the fourth function, additional function (1)
can be obtained by setting the input signal P to such a voltage that S is generated. Further, 10 is an example of the configuration of a control circuit that sets both signals R ₇ and ₇ connected to the circuit 7 by S' to a low level. Input signal R ₇
By setting the voltage such that S′ occurs,
Both R ₇ and ₇ can be reduced to a low level, realizing additional function (2).

The comparator circuit shown _in Fig. 4 has _six
Consisting of a MOS transistor and one inverter, first the _{capacitor C 1 ,}
C ₂ is charged to bring the nodes N ₁ and N ₂ to a high potential, which is the reference voltage. Next, a certain voltage is applied to the input terminal R ₇ or P with φ ₁ set to a low level, and the charge on C ₂ is discharged or left in its original state. Next, apply the clock φ ₂ to turn on Q ₆ and turn on Q ₁ , which constitutes the flip-flop.
A capacitor that detects the state of capacitor C ₂ by Q ₂ and outputs the result through the inverter.
Q ₁ , Q so that when φ ₂ is applied without discharging the charge of capacitor C 2 , the output S or S' becomes high level, and when the charge of capacitor C ₂ is discharged, the output becomes low _level . By setting ₂ to a slightly larger value, additional functions can be realized as described above. Discharging of C ₂ can take place from input terminal R ₇ or P through Q ₃ .

For example, the threshold voltage of the MOS transistor that makes up the comparison circuit is 1V, V _DD is 5V, and the clock φ
When the high level of node N ₁ and N 2 is set to 6V, the reference voltage of nodes N ₁ and N ₂ becomes 5V. The action after this is:
If the voltage level of input terminal _R7 or P is less than 4V, the charge of _C2 will be discharged through MOS transistor _Q3 , and if the input voltage level is 4V or more, the charge _{of C2 will} be discharged.
No discharge of charges occurs. That is, in this example, when a voltage of 4V or more is applied to the input terminal with the input voltage level of 4V as the boundary, a control signal is sent from the comparator circuit.

Further, in the above example, the case where both R ₇ and ₇ are set to a low level is explained, but by changing the configuration of the control circuit 10, it is also easy to set both R ₇ and ₇ to a high level by S'. Can be done.

As explained above, the present invention makes it possible to add circuit functions without increasing the number of terminals by sharing input terminals, so even if the number of terminals is limited, the semiconductor integrated circuit can be equipped with many functions. It has the advantage that it can be realized.

The present invention can be used, for example, as a memory address buffer control circuit.

[Brief explanation of the drawing]

Figure 1 is a block diagram showing an example of a conventional semiconductor integrated circuit, and Figure 2 is a block diagram showing an example of a conventional semiconductor integrated circuit.
Fig. 3 is a block diagram showing an example of a conventional semiconductor integrated circuit with two additional functions;
FIG. 4 shows an example of the configuration of a comparison circuit used in the present invention. DESCRIPTION OF SYMBOLS 1...Semiconductor substrate, 2...Buffer circuit that generates an in-phase output signal, 3...Buffer circuit that generates an opposite-phase output signal, 4...Buffer circuit that generates a complementary output signal, 5...Buffer circuit that generates a complementary output signal. Circuit that performs the first function, 6...Circuit that performs the second function, 7...Circuit that performs the third function, 8...Circuit that performs the fourth function (corresponding to additional function (1)), 9 ...Comparison circuit, 10...
Control circuit that performs the fifth function (corresponds to additional function (2)).

Claims (1)

[Claims] 1. In a semiconductor integrated circuit having a plurality of buffer circuits that generate from one input signal an output signal that is in-phase or anti-phase with the input signal, or two complementary output signals that are in-phase and anti-phase, the input signal used in the buffer circuit. a circuit that generates a control signal indicating the result of comparing the voltage of the buffer circuit with a certain reference voltage, and a circuit that uses the control signal to control the output signals of the buffer circuit so that both of the output signals are maintained at a low potential or a high potential. A semiconductor integrated circuit characterized by: