JPS6216586B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a multiplex demodulation circuit for stereo signals of an FM stereo broadcast receiver.

As shown in Fig. 1, the conventional FM multiplex demodulation circuit applies a stereo composite signal to a terminal 23 connected to the base of a common emitter transistor 1, amplifies it, and applies it between terminals 24 and 24'. The signal is time-divided by transistors 3 and 4, and is separated into left and right channels, which are output to a right output 22 and a left output 21, respectively. Transistors 5 and 6 are crosstalk canceling switching transistors for canceling leakage components of both left and right channels, and have reference potential 19 at their bases.
A stereo composite signal attenuated by a constant determined by the emitter resistors 25, 26, and 27 of the common-base transistor 2 is applied, and an inverse signal is applied to the stereo composite signal that is time-shared by the switching transistors 3 and 4. The phase stereo composite signal is time-divided and sent to switching transistor 3,
The signal is added to the time-divided signal in step 4 to perform crosstalk cancellation. The degree of separation between the left and right channels is determined by adjusting the resistance value of the resistor 27 to adjust the amount of attenuation of the stereo composite signal supplied to the switching transistors 5 and 6. Transistors 8 and 10 are the load of transistors 3, 4, 5 and 6, and transistors 7 to 9 and 1
Outputs are obtained at output terminals 21 and 22 by current mirrors each configured with 0 to 12.

As an example of a circuit for further improving the degree of separation of the outputs obtained at the output terminals 21 and 22, the second
As shown in the figure, the right demodulated output R+Δ includes leakage signal components ΔL and ΔR at the bases of transistors 201 and 202 that constitute the differential amplifier circuit, respectively.
L, left side demodulated output L+ΔR is applied, and the emitters of the transistors 201 and 202 are connected to the resistor 20.
3,204, and this emitter resistor 20
3, Adjustment resistor 2 between the connection point of 204 and the ground terminal
It is known to provide 05. Transistors 7 to 12 are a load and a current mirror for taking out the output thereof, as in FIG.

In the circuit of FIG. 2, the right demodulated output R+ΔL applied to the base of the transistor 201 is connected to the resistor 20.
3, 204, and 205 and applied to the emitter of transistor 202.
Leakage component Δ of the left demodulated output applied to 02
Since it is applied between the base and emitter of the transistor 202 in the same phase as R, only the left output L is obtained at the collector of the transistor 202. This also applies to the right output R. In this case, the left
The degree of separation of the right channel is determined by adjusting the resistance value of the resistor 205.

These circuits, whether in the case of a stereo multiplex or in the case of a separation adjustment circuit, adjust the separation of the left and right channels by the same amount at the same time. However, in the case of a normal stereo demodulation circuit, the leakage components ΔR and ΔL included in the left demodulation output and the right demodulation output are not equal in level due to factors such as a shift in the duty cycle of the 38kHz subcarrier switching signal. It's normal. Therefore, in order to maximize the degree of separation between the left and right channels, the values of the left channel component added to the right channel and the right channel component added to the left channel should be different. In other words, when adjusting the resolution of the left and right channels, even if the left channel is adjusted to the maximum resolution point, the right channel will not be at the maximum resolution point, and conversely, even if the right channel is adjusted to the maximum resolution point, the left channel will be adjusted to the maximum resolution point. However, there is a drawback that the point of maximum separation is not reached.

SUMMARY OF THE INVENTION An object of the present invention is to provide a multiplex stereo signal demodulation circuit that can adjust the degree of separation between the left and right channels to an optimum state for both the left and right channels.

According to the present invention, there is provided a stereo signal demodulation circuit that superimposes a stereo composite signal on each output of the left and right channels of a stereo multiplex circuit, and adjusts the amount of the superimposed stereo composite signal independently for the left and right channels. obtain.

Next, the present invention will be explained in more detail with reference to the drawings.

FIG. 3 is a circuit diagram showing one embodiment of the present invention, and the same parts as in FIG. 1 are designated by the same reference numerals. Transistors 3 and 4 and transistors 5 and 6 constitute a double-balanced differential amplifier type differential amplifier, and a common emitter amplifier consisting of transistor 1 and resistor 15 is connected to the common emitter of transistors 3 and 4. A common emitter amplifier composed of a transistor 2 and a resistor 16 is connected to the emitters of the transistors 5 and 6. The base of the emitter-grounded transistor 1 is connected to the demodulator signal input terminal 23, and the stereo composite signal input from the demodulator signal input terminal 23 is connected to the transistor 1.
The signal is amplified by and applied to the emitters of transistors 3 and 4 forming a differential amplifier. A 38 kHz subcarrier is applied to the bases of the transistors 3 and 4 from the 38 kHz subcarrier input terminal 24, and the transistors 3 and 4 perform switching.

The stereo composite signal amplified by transistor 1 and applied to the emitters of transistors 3 and 4 is time-divided by switching transistors 3 and 4 and separated into left and right channels. At this time, both the left and right channels have leakage components Δ
It is output to the collectors of transistors 3 and 4 as a right side demodulated output R+ΔL including L and ΔR, and a left side demodulated output L+ΔR. The right side demodulated output R+ΔL and the left side demodulated output L+ΔR are each transistor 1.
The transistors 0, 11, and 12 are input to the first output circuit that constitutes a load current mirror, and the transistors 7, 8, and 9 are input to the second output circuit that constitutes a load current mirror, and are the output terminal of the first output circuit. The right demodulated output R+ΔL is outputted from the output terminal 22 to the collector of the transistor 11, and the left demodulated output L+ΔR is outputted from the output terminal 21 to the collector of the transistor 7, which is the output terminal of the second output circuit.

Transistors 5 and 6, transistor 2, and resistor 1
6 constant voltage sources 19 constitute an idling circuit for output current.

The bases of transistors 13 and 14 of a crosstalk cancel circuit 28 are connected to the demodulator signal input terminal 23, and the emitter of the transistor 13 is connected to a ground point, which is a reference potential, via a resistor 18. The collector of transistor 13 is connected to the collector of transistor 7, which is the output 21 of the second output circuit. The collector of transistor 14 is connected to the collector of transistor 11, which is the output terminal 22 of the first output circuit. The stereo composite signal applied to the base of the transistor 13 is determined by the resistor 15 and the resistor 17 with respect to the signal level of the left demodulated output L+ΔR, which is output to the collector of the transistor 7, which is the output terminal 21 of the second output circuit. The left crosstalk cancel signal is output to the collector of the transistor 13 as a left crosstalk cancel signal attenuated by a constant. If the constant determined by resistors 15 and 17 is K ₁ , the left crosstalk cancel signal is K ₁ × (L + R)
becomes. Similarly, the stereo composite signal applied to the base of the transistor 14 is connected to the resistor 15 and the resistor 18 with respect to the signal level of the right demodulated output R+ΔL which is output to the collector of the transistor 11 which is the output terminal 22 of the first output circuit. It is output to the collector of the transistor 14 as a right crosstalk cancel signal attenuated by a determined constant. If the constant determined by resistor 15 and resistor 18 is _K2 , the crosstalk cancel signal on the right side is _K2 × (L+
R).

The left side demodulated output L+ΔR outputted to the collector of transistor 7 is the left side crosstalk cancel signal outputted to the collector of transistor 13.
By adjusting the value of K ₁ by subtracting it by K ₁ × (L + R), that is, by adjusting the resistance value of the resistor 17, it is output to the output terminal 21 of the second output circuit as a left output signal without leakage component ΔR. Output. Similarly, the right demodulated output R+ΔL output to the collector of transistor 11 is the right crosstalk cancel signal output to the collector of transistor 14.
By adjusting the value of K ₂ by subtracting by K ₂ × (L + R), that is, by adjusting the resistance value of the resistor 18, the first right output signal without leakage component ΔL is obtained.
The output signal is outputted to the output terminal 22 of the output signal.

Therefore, since the degree of separation of the left and right channels can be adjusted independently, even if the levels of the leakage components ΔL and ΔR of the left and right channels are not equal, the maximum level of each of the left and right channels can be adjusted. The degree of separation can be adjusted.

FIG. 4 shows the free run frequency vs. separation characteristic of a voltage controlled oscillator (VCO), which is an example of the characteristics of left and right channel separation according to this embodiment. The characteristic shown by the solid line in the figure is the characteristic of left and right channel separation when the present invention is used, and the maximum separation points of the left and right channels are the same. The characteristic shown by the dotted line is the characteristic of left and right channel separation when the conventional technique is used, and the maximum separation points of the left and right channels do not match.

Thus, by using the present invention, left
Even if the levels of the leakage components in the right channel are not equal, the left and right channels can each be adjusted to the maximum degree of separation.

Although one embodiment has been shown above, the superimposition ratio of the stereo composite signal may be adjusted by adding base resistances to the bases of the transistors 13 and 14 in addition to adjusting them using the emitter resistors 17 and 18, or by using any other suitable method. You can adjust it with

[Brief explanation of the drawing]

1 and 2 are circuit diagrams for explaining the prior art, FIG. 3 is a circuit diagram showing an embodiment of the present invention, and FIG. 4 is an electrical characteristic of an embodiment of the present invention. 3 is a graph showing an example of electrical characteristics when implementing the example and the prior art. 1 to 14, 201, 202...transistor,
15-18, 25-27, 203-205...resistor, 19...constant voltage source, 20...power supply terminal,
21... Output terminal, 22... Output terminal, 23...
Demodulator signal input terminal, 24...38kHz subcarrier input terminal, 28...crosstalk cancel circuit.

Claims (1)

[Claims] 1. A switching circuit that separates the stereo composite signal into left and right channel signals and outputs the same, and a level conversion circuit that receives the stereo composite signal and converts this signal to a predetermined level and outputs the signal, each of which has a level conversion amount. first and second level conversion circuits configured to be able to set independently of each other; means for adding the converted stereo composite signal; and means for adding the stereo composite signal obtained from the second level conversion circuit and converted to a second predetermined level to the right channel signal output terminal of the switching circuit. Stereo signal demodulation circuit with.