JPS6221208B2 - - Google Patents
Info
- Publication number
- JPS6221208B2 JPS6221208B2 JP54038722A JP3872279A JPS6221208B2 JP S6221208 B2 JPS6221208 B2 JP S6221208B2 JP 54038722 A JP54038722 A JP 54038722A JP 3872279 A JP3872279 A JP 3872279A JP S6221208 B2 JPS6221208 B2 JP S6221208B2
- Authority
- JP
- Japan
- Prior art keywords
- capacitor
- contact
- relay
- output
- latching relay
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Relay Circuits (AREA)
- Logic Circuits (AREA)
Description
本発明は、論理出力を出力するリレー論理回路
に関するものである。
本発明の目的とするところは、操作スイツチの
操作により論理回路が形成でき、消費電力を少な
くして直流電源容量を小さくでき、しかも、回路
素子の発熱を少なくして温度上昇による制御回路
その他への悪影響を防止するとともに使用周囲温
度を高くできるようにすることにある。
従来、リレーを使用したシーケンス論理回路
は、リレーに単安定形のものを使用しており、リ
レーコイルの消費電力による発熱が大きく、制御
盤等に組込むと、この発熱により制御盤内の温度
上昇を高くして種々のトラブルを発生し、しか
も、リレーコイルの消費電力が大きいため、大容
量の電源を必要とするという欠点を有していた。
本発明はかかる点に鑑みてなされたもので、以
下実施例により詳細に説明する。
第1図において、一極側に電源Vが印加される
コンデンサCの他極側にはラツチングリレーRL
を介して操作スイツチS1,S2の共通接続した共通
接点s10,s20が接続してある。操作スイツS1,S2
の第1の接点s11,s21は共に共通接続して接地し
ている。また、操作スイツチS1の第2の接点s12
は抵抗R1を介してコンデンサCの一極側(電源
側)に接続し、他方の操作スイツチS2の第2の接
点s22は抵抗R2を介してコンデンサCの一極側に
接続されている。この操作スイツチS1,S2を切り
換えることにより、抵抗R1,R2を介してコンデ
ンサCの放電電流を流し、ラツチングリレーRL
に逆方向の電流を流すようにしたものである。
rl1,rl2はラツチングリレーRLのリレー接点であ
る。
今、操作スイツチS1,S2を図示の状態に接続す
ると、電源VからのコンデンサCの充電電流によ
りラツチングリレーRLが動作して接点rl1,rl2は
図示の状態になる。ここで、操作スイツチS1を点
線に示すように第2の接点s12側に投入すると、
ラツチングリレーRLとコンデンサCの直列回路
に抵抗R1が並列に接続されるだけであり、ラツ
チングリレーRLは復帰せず、接点rl1,rl2は図示
の状態を維持する。つぎに、操作スイツチS2も点
線に示すように第2の接点s22側に投入すると、
コンデンサCの放電電流が抵抗R1,R2を通して
ラツチングリレーRLに逆方向電流を流し、ラツ
チングリレーRLは復帰する。操作スイツチS1,
S2の実線の状態を0、点線の状態を1とし、接点
rl1,rl2の出力を図示のようにX,とすると、
The present invention relates to a relay logic circuit that outputs a logic output. The purpose of the present invention is to form a logic circuit by operating an operating switch, reduce power consumption and reduce the DC power supply capacity, and furthermore, reduce heat generation of circuit elements to prevent control circuits and other circuits from rising in temperature. The object of the present invention is to prevent the adverse effects of air pollution and to increase the operating ambient temperature. Conventionally, sequence logic circuits using relays use monostable relays, which generate a lot of heat due to the power consumption of the relay coil, and when incorporated into a control panel, etc., this heat generation causes a rise in temperature inside the control panel. This causes various troubles due to the high voltage, and furthermore, the relay coil consumes a large amount of power, so it has the disadvantage of requiring a large-capacity power source. The present invention has been made in view of this point, and will be explained in detail below with reference to Examples. In Fig. 1, the power supply V is applied to one pole of the capacitor C, and the other pole of the capacitor C is connected to a latching relay RL.
Common contacts s 10 and s 20 of the operating switches S 1 and S 2 are connected through the . Operation switch S 1 , S 2
The first contacts s 11 and s 21 are both commonly connected and grounded. In addition, the second contact s 12 of the operation switch S 1
is connected to one pole side (power supply side) of capacitor C via resistor R1 , and the second contact S22 of the other operating switch S2 is connected to one pole side of capacitor C via resistor R2 . ing. By switching the operation switches S 1 and S 2 , the discharge current of the capacitor C flows through the resistors R 1 and R 2 , and the latching relay RL
The current flows in the opposite direction.
rl 1 and rl 2 are relay contacts of latching relay RL. Now, when operating switches S 1 and S 2 are connected to the state shown in the figure, the latching relay RL is operated by the charging current of the capacitor C from the power supply V, and the contacts rl 1 and rl 2 are brought into the state shown. Here, when the operating switch S1 is turned on to the second contact S12 side as shown by the dotted line,
The resistor R1 is simply connected in parallel to the series circuit of the latching relay RL and the capacitor C, the latching relay RL is not reset, and the contacts rl1 and rl2 maintain the states shown. Next, when operating switch S 2 is also placed on the second contact s 22 side as shown by the dotted line,
The discharge current of capacitor C causes a reverse current to flow through resistors R 1 and R 2 to latching relay RL, and latching relay RL returns to its original state. Operation switch S 1 ,
The state of the solid line of S 2 is 0, the state of the dotted line is 1, and the contact point
Let the outputs of rl 1 and rl 2 be X as shown in the figure, then
【表】
となる。いいかえれば、出力Xには操作スイツチ
S1,S2のAND出力が得られ、出力にはNAND
出力が得られる。
つぎに、操作スイツチS1,S2の第2図の実線の
状態を0、点線の状態を1とし、接点rl1,rl2の
出力を第2図のようにX,とし、操作スイツチ
S1を点線の状態の第1の接点s11側に投入すると
電源VからのコンデンサCの充電電流によりラツ
チングリレーRLが動作して接点rl1,rl2は出力X
側に切換わる。操作スイツチS2をS1より先に点線
の状態の第1の接点s21側に倒しても同様にラツ
チングリレーRLは動作する。ラツチングリレー
RLは2安定であるので、コンデンサCの充電電
流によつて動作するが、コンデンサCが充分充電
されると、電流は流れなくなるが、接点rl1,rl2
は復帰しない。つぎに、操作スイツチS1,S2のど
ちらかを実線の状態に倒してもラツチングリレー
RLは復帰せず、両方の操作スイツチS1,S2を実
線の状態に戻すとコンデンサCの放電により抵抗
R1,R2を通してラツチングリレーRLに逆電流が
流れてラツチングリレーRLは復帰する。即ち、
操作スイツチS1,S2と接点rl1,rl2の出力X,
との関係はつぎのようになり、出力XにはOR出
力が得られ、出力からはNOR出力が得られ
る。[Table] becomes. In other words, there is an operation switch for output
AND output of S 1 and S 2 is obtained, and the output is NAND
I get the output. Next, the states of the solid lines in Fig. 2 of the operating switches S 1 and S 2 are set to 0, the states of the dotted lines are set to 1, the outputs of the contacts rl 1 and rl 2 are set to X as shown in Fig. 2, and the operating switches
When S 1 is connected to the first contact s 11 shown by the dotted line, the latching relay RL is operated by the charging current of the capacitor C from the power supply V, and the contacts rl 1 and rl 2 output the output X.
Switch to the side. The latching relay RL operates in the same way even if the operation switch S2 is moved to the first contact point s21 shown by the dotted line before the operation switch S1 is moved. latching relay
Since RL is bistable, it is operated by the charging current of capacitor C, but when capacitor C is sufficiently charged, no current flows, but the contacts rl 1 and rl 2
will not return. Next, even if you turn either operation switch S 1 or S 2 to the solid line state, the latching relay will not work.
RL does not return, and when both operation switches S 1 and S 2 are returned to the solid line state, the resistance is reduced due to the discharge of capacitor C.
A reverse current flows through R 1 and R 2 to latching relay RL, and latching relay RL returns to its original state. That is,
Output X of operation switches S 1 and S 2 and contacts rl 1 and rl 2 ,
The relationship with is as follows, an OR output is obtained from the output X, and a NOR output is obtained from the output.
【表】
又、操作スイツチS1のみを接続するとNOT出
力が得られる。
本発明は上述のように、一極側の端子に電源が
印加されるコンデンサの他極側に、論理出力を出
力するリレー接点を有するラツチングリレーを介
して第1、第2の操作スイツチの共通接続した共
通接点を接続し、該第1、第2の操作スイツチの
第1の接点を共通接続して接地し、第1、第2の
操作スイツチの第2の接点を夫々上記コンデンサ
の一極側の端子に放電用の抵抗を介して接続した
ものであるから、第1、第2の操作スイツチを
夫々第1の接点側に接続して、コンデンサに電源
を印加すると、コンデンサは充電されると共に、
ラツチングリレーが駆動され、リレー接点が反転
し、次にどちらの操作スイツチを第2の接点に接
続しても放電回路が形成されないため、ラツチン
グリレーは駆動されず、操作スイツチを共に第2
の接点側に切り換えると、放電回路が構成され
て、ラツチングリレーが駆動されてリレー接点は
反転するものであり、従つて、操作スイツチを入
力とした場合、リレー接点には出力としてAND
出力やNAND出力が得られるものである。また、
コンデンサに電源を印加していて且つ操作スイツ
チを第2の接点側から第1の接点側に切り換える
と、コンデンサの充電電流によりラツチングリレ
ーは反転し、次にどちらの操作スイツチを第2の
接点側に切り換えても放電回路が形成されないた
め、ラツチングリレーは駆動されず、両方の操作
スイツチを第2の接点に切り換えると、放電回路
が形成されてラツチングリレーが駆動されてリレ
ー接点が反転することで、操作スイツチを入力と
してリレー接点を出力とした場合に該リレー接点
にはOR出力やNOR出力が得られるもであり、従
つて、操作スイツチの操作により論理回路が形成
できる効果を奏し、しかも、消費電力を少なくで
きて直流電源容量を小さくできる上、ラツチング
リレーその他の回路素子の発熱を少なくできて温
度上昇による制御回路その他への悪影響を防止で
きるとともに使用周囲温度を高くできるという効
果を奏するものである。[Table] Also, if only operation switch S1 is connected, NOT output can be obtained. As described above, in the present invention, the first and second operating switches are operated via a latching relay having a relay contact that outputs a logic output on the other terminal of a capacitor to which power is applied to one terminal. The commonly connected common contacts are connected, the first contacts of the first and second operating switches are commonly connected and grounded, and the second contacts of the first and second operating switches are respectively connected to one of the capacitors. Since it is connected to the terminal on the pole side via a discharge resistor, when the first and second operating switches are connected to the first contact side and power is applied to the capacitor, the capacitor will be charged. Along with
The latching relay is activated, the relay contacts are reversed, and then no matter which operating switch is connected to the second contact, a discharge circuit is not formed, so the latching relay is not activated and both operating switches are connected to the second contact.
When the switch is switched to the contact side of
It is possible to obtain output or NAND output. Also,
When power is applied to the capacitor and the operating switch is switched from the second contact side to the first contact side, the latching relay is reversed by the charging current of the capacitor, and then which operating switch is switched to the second contact side. Even when switching to the side, a discharge circuit is not formed, so the latching relay is not activated, and when both operating switches are switched to the second contact, a discharge circuit is formed, the latching relay is activated, and the relay contact is reversed. By doing so, when the operating switch is used as an input and the relay contact is used as an output, an OR output or a NOR output can be obtained from the relay contact, and therefore, a logic circuit can be formed by operating the operating switch. In addition, it is possible to reduce power consumption, reduce DC power supply capacity, reduce heat generation in latching relays and other circuit elements, prevent adverse effects on control circuits and other parts due to temperature rise, and increase the operating ambient temperature. It is effective.
第1図は本発明リレー論理回路の一実施例の回
路図、第2図は同上の他の実施例の回路図であ
る。
RL……ラツチングリレー、C……コンデン
サ、S1……操作スイツチ、S2……操作スイツチ、
R1……抵抗、R2……抵抗、s10,s20……共通接
点、s11,s21……第1の接点、s12,s22……第2の
接点。
FIG. 1 is a circuit diagram of one embodiment of the relay logic circuit of the present invention, and FIG. 2 is a circuit diagram of another embodiment of the same. RL...Latching relay, C...Capacitor, S1 ...Operation switch, S2 ...Operation switch,
R1 ...resistance, R2 ...resistance, s10 , s20 ...common contact, s11 , s21 ...first contact, s12 , s22 ...second contact.
Claims (1)
の他極側に、論理出力を出力するリレー接点を有
するラツチングリレーを介して第1、第2の操作
スイツチの共通接続した共通接点を接続し、該第
1、第2の操作スイツチの第1の接点を共通接続
して接地し、第1、第2の操作スイツチの第2の
接点を夫々上記コンデンサの一極側の端子に放電
用の抵抗を介して接続して成るリレー論理回路。1. Connect the commonly connected common contact of the first and second operating switches to the other pole of the capacitor to which power is applied to the terminal on one pole via a latching relay that has a relay contact that outputs a logic output. The first contacts of the first and second operation switches are commonly connected and grounded, and the second contacts of the first and second operation switches are respectively connected to the terminal on one pole side of the capacitor for discharging. A relay logic circuit consisting of a resistor connected through a resistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3872279A JPS55131926A (en) | 1979-03-31 | 1979-03-31 | Relay logic circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3872279A JPS55131926A (en) | 1979-03-31 | 1979-03-31 | Relay logic circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS55131926A JPS55131926A (en) | 1980-10-14 |
| JPS6221208B2 true JPS6221208B2 (en) | 1987-05-12 |
Family
ID=12533207
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3872279A Granted JPS55131926A (en) | 1979-03-31 | 1979-03-31 | Relay logic circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS55131926A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63280134A (en) * | 1987-05-09 | 1988-11-17 | 大和ハウス工業株式会社 | Member connection body of three-dimensional structure |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4876849U (en) * | 1971-12-23 | 1973-09-22 |
-
1979
- 1979-03-31 JP JP3872279A patent/JPS55131926A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63280134A (en) * | 1987-05-09 | 1988-11-17 | 大和ハウス工業株式会社 | Member connection body of three-dimensional structure |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS55131926A (en) | 1980-10-14 |
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