JPS6221282B2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a rectifier circuit used in an AGC (automatic gain control) circuit, etc., and an object of the present invention is to provide a circuit that is stable against temperature fluctuations and can easily obtain high rectification efficiency. do.

FIG. 1 shows an embodiment of the present invention.
A constant DC bias voltage is applied to the bases of the transistors 7 and 8 by DC bias resistors 3 and 4. NPN transistor 9 is diode-connected, with its collector and base connected to the collector of transistor 7. Transistor 10 is supplied with a base bias current from transistor 9 via resistor 11, and its collector is connected to the collector of transistor 8. The emitters of transistors 9 and 10 are grounded. The emitters of transistors 7 and 8 are connected to a power supply via resistors 5 and 6, respectively.

Terminal 1 is an input terminal for an AC signal, and the input AC signal is applied to the base of transistor 10 via DC blocking capacitor 12. The base current of the transistor 10 generated by the input AC signal is:
Due to the nonlinearity between the base and emitter, a DC component is generated, ie, rectified. transistor 10
A collector current that is twice the current amplification factor of the DC component of this base current is generated in the collector of the base current. 13 is a capacitor connected between the output terminal 2 and ground, and the alternating current component of the collector current generated at the same time is bypassed. Transistor 8 is transistor 1
Since it is a zero load and has a very high DC impedance, a large voltage change can be obtained even with a small change in the collector current of the transistor 10. Therefore, the ratio of the collector output DC voltage of the transistor 10 to the input AC signal voltage, that is, the rectification voltage gain, in other words, the rectification efficiency can be made extremely high.

By the way, the transistors 7 and 8 have the same characteristics, and the transistors 9 and 10 also have the same characteristics.If the resistance values of the resistors 5 and 6 are equal, the transistors 7, 8, 9, 10
The collector currents of are almost equal. Note that the resistor 11 is a buffer resistor to prevent the transistor 9, which is essentially a diode, from becoming a low impedance load with respect to the input AC signal, and is a buffer resistor for the bias current of the transistors 9 and 10. The resistance value can be set within a range that does not upset the balance. If the source of the input AC signal can be supplied with a low internal impedance, the resistor 11 is not necessarily necessary. In the embodiment shown in FIG. 1, the resistance value R ₅ of the resistor 5
The relationship between the resistance value R 6 of the resistor 6 and the resistance value R ₆ of the resistor 6 is set to R ₅ >R ₆ , and in a state where there is no input AC signal, only the collector current of the transistor 8 is larger than the others. If the difference current between the collector currents of transistor 8 and transistor 10 flows out from output terminal 2 as it is, each current becomes balanced. However, since the DC resistance at terminal 2 is extremely large, even if the above difference current is small, the potential at output terminal 2 rises to the + side to the emitter potential of transistor 8, pushing transistor 8 into the saturation region. It becomes an equilibrium state. At this time, the current amplification factor of transistor 8 decreases, and the collector current of transistor 8 becomes equal to the collector current of transistor 10. This circuit state can be achieved by setting R ₅ = R ₆ and making the emitter area of transistor 10 smaller than the emitter area of transistor 9, or by making the emitter area of transistor 8 larger than the emitter area of transistor 7. can also be achieved. Now, when the input AC signal increases, the collector current of the transistor 10 increases, and the output terminal 2
For a sufficiently large input AC signal, the collector current of transistor 10 becomes sufficiently larger than the collector current of transistor 8, and transistor 10 is driven into the saturation region. Since the collector-emitter saturation voltage of the transistor is very small, for example, about 0.01 V, the collector potential can reach almost the ground potential. For sufficiently large input AC signals, the output terminal 2 reaches approximately ground potential. Figure 4 shows transistor 1
This is an explanatory diagram of the rectification operation of 0, and shows the collector current waveform of the transistor 10 when the capacitor 13 in FIG. 1 is removed.

FIG. 4a shows a case where the input AC signal to FIG. 1 is small, and FIG. 4b shows a case where it is large. When the input AC signal is small, the influence of nonlinearity between the base and emitter of the transistor 10 is small, so the average DC current is approximately equal to that in the no-input state. However, when the input AC signal is large, the current increment during the positive half wave of the input signal becomes large as shown in FIG. 4b, and the average DC current increases compared to the state with no input. If this increase exceeds the difference current between the collector currents of transistor 8 and transistor 10 mentioned above, and the collector current of transistor 10 becomes sufficiently larger than that of transistor 8, then the output terminal 2
reaches almost the emitter potential of transistor 10.

FIG. 3a is a diagram showing the relationship between the input AC signal and the output potential.

According to FIG. 1, as described above, a high rectified voltage gain is possible, and transistors 7 and 8 and transistors 9 and 10 have a complementary relationship with respect to temperature, so that the collector of each transistor with respect to temperature Since the balance between the currents is kept almost constant, temperature fluctuations, such as in the rectification start input voltage, indicated by Vk in FIG. 3a, can be minimized to a minimum.

FIG. 2 is a circuit diagram when the present invention is applied. In the embodiment shown in Fig. 1, the DC voltage at the output terminal 2 drops as the input AC signal increases, but when applied to AGC, the polarity is reversed, that is, the DC voltage at the output terminal 2 increases as the input AC signal increases. characteristics may be required. This is output terminal 2
It depends on which polarity the variable gain element connected to changes the normal gain. In consideration of this point, Figure 2 is designed to easily obtain the above-mentioned bipolarity using just one simple switch.

In FIG. 2, transistors 18, 19, 2
A circuit consisting of 0.0, 21 resistors 30, 32, and 33 has a resistor 31 between the bases of transistors 20 and 21.
A resistor 34 is connected between the emitter of the transistor 18 and ground.
However, the circuit configuration is the same as that in FIG. 1 except that a resistor 35 is connected between the emitter of the transistor 19 and the ground. Resistor 29, diode connected
pnp transistor 27 is transistor 20, 21
In the base bias circuit, the collector of the PNP transistor 24 is connected to the connection point between the resistor 28 and the transistor 27. The emitters of transistors 20 and 21 are connected to the collectors of a pnp transistor 25 and a transistor 26, respectively.
The emitters of the pnp transistors 24, 25, and 26 are all connected to the power source, and the bases are connected to the movable contact a of the switch 17 via a resistor 38.

On the other hand, the emitters of transistors 18 and 19 are connected to the collectors of transistor 22 and transistor 23, respectively.
The emitters 2 and 23 are grounded, and the base is connected to the movable contact a of the switch 17 via a resistor 39. The AC input signal is applied from the terminal 15 via the capacitor 36 to the base of the transistor 21 and the base of the transistor 19 via the capacitor 37, and a DC voltage is taken out from the output terminal 16.

Now, when the switch 17 is in the connected state shown in FIG.
Assuming that is connected to fixed contact b and the connection point of resistors 38 and 39 is connected to +B power supply, transistors 24, 25, and 26 are all turned off, and none of these transistors are on the circuit. is equal to On the other hand, transistors 22 and 23 become conductive and short-circuit resistors 34 and 35, respectively. When an AC input signal is applied in such a state, a rectified output is obtained at the output terminal 16 by the rectifying action between the base and emitter of the transistor 19 in the same manner as in FIG.

By the way, the input signal is also applied to the base of the transistor 21, but since the resistor 32 is inserted into the emitter of the transistor 21, the transistor 21 operates as a linear amplifier, and no rectification occurs and the signal is amplified. The bypass capacitor 40 completely drops the signal to ground. Therefore, the current output by the transistor 21 is not affected. Of course, the resistance value of resistor 32 is determined so that transistor 21 functions as a linear amplifier for the required magnitude of AC input signal. The above operation mode has the characteristics shown in FIG. 3a, similar to FIG. 1.

Next, the movable contact a of the switch 17 is connected to the fixed contact c.
When the connection point between the resistors 38 and 39 is grounded, the transistors 24, 25, and 26 are all conductive, shorting the resistors 29, 30, and 32, respectively, and changing the base bias of the transistors 20 and 21 to the above-mentioned value. The emitters of transistors 20 and 21 are directly connected to the +B power supply while maintaining the same mode.

On the other hand, the transistors 22 and 23 are turned off, and it becomes equivalent to inserting resistors 34 and 35 between the emitters of the transistors 18 and 19 and the ground, respectively. Therefore, in this case, rectification is performed by transistor 21, contrary to the above-mentioned mode, and transistor 19 becomes a linear amplifier. Of course, since R ₃₀ > R ₃₂ R ₃₄ > R ₃₅ is set, in this mode, the third
The desired characteristics as shown in Figure b are obtained.

As explained above with reference to the embodiments, according to the present invention, the rectifying transistor and the biasing transistor that flows the DC bias current therein and that defines the rectification starting voltage are in a temperature-compensated relationship, so that the bias current, Since the rectification starting voltage is held stably and one of the bias transistors also serves as a high impedance load for the rectification transistor, a high rectification efficiency can be obtained. Moreover, two types of rectification modes can be easily obtained by a simple switch operation, which is very effective.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram showing one embodiment of the present invention, Figure 2 is a circuit diagram showing an embodiment of the present invention.
The figure is a circuit diagram when the present invention is applied, Figure 3a,
4b is a relationship diagram of output potential, and FIGS. 4a and 4b are explanatory diagrams of rectification operation. 1, 15...input terminal, 2,16...output terminal,
7, 8, 18, 19, 20, 21, 22, 23,
24, 25, 26, 27...transistor.

Claims (1)

[Claims] 1 first and second transistors whose bases are connected to each other; third and fourth transistors whose polarities are opposite to the first and second transistors whose bases are connected to each other via a resistor; and a bias circuit that applies a DC bias voltage to the base of the second transistor, the collector of the second transistor is connected to the collector and base of the third transistor, and the collector of the second transistor is connected to the collector and base of the third transistor.
A rectifier circuit, characterized in that a collector of the transistor is connected to a collector of a fourth transistor, an alternating current signal is applied to the base of the fourth transistor, and a rectified output is taken out from the collector.