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JPS6222306B2 - - Google Patents
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JPS6222306B2 - - Google Patents

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Publication number
JPS6222306B2
JPS6222306B2 JP53076866A JP7686678A JPS6222306B2 JP S6222306 B2 JPS6222306 B2 JP S6222306B2 JP 53076866 A JP53076866 A JP 53076866A JP 7686678 A JP7686678 A JP 7686678A JP S6222306 B2 JPS6222306 B2 JP S6222306B2
Authority
JP
Japan
Prior art keywords
transistor
potential
integrated circuit
resistor
collector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP53076866A
Other languages
Japanese (ja)
Other versions
JPS554128A (en
Inventor
Tsutomu Kitamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP7686678A priority Critical patent/JPS554128A/en
Publication of JPS554128A publication Critical patent/JPS554128A/en
Publication of JPS6222306B2 publication Critical patent/JPS6222306B2/ja
Granted legal-status Critical Current

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  • Amplifiers (AREA)
  • Picture Signal Circuits (AREA)
  • Television Receiver Circuits (AREA)

Description

【発明の詳細な説明】 本発明は集積回路を用いたテレビジヨン受像機
に関するもので、前記集積回路の直流電位のばら
つきの影響を受けずに、安定で忠実な画面を再生
することを目的とする。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a television receiver using an integrated circuit, and its purpose is to reproduce a stable and faithful screen without being affected by variations in the DC potential of the integrated circuit. do.

従来より忠実な画面の再生をはかるために第1
図に示すように、復調器1、映像増幅回路2、ブ
ラウン管3のカソードまでを直流的に結合して画
面の平均輝度も忠実に再生するようにした、いわ
ゆる直流再生方式のテレビジヨン受像機がある。
また、これらの回路を集積回路化することにより
使用部品点数の削減、小型化、高性能化をはかつ
てきている。
The first step was to achieve more faithful screen reproduction than before.
As shown in the figure, there is a so-called DC reproduction type television receiver in which the demodulator 1, video amplification circuit 2, and cathode of the cathode ray tube 3 are coupled in a DC manner to faithfully reproduce the average brightness of the screen. be.
In addition, by integrating these circuits, the number of parts used has been reduced, the size has been reduced, and the performance has been improved.

このようなテレビジヨン受像機の従来例を第2
図に示す。図において、7が集積回路で、内部に
は映像中間周波増幅回路14、この回路14で増
幅された映像中間周波信号15を復調する復調器
1、映像信号を増幅する前置増幅回路5およびエ
ミツタフオロア構成のトランジスタ6が集積化さ
れている。11は前記集積回路7の出力信号を増
巾してブラウン管3のカソード4を駆動するため
のトランジスタであり、これらは前述したように
直流再生するために直流的に結合されている。
A conventional example of such a television receiver is shown in the second example.
As shown in the figure. In the figure, 7 is an integrated circuit, which includes a video intermediate frequency amplification circuit 14, a demodulator 1 that demodulates the video intermediate frequency signal 15 amplified by this circuit 14, a preamplifier circuit 5 that amplifies the video signal, and an emitter follower. The transistor 6 of the configuration is integrated. Reference numeral 11 denotes a transistor for amplifying the output signal of the integrated circuit 7 to drive the cathode 4 of the cathode ray tube 3, and these transistors are coupled in a DC manner for DC reproduction as described above.

また、周知のように集積回路においては、内部
にコンデンサを集積するのは集積回路のチツプ面
積を増大させ、価格的にも不利である。そのため
集積回路7の内部の各増幅回路14,5、トラン
ジスタ6および復調器1は直流的に結合されてい
る。
Furthermore, as is well known, in an integrated circuit, integrating a capacitor inside increases the chip area of the integrated circuit, which is also disadvantageous in terms of cost. Therefore, each amplifier circuit 14, 5, transistor 6, and demodulator 1 inside the integrated circuit 7 are coupled in a direct current manner.

したがつて、このようにしてなる集積回路7は
一種の直流増巾器としても動作し、入力端Pから
出力端Qまででは非常に大きな直流増巾度をもつ
ことになり、各増幅回路14,5等のバイアスの
わずかのばらつきが各部で増巾され、出力端Qで
は、大きな直流電位のばらつきとなつて現われて
くる。この直流電位のばらつきは、そのままトラ
ンジスタ11で増巾され、ブラウン管3のカソー
ド4に現われるため、ブラウン管3に再生された
画面では平均輝度がばらつき、テレビジヨン受像
機によつて、明るいものや、暗いものが生じてし
まうという欠点があつた。
Therefore, the integrated circuit 7 constructed in this manner also operates as a kind of DC amplifier, and has a very large degree of DC amplification from the input terminal P to the output terminal Q, and each amplifier circuit 14 , 5, etc. are amplified in each part, and appear as large variations in DC potential at the output terminal Q. This variation in DC potential is directly amplified by the transistor 11 and appears on the cathode 4 of the cathode ray tube 3. Therefore, the average brightness of the screen reproduced on the cathode ray tube 3 varies, and depending on the television receiver, some images are bright and others are dark. It had the disadvantage that things could occur.

例えば、集積回路7の出力端Qの電位が高くば
らついた時を考えると、トランジスタ11の電流
増幅率hFEを充分大きいとすると、トランジスタ
11のコレクタ電流IC11は、 IC11≒(VQ−VBE11)/R12 ここに、VQ:出力端Qの電位、 VBE11:トランジスタ11のベース・
エミツタ間順方向電圧降下、 R12:抵抗12の抵抗値、 となり、IC11は出力端Qの電位に比例して増加
する。
For example, if we consider a case where the potential at the output terminal Q of the integrated circuit 7 varies widely, and if the current amplification factor h FE of the transistor 11 is sufficiently large, the collector current I C11 of the transistor 11 will be I C11 ≒ (V Q - V BE11 )/R 12 where, V Q : Potential of output terminal Q, V BE11 : Base of transistor 11.
The forward voltage drop between the emitters is R12 : the resistance value of the resistor 12, and IC11 increases in proportion to the potential of the output terminal Q.

この結果、抵抗13での電圧降下も増大し、ト
ランジスタ11のコレクタ電位、すなわちブラウ
ン管3のカソード4の電位を下げ、その結果、ブ
ラウン管3のカソードバイアスが浅くなり輝度が
上つてしまう。逆に集積回路7の出力端Qの電位
が低くばらついた時には、輝度が下つてしまう。
As a result, the voltage drop across the resistor 13 also increases, lowering the collector potential of the transistor 11, that is, the potential of the cathode 4 of the cathode ray tube 3, and as a result, the cathode bias of the cathode ray tube 3 becomes shallower and the brightness increases. On the other hand, when the potential at the output terminal Q of the integrated circuit 7 is low and fluctuates, the brightness decreases.

このように、集積回路7のばらつきにより平均
輝度が変つてしまうことになる。
In this way, the average luminance changes due to variations in the integrated circuit 7.

このような欠点を取り除くため第2図に示すよ
うに従来は、可変抵抗器9を用いて集積回路7へ
の供給電圧VCCを変化させ、出力端Qの直流電位
のばらつきを吸収してカソード4に一定の直流電
位を与えるようにしてきた。
In order to eliminate such drawbacks, conventionally, as shown in FIG. 2, a variable resistor 9 is used to vary the voltage V CC supplied to the integrated circuit 7, absorbing variations in the DC potential at the output terminal Q, and increasing the voltage at the cathode. I have tried to apply a constant DC potential to 4.

ここに、コンデンサ10は映像信号成分のバイ
パスコンデンサであり、可変抵抗器9に映像信号
成分が流れることにより可変抵抗器9が集積回路
7の負荷抵抗となるのを防止するために挿入して
いる。
Here, the capacitor 10 is a bypass capacitor for the video signal component, and is inserted to prevent the variable resistor 9 from becoming a load resistance of the integrated circuit 7 due to the video signal component flowing through the variable resistor 9. .

しかしながら、このような従来の方法では、集
積回路7の出力のばらつきや集積回路7への供給
電源VCCのばらつきに応じ可変抵抗器9を調整す
る必要が生じる欠点がある。
However, such a conventional method has the drawback that it is necessary to adjust the variable resistor 9 according to variations in the output of the integrated circuit 7 and variations in the power supply V CC supplied to the integrated circuit 7 .

また、周囲温度が変化した時、トランジスタ1
1のベース・エミツタ間の順方向電圧が変化し、
そのためトランジスタ11のコレクタ電位、すな
わちブラウン管3のカソード4の直流電位が変化
し、周囲温度が変化した場合も画面の平均輝度が
変わると言う欠点があつた。
Also, when the ambient temperature changes, transistor 1
The forward voltage between the base and emitter of 1 changes,
Therefore, the collector potential of the transistor 11, that is, the DC potential of the cathode 4 of the cathode ray tube 3 changes, and even if the ambient temperature changes, the average brightness of the screen also changes.

これに対し本発明は上記従来の欠点を除き、部
品ばらつきや周囲温度の変化に対して安定した映
像増巾回路をもつテレビジヨン受像機を提供する
ことが出来る。
In contrast, the present invention can eliminate the above-mentioned conventional drawbacks and provide a television receiver having an image amplification circuit that is stable against component variations and changes in ambient temperature.

第3図に本発明の一実施例を示す。図中第2図
の素子と同一機能を有する素子には同一番号を付
して説明する。
FIG. 3 shows an embodiment of the present invention. In the figure, elements having the same functions as the elements in FIG. 2 will be described with the same reference numerals.

第3図において、第2図と異なる点は可変抵抗
器9およびバイパスコンデンサ10を除き、トラ
ンジスタ100、抵抗101,103,104、
コンデンサ102を用いて前記トランジスタ10
0のエミツタを抵抗103を介して電源VCCに接
続し、そのベースはトランジスタ6のコレクタに
直接接続するとともに、コレクタを抵抗104を
介してトランジスタ11のエミツタに接続してい
る。また抵抗101とコンデンサ102はおのお
のトランジスタ100のベースと電源VCCとの間
に挿入している。
3 differs from FIG. 2 in that except for the variable resistor 9 and the bypass capacitor 10, the transistor 100, resistors 101, 103, 104,
The transistor 10 using a capacitor 102
The emitter of the transistor 0 is connected to the power supply V CC through a resistor 103, its base is directly connected to the collector of the transistor 6, and the collector is connected to the emitter of the transistor 11 through a resistor 104. Further, a resistor 101 and a capacitor 102 are each inserted between the base of the transistor 100 and the power supply V CC .

上記構成において、トランジスタ6のエミツタ
電位、すなわち出力端Qの電位は前述したように
集積回路7の内部回路および供給電源VCCにより
決定される。ここで、トランジスタ6および11
の電流増幅率hFEが充分高いとすると、トランジ
スタ6のエミツタ電流IEおよびコレクタ電流IC
は IE≒IC≒VQ/R8 ここに、VQ:出力端Qの電位、 R8:エミツタ抵抗8の抵抗値、 となり、エミツタおよびコレクタ電流は出力端Q
の電位に比例する。
In the above configuration, the emitter potential of the transistor 6, that is, the potential of the output terminal Q, is determined by the internal circuit of the integrated circuit 7 and the power supply V CC as described above. Here, transistors 6 and 11
Assuming that the current amplification factor h FE is sufficiently high, the emitter current I E and collector current I C of transistor 6 are
is I E ≒ I C ≒ V Q /R 8where , V Q : potential of output terminal Q, R 8 : resistance value of emitter resistor 8, and the emitter and collector currents are
is proportional to the potential of

そこで、集積回路7のばらつきにより出力端Q
の電位が上昇すると、IE≒ICは比例して増加し
抵抗101での電圧降下が増加する。すると、ト
ランジスタ100のベース・バイアスが深くな
り、トランジスタ100のコレクタ電流IC′が増
加する。このコレクタ電流IC′は抵抗104を通
つて抵抗12に流入し、抵抗12での電圧降下を
増加、すなわち、トランジスタ11のエミツタ電
位、第3図のR点の電位を引き上げ、ベース・エ
ミツタ間電圧が減少する。一方、トランジスタ1
1のベース電位は集積回路7の出力端Qの電位と
同一の電位であるため、出力端Qの電位の上昇に
伴ない上昇しているので、トランジスタ11のバ
イアスは出力端Qの電位が上昇しない前の状態の
バイアス状態を維持し、トランジスタ11のコレ
クタ電流を一定に補償する方向に働く。この結
果、抵抗13の電圧降下の増加分をおさえ、コレ
クタ電位、すなわち、ブラウン管3のカソード4
の電位が一定に保たれ、カソードバイアスを一定
に保ち、輝度が一定になるように働く。
Therefore, due to variations in the integrated circuit 7, the output terminal Q
As the potential increases, I E ≈I C increases proportionally, and the voltage drop across resistor 101 increases. Then, the base bias of transistor 100 becomes deeper, and the collector current I C ' of transistor 100 increases. This collector current I C ' flows into the resistor 12 through the resistor 104, increasing the voltage drop across the resistor 12, that is, raising the emitter potential of the transistor 11, the potential at point R in FIG. Voltage decreases. On the other hand, transistor 1
Since the base potential of transistor 1 is the same potential as the potential of the output terminal Q of the integrated circuit 7, it increases as the potential of the output terminal Q increases, so the bias of the transistor 11 is caused by the increase in the potential of the output terminal Q. It maintains the bias state as before, and works to compensate the collector current of the transistor 11 at a constant level. As a result, the increase in voltage drop across the resistor 13 is suppressed, and the collector potential, that is, the cathode 4 of the cathode ray tube 3 is reduced.
The potential of the cathode is kept constant, the cathode bias is kept constant, and the brightness is kept constant.

このように第3図の構成によれば、トランジス
タ100の働きにより集積回路7の出力端Qの電
位ばらつきを補正し、常に最適な輝度を保つよう
になる。
As described above, according to the configuration shown in FIG. 3, the transistor 100 functions to correct the potential variations at the output terminal Q of the integrated circuit 7, thereby always maintaining optimum brightness.

さらに、周囲温度が変化した場合、例えば高く
なつた場合を考えると、トランジスタ11および
100のベース・エミツタ間の順方向電圧降下は
低下する。
Furthermore, if the ambient temperature changes, for example increases, the forward voltage drop between the bases and emitters of transistors 11 and 100 decreases.

また、集積回路7の出力端Qの電位は一般に汎
用性を持たせるため、周囲温度の変化にかかわら
ず、一定になるように設計されている。従つてト
ランジスタ11のコレクタ電流IC11は増加する
ように働くが、一方トランジスタ100のコレク
タ電流IC′も増加し、前述の理由によりトランジ
スタ11のエミツタ電位を引き上げ、トランジス
タ11のコレクタ電流を減少させるため、この場
合もまた輝度は一定となる。
Further, the potential at the output terminal Q of the integrated circuit 7 is generally designed to be constant regardless of changes in ambient temperature in order to provide versatility. Therefore, the collector current I C11 of the transistor 11 works to increase, but on the other hand, the collector current I C ' of the transistor 100 also increases, which raises the emitter potential of the transistor 11 and decreases the collector current of the transistor 11 for the above-mentioned reason. Therefore, the brightness remains constant in this case as well.

このように第3図の構成によれば、トランジス
タ100の働きにより、周囲温度の変化による輝
度の変化を抑える効果も有する。
As described above, the configuration shown in FIG. 3 also has the effect of suppressing changes in brightness due to changes in ambient temperature due to the function of the transistor 100.

ここで、コンデンサ102は抵抗101に対す
る映像信号成分電流のバイパス用であり、抵抗1
01が集積回路7の出力端Qの電位ばらつきにの
み働くよう動作させるためのものである。
Here, the capacitor 102 is for bypassing the video signal component current to the resistor 101, and
This is to operate so that 01 acts only on potential variations at the output terminal Q of the integrated circuit 7.

また、抵抗103はトランジスタ100のコレ
クタ電流IC′の設定用である。
Further, the resistor 103 is used to set the collector current I C ' of the transistor 100.

以上説明したように本発明によれば、集積回路
の出力端Qの電位のばらつきを無調整で、すなわ
ち、調整工数を増加させることなく補正できるば
かりでなく、周囲温度の変化に対しても極めて安
定に動作させることが出来、その効果は実用上大
なるものがある。
As explained above, according to the present invention, not only can variations in the potential at the output terminal Q of an integrated circuit be corrected without adjustment, that is, without increasing the number of adjustment steps, but also it is possible to compensate for variations in the potential at the output terminal Q of an integrated circuit. It can be operated stably, and its effects are great in practical terms.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は直流再生方式のテレビジヨン受像機の
構成例を示す図、第2図は集積回路を用いた従来
のテレビジヨン受像機の回路図、第3図は本発明
の一実施例におけるテレビジヨン受像機の回路図
である。 1……復調器、3……ブラウン管、4……カソ
ード、5……前置増幅回路、6,11……増巾用
トランジスタ、7……集積回路、100……トラ
ンジスタ、101……抵抗。
FIG. 1 is a diagram showing an example of the configuration of a television receiver using a DC reproduction method, FIG. 2 is a circuit diagram of a conventional television receiver using an integrated circuit, and FIG. 3 is a diagram of a television receiver according to an embodiment of the present invention. FIG. 2 is a circuit diagram of a digital receiver. DESCRIPTION OF SYMBOLS 1... Demodulator, 3... Braun tube, 4... Cathode, 5... Preamplifier circuit, 6, 11... Amplifying transistor, 7... Integrated circuit, 100... Transistor, 101... Resistor.

Claims (1)

【特許請求の範囲】[Claims] 1 集積回路化されたエミツタフオロア構成の第
1の映像増幅トランジスタと、ベースを前記第1
の映像増幅トランジスタのエミツタに直結し、コ
レクタをブラウン管のカソードに直結した第2の
映像増幅トランジスタと、前記第1の映像増幅ト
ランジスタのコレクタと供給電源との間に並列に
挿入された抵抗とコンデンサと、エミツタを抵抗
を介して前記供給電源に接続し、ベースを前記第
1の映像増幅トランジスタのコレクタに直結する
とともに、コレクタを前記第2の映像増幅トラン
ジスタのエミツタに接続したトランジスタとを有
するテレビジヨン受像機。
1 a first video amplification transistor with an emitter follower configuration integrated circuit;
a second video amplification transistor whose collector is directly connected to the emitter of the video amplification transistor and whose collector is directly connected to the cathode of the cathode ray tube; a resistor and a capacitor inserted in parallel between the collector of the first video amplification transistor and the power supply; and a transistor whose emitter is connected to the power supply via a resistor, whose base is directly connected to the collector of the first video amplification transistor, and whose collector is connected to the emitter of the second video amplification transistor. Jiyoung receiver.
JP7686678A 1978-06-23 1978-06-23 Television receiver Granted JPS554128A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7686678A JPS554128A (en) 1978-06-23 1978-06-23 Television receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7686678A JPS554128A (en) 1978-06-23 1978-06-23 Television receiver

Publications (2)

Publication Number Publication Date
JPS554128A JPS554128A (en) 1980-01-12
JPS6222306B2 true JPS6222306B2 (en) 1987-05-18

Family

ID=13617562

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7686678A Granted JPS554128A (en) 1978-06-23 1978-06-23 Television receiver

Country Status (1)

Country Link
JP (1) JPS554128A (en)

Also Published As

Publication number Publication date
JPS554128A (en) 1980-01-12

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