JPS6222505B2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention provides a television receiver (Picture in
Picture: abbreviated as PinP).

In recent years, in order to make effective use of cathode ray tubes in television receivers, so-called child-screen insertion (PinP) television has been announced, in which other television programs are displayed in a reduced size on a portion of the original television screen. Nikkei Electronics 1977
(December 26th issue, pp. 127-134, etc.) The concept of this PinP will be briefly explained below with reference to FIGS. 1 to 3.

Figure 1 is a conceptual diagram of PinP, where 1 is the television receiver, 2 is the cathode ray tube, 3 is the main screen section, and 4 is the television receiver.
is a sub-screen section that is inserted by reducing the size of another TV screen, and the main screen and sub-screen can each be tuned independently.

FIG. 2 shows an example of a method for inserting a sub-screen. is the child screen before reduction, and is the parent screen with the child screen inserted. If the screen reduction rate is (scanning cycle after reduction)/(scanning cycle of original signal), then if the screen reduction rate of the sub-screen is set to 1/3 vertically and horizontally, one out of every three scanning lines from the sub-screen will be Extract by percentage and horizontal period by 1/
3. After compressing the time axis and synchronizing with the main screen, insert it into the main screen. Scanning lines ~ show part of the scanning lines before and after reduction.

FIG. 3 is a configuration diagram of a conventional example of a portion related to the present invention. 11 is an antenna, 12 is a small screen insertion circuit, 13 is a video processing circuit, 14 is a cathode ray tube, 2
Reference numerals 1 and 31 are tuners for the main screen and sub-screen, respectively, and 22 and 32 are IF/video detection circuits for the main screen and sub-screen, respectively.

The child screen signal is stored in the memory 41 using a synchronization signal obtained from the synchronization separation circuit 33 and a clock obtained from the write clock generation circuit 42. Using the clock obtained by the synchronization separation circuit 23, the child screen signal is read line by line from the memory 41, inserted into the main screen signal, and output. 43 is a read clock generation circuit.

In such a receiver, when reading the sub-screen signal from memory and combining it with the main screen signal, the DC level of the sub-screen signal fluctuates due to temperature drift of the circuit elements and changes over time, and the main screen signal and sub-screen signal are mixed. There is a problem in that the brightness levels of the signals no longer match.

As a countermeasure against this problem, a method is conventionally known in which a small screen signal including a synchronization signal is stored in a memory, and the small screen signal is reproduced with direct current using the synchronization signal of the small screen signal read from the memory as a reference level.

However, in this method, the synchronization signal that is not displayed on the screen is stored in the memory, which increases the capacity and poses a problem in terms of economic efficiency.

Furthermore, when the child screen is colored, the boundary between the parent screen and the child screen is unclear and difficult to see.

An object of the present invention is to reduce the memory capacity by storing only the small screen signal excluding the synchronization signal in the memory, and to solve the performance problem by performing DC reproduction of the small screen signal in the above-mentioned PinP television. The objective is to provide a television receiver that solves the problem.

In PinP television, when reading out the small screen signal once stored in the memory and inserting it into the main screen signal, a constant DC level signal is synthesized at the boundary between the main screen signal and the small screen signal to remove the border. Furthermore, the DC reproduction of the small screen signal is performed using the DC level of this bordering signal.

An embodiment of the present invention will be described below with reference to the drawings.
In this embodiment, a case will be described in which the edge of the child screen is white, but it goes without saying that the present invention is not limited to this.

FIG. 4 shows a conventional example in FIG. 3 in which a edging signal synthesis section is added, and FIG. 5 is a waveform diagram of each part thereof. In the figure, blocks with the same numbers as in FIG. 3 indicate the same functions.

One line of the child screen signal is read from the memory 41 and inserted into the middle of one line of the main screen by the child screen insertion circuit 12. Edge removal signal generation circuit 51
generates a bordering signal as shown in FIG. 5B at timings corresponding to the insertion start and end points of the child screen based on the synchronization signal for the parent screen on which the child screen is to be displayed. Said edge signal b
is applied to the border signal combining circuit 52 together with the child screen signal a, where both signals a and b are combined to obtain signal c. In the DC regeneration circuit 55,
According to the output signal b from the edging signal generation circuit 51, the pulse signal generated by the DC regenerative pulse generation circuit 53 closes the switch S and charges the capacitor C during the edging signal period, and generates the edging signal. Outside the period, open the switch to discharge the capacitor. As a result, direct current reproduction of the small screen signal is performed. The above circuits 51 to 53 and 55 are collectively referred to as a DC regenerator 60.

As described above, in the DC reproducing unit 60, the level of all the bordering signals in the composite signal c is made equal to the reference voltage V ₀ by the control operation of the DC reproducing pulse, and is supplied as the signal d to the small screen insertion circuit. Here, the reference voltage V ₀ is a voltage corresponding to white on the cathode ray tube.

Fig. 6 shows that in order to display the sub-screen in color, each color difference signal (RY and B-Y) of the sub-screen signal is written into memory, the processing explained in Fig. 4 is performed, and the main screen is displayed. It is inserted into the signal. The brightness signal for the sub-screen is read from the brightness signal memory 41, and the DC reproducing unit 60Y synthesizes the bordering signal.
The DC reproduced signal is combined with the main screen signal by the insertion circuit 12. Reference numeral 34 denotes a color difference signal matching demodulation circuit for a child screen, and the obtained color difference signals RY and BY are stored in memories 45 and 46. Each color difference signal is stored in the R-Y signal memory 45 and the B-Y signal memory 4.
6, G-Y signal matrix circuit 35
to combine the G-Y signals. The three obtained color difference signals are synthesized with edged signals in the DC reproduction units 60R, 60G, and 60B, and after DC reproduction is performed, the insertion circuits 15 to 17 perform the following:
It is combined with the main screen color difference signal obtained by the main screen color signal demodulation/processing circuit 24. A is a luminance signal, B is a RY signal, C is a BY signal, and D is a GY signal.

In addition, in this embodiment, a so-called PinP television receiver is described in which the original television screen is reduced to a child screen and inserted into the main screen.
The present invention is not limited to this, but can also be applied to television receivers that display a part of an unreduced television screen or, conversely, a part of an enlarged television screen as a sub-screen, or display two or more sub-screens. Of course it is possible.

Figure 7 shows the reference voltage in the DC regenerator 60 of Figure 4.
By making V ₀ variable and changing the DC level of the border signal, the brightness of the small screen signal can be adjusted. The voltage supplied from the DC power supply 63 is divided by the variable resistor 62 and inserted into the small screen signal from the transistor 61 as a border signal reference voltage. As is clear, by adjusting the variable resistor, the DC level of the bordering signal can be changed and the brightness of the sub-screen can be adjusted.

Note that it will be easily understood that by linking the DC levels of the main screen and the sub-screen, it is possible to adjust the brightness of the main screen and the sub-screen together.

As described above, by implementing the present invention, the boundary between the child screens in PinP television becomes clear, the color tone and brightness of the main screen and the child screen become stable, and the viewing becomes easier.

Further, by using the border signal as a reference for the DC level of the small screen signal, the economic efficiency of the circuit can be improved.

[Brief explanation of the drawing]

Figure 1 is a conceptual diagram of PinP television, Figure 2 is a diagram showing an example of scanning lines when inserting a sub screen, Figure 3 is a block diagram of a conventional PinP television receiver, and Figure 4 is the invention of the present invention. 5 is a block diagram of the main parts of one embodiment of the present invention, FIG. 5 is an output waveform diagram of each part in FIG. 4, and FIG. 6 is a block diagram of the main parts of another embodiment of the present invention.
FIG. 7 is a block diagram showing another example of a DC regeneration circuit that can be used in the present invention. 12... Child screen insertion circuit, 21... Main screen tuner, 31... Child screen tuner, 41... Memory, 42... Writing clock generation circuit, 43...
...Reading clock generation circuit, 51...Edging signal generation circuit, 52...Edging signal synthesis circuit, 5
3...DC regeneration pulse generation circuit, 55...DC regeneration circuit, 60...DC regeneration section including a edging signal synthesis circuit, _V0 ...Reference voltage.

Claims (1)

[Claims] 1. In a television receiver that inserts one or more other television signals into a first television signal, a boundary between the first television signal and the other television signal inserted therein. A television receiver characterized in that a signal at a constant DC level is synthesized as a fringing signal, and the other television signal is reproduced as a DC signal using the DC level of the fringing signal as a reference level. Machine. 2. The television receiver according to item 1, wherein the brightness of the other television signal to be inserted into the first television signal is adjusted by changing the DC level of the bordering signal. . 3. The television receiver according to item 2, characterized in that brightness adjustment of the first television vision signal and brightness adjustment of another television signal inserted therein are linked.