JPS6223338B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a storage device, particularly a storage device characterized by a circuit configuration of a write data system related to a partial write operation when it has an error correction function and an interleave function. Regarding.

FIG. 1 shows the configuration of a conventional storage device capable of error correction. This figure shows an example of the circuit configuration for four banks, and the circuit configuration and operation will be explained below.

In general, a partial write operation means that a data processing width (usually made up of multiple bytes) agreed upon between the storage device and an external processing device is addressed and stored within the storage device. Within this data processing width, the information in the specified byte position from the external processing device is replaced with the corresponding byte information sent from the external processing device, and the information in other bytes not specified is replaced with the previous information. Refers to the operation of writing information into a storage device.

Therefore, in a partial write operation of a storage device having an error correction function, in order to maintain consistency between the data and the error correction code, the information at the specified address is first read from the storage circuit, and the presence or absence of an error is checked. If there is a correctable error, it is corrected, and then only the byte position specified by the external processing device is replaced with the write data from the external processing device.
The error correction code is added again and written into the storage circuit.

To realize such an operation, write data 10 transferred from an external processing device is supplied to the storage device in a time-division manner in correspondence with banks. Data switching circuit 36 supplied with this write data
Then, the switching control signal 23 is used to select and switch between write data from an external processing device and rewrite data during a partial write operation. The output data 11 of this circuit is transmitted to the first write data holding circuits 38, 39, 40 and 41 of each bank in response to timing signals 24, 25, 26 and 27 generated according to bank correspondence.
The data 11 is temporarily stored and also supplied to the error correction code generation circuit 37, where an error correction code and write data are generated based on the data 11.
Data 18 is output. After that, data 18 is generated by timing signals 32 and 3 according to bank correspondence.
3, 34 and 35, the second write data holding circuits 44, 45, 46 provided in the storage units 52, 53, 54 and 55 corresponding to each bank
and 47, and these circuits 44-4
7 output data 19, 20, 21 and 22 are stored in memory circuits 48, 49, 50 and 51 corresponding to banks.
supplied to

On the other hand, in the case of a partial write operation, the output data 12, 13, 14 and 15 of the first write holding circuit 38-41 are given to select the write data of the specified bank from the external processing device. The data switching circuit 42 selects and outputs the data of the bank designated by the bank selection control signals 28 and 29, and outputs the output data 16. This output data 16 becomes write data for newly requesting data update to the storage device and is supplied to the data switching circuit 43 at the next stage.
3, as described above, the data read from the storage circuit in the bank-corresponding storage section at the specified address is transferred via the error correction circuit and transferred to the specified bank. A plurality of data byte position designation control switching signals 31 according to the correspondence select all data bytes of data 16 as output data, select read data 30 as output data, or select one of data bytes 16 as output data. By specifying the byte position, the remaining data bytes and the remaining data bytes are selected as read data 30.
Switch data exchange. Output data 17 of this circuit becomes rewrite data for a partial write operation according to bank correspondence, is supplied to a data switching circuit 36, and is again transferred to an error correction code generation circuit 37 in response to a switching control signal 23.

Here, an error correction code and write data for the rewrite data are generated, and the second write data holding circuits 44, 45 in the storage sections 52, 53, 54 and 55 according to the specified bank correspondence are generated.
The data is temporarily stored again in 46 and 47 and supplied to storage circuits 48, 49, 50 and 51 corresponding to the designated bank, completing the transfer of write data during the partial write operation. In these circuit configurations,
As the storage capacity of the storage device is increased and connections are made, the number of second write data holding circuits within the storage section will inevitably increase, which has the drawback of reducing the reliability of the device due to the increase in the number of electrical components used. .

SUMMARY OF THE INVENTION An object of the present invention is to provide a storage device that overcomes the above-mentioned drawbacks.

The storage device of the present invention is a storage device capable of writing, reading, and partial writing to an address specified by a request from an external processing device. The first selects either the data or the rewrite data during partial write operation and outputs the second write data.
data switching means 36, and information means 3 for creating and outputting write information consisting of the second write data and an error correction code for the second write data.
7, a plurality of temporary storage means 38 to 41 for storing the write information for each bank, and a plurality of temporary storage means provided in a one-to-one correspondence with each of the plurality of temporary storage means, and storing write information from the corresponding temporary storage means. The plurality of storage means 48 to 51 to store, the write information selected by selecting the write information to the corresponding bank from the plurality of write information from the plurality of temporary storage means, and the selected write information of the plurality of storage means. A second memory that performs partial replacement of information with the read information read from the corresponding bank and sends it out as rewrite data during a partial write operation.
data switching means 42 and 43.

Next, the present invention will be explained in detail with reference to the drawings.

Referring to FIG. 2, one embodiment of the present invention outputs either rewrite data 17 during a partial write operation or write data 10 from an external processing device by specifying a switching control signal 23. Switching circuit 36, output data 11 from this circuit 36
generates an error correction code based on the data 1
Error correction code generation circuit 3 which is added to 1 and outputs
7. The data 18 from this error correction code generation circuit 37 is sent to timing signals 24, 25, 26 and 2.
Write data holding circuit 3 for holding in response to 7
8, 39, 40 and 41, storage circuits 48, 49, 50 and 51 that store write data from these write data holding circuits 38-41, and one of the write data 12 to 15 as the bank control signal. 28 and 29 output data switching circuit 42 and this data switching circuit 42
The data byte position specified between the data 16 from the data 16 and the read data 30, which is obtained after the data read from the storage circuit corresponding to the bank at the specified address first passes through the error correction circuit during the partial write operation. It is comprised of a data switching circuit 43 that partially replaces data to be newly written to the storage circuit in response to a control switching signal 31. Next, the operation of the present invention will be explained in detail with reference to FIG.

First, the write data 10 that is supplied from the external processing device to the storage device in a time-divisional manner according to the bank correspondence is input to the data switching circuit 36, where the switching control signal 23 causes the write data 10 to be supplied from the external processing device to the storage device in a time-sharing manner or during a partial write operation. Selection of rewrite data 17 is performed. The output data 11 of this circuit 36 is input to an error correction code generation circuit 37, and an error correction code and write data are generated according to the data 11, and output data 18 is generated. After that, the data 18 is generated at timings 24, 25, 26 and 27 according to the bank correspondence.
As a result, the write data is temporarily stored in write data holding circuits 38, 39, 40 and 41 corresponding to the respective banks. Output data 12,1 of these holding circuits
3, 14, and 15 are supplied to the storage circuits 48, 49, 50, and 51 of the corresponding banks, respectively, and at the same time, they are also supplied to the data switching circuit 42. In this data switching circuit 42, in the case of a partial write operation, the write data 1 of each bank supplied from the write data holding circuits 38-41
2, 13, 14, and 15, bank selection control signals 28 and 29 select which bank data is to be output, and the resultant data 16 is output. The data 16 is supplied to the data switching circuit 43 at the next stage. On the other hand, read data 30, which is read data from a storage circuit corresponding to a bank and is supplied via an error correction circuit, is supplied to the data switching circuit 43.

Whether either the data 16 or the read data 30 selects all data bytes of the data 16 as output data by specifying a plurality of data block position designation control switching signals 31 according to bank correspondence; Alternatively, a selection operation is performed as to whether the read data 30 is selected as output data or some data bytes of the data 16 and the remaining data bytes are selected to be output as the read data 30. This circuit 43
The output data 17 becomes the rewrite data of the partial write operation, and is sent to the data switching circuit 36.
and by specifying the switching control signal 23,
The signal is again supplied to the error correction circuit 37. Here, the error correction code and write data for the rewrite data are regenerated, and the write data holding circuits 38, 39, 40, and 41 again follow the bank correspondence.
The write data is temporarily stored in response to the timing signals 24, 25, 26, and 27, and the write data is transferred to the storage circuit of the corresponding bank, thereby completing the operation of the present invention.

The present invention has the effect that by sharing the write data holding circuit, the number of write data holding circuits can be reduced as the storage capacity is increased and the number of write data holding circuits is reduced, thereby reducing costs and improving reliability. .

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the configuration of a conventional storage device, and FIG. 2 is a diagram showing an embodiment of the present invention. In Figures 1 and 2, 10, 12, 1
3, 14, 15, 19, 20, 21, 22...Write data, 11, 16, 17, 18...Output data, 23, 31...Switching control signal, 24, 2
5, 26, 27, 32, 33, 34, 35...timing signal, 28, 29...bank selection control signal, 30...read data, 31...data byte position designation control switching signal, 36, 42, 43 …
...Data switching circuit, 37...Error correction code generation circuit, 38, 39, 40, 41...First write data holding circuit, 44, 45, 46, 47...Second
Write data holding circuit, 48, 49, 50, 51
...Memory circuit, 52, 53, 54, 55...Storage section.

Claims (1)

[Claims] 1. In a storage device capable of writing, reading, and partial writing operations to an address specified by a request from an external processing device, the first write data and partial writing operation given from the external processing device Select either the rewrite data at the time and the second
a first data switching means for outputting the write data; and an information generation means for creating and outputting write information consisting of the second write data and an error correction code for the second write data. , a plurality of temporary storage means for storing the write information for each bank, and a plurality of memories provided in a one-to-one correspondence with each of the plurality of temporary storage means and storing write information from the corresponding temporary storage means. and selecting write information to a corresponding bank from a plurality of write information from the plurality of temporary storage means, and reading out the selected write information and the corresponding bank from the plurality of storage means. 2. A storage device comprising: second data switching means for partially replacing information with other information and sending it out as rewrite data during a partial write operation.