JPS6223459B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device, and particularly to a structure in which circuit connections such as Al wiring can be formed without impairing the performance of circuit components of a high-voltage semiconductor integrated circuit.

A semiconductor integrated circuit consists of separating circuit elements from each other and connecting them to a predetermined circuit configuration using Al wiring or the like. The connection body such as the Al wiring is basically formed by forming a metal thin film wiring on an insulating film covering the main surface of the circuit element. In that case, an inversion layer is often formed on the surface of the bulk crystal due to the potential relationship between the bulk crystal and the connection body, which often becomes a current channel and causes parasitic current leakage. Such problems are particularly noticeable in high-voltage semiconductor integrated circuits in which the bulk crystal concentration is generally low.

Conventionally, as a method for preventing parasitic current leakage on the surface, a method has been known in which the inversion layer 3 is cut in a localized high concentration region (for example, P ⁺ or N ⁺ channel stopper method) as shown in Fig. 1. . However, it has been found through experiments that in such a method, local breakdown occurs in the high concentration stopper region, and this hinders the ability to achieve a high breakdown voltage. The present invention has been made based on this knowledge.

A feature of the present invention is, for example, that an electrode is formed on a semiconductor single crystal that is electrically insulated and separated, and that the electrode is drawn out from the main surface and connected to other semiconductor elements by a connection body formed on the main surface insulating film such as a metal wiring. In an integrated semiconductor element constituting a semiconductor integrated circuit, a portion corresponding to or near a connecting body formed on the main surface is embedded in an insulating film, insulated from the connecting body, and fixed at a bulk potential. The reason lies in the formation of an electric field electrode (field plate).

Hereinafter, the phenomenon in which the conventional high-concentration channel stopper method hinders the increase in breakdown voltage, and the details of one structural example according to the present invention will be explained in order.

Figure 2 is an enlarged view of the vicinity of the channel stopper area in Figure 1, and the φ _N
⁻ , φ _P , φ _1NV , and φ _N ⁺ are the potentials of the N ⁻ bulk 1, P type diffusion layer 2, surface inversion layer 3, and high concentration N type channel stopper 4, respectively. Also,
The region shown by the broken line near the PN junction and the surface inversion layer 3 is the depletion layer 5.

Now, since the PN junction is in a blocking state, the metal connectors 8a, 8b, the P-type diffusion layer 2, and the N
The potential of each region where free carriers exist, such as the bulk 1, may be considered to be uniform. Furthermore, induced free carriers exist in the surface inversion layer 3 as well, and the potential of the surface inversion layer 3 in the blocked state is independent of position and may be considered to be uniform.

Now, assuming that the bias voltage required to form the surface inversion layer is V _T , φ _N ^- is the reference potential, and V _R is the reverse bias of the P _N junction, the potential of each region is given by the following equation. .

φ _N ⁺ = φ _N ⁻ = O φ _1NV = φ _P −V _T ………(1) φ _P = V _R Therefore, the potential difference Δφ between the N ⁺ stopper 4 and the surface inversion layer is as follows from equation (1). It is given as follows.

Δφ=φ _N ⁻ −φ _1NV = −V _R +V _T ………(2) From equation (2), the reverse bias applied to the PN junction is effectively applied between the surface inversion layer and the high concentration stopper region. It can be seen that the voltage is applied directly to the formed junction, except for V _T . As a result, local breakdown occurs, which hinders the ability to achieve high voltage resistance. Based on experimental results, specific figures show that when a device with a withstand voltage of 350V or more as a single element is connected using a conventional high-concentration stopper for semiconductor integrated circuits, the voltage drops to around 250V. did. At that time, V _T is around 25V, and as is clear from equation (2), most of the external reverse bias is added to the effective junction formed between the inversion layer 3 and the high concentration stopper 4. It is known experimentally that

FIGS. 3a and 3b are a plan view showing the structure of an embodiment of the present invention based on the above knowledge, and FIG.
FIG. The structure of these figures is as follows. That is, as in FIG. 1, there is an N island 1 insulated and isolated by an insulating region 7 made of a dielectric or a PN junction in a support base 6, and circuit element regions 1, 2, etc. are formed therein. be done. Connectors 8a and 8b for configuring this circuit are drawn out from each region (N ⁺ layer) of the element. What is different from Fig. 1 is that the high concentration channel stopper 4 is replaced by a bulk crystal and Fig. 3 a
In the middle, an electric field electrode (field plate) 9 which is ohmic-connected through a hole 11 (in the insulating film 10) indicated by a broken line is embedded in the insulating film 10 covering the bulk crystal surface in a shape that cuts the surface inversion layer 3. It is being formed. To explain in more detail the electric field electrode 9 provided according to the present invention, it must satisfy the following conditions. In FIG. 3b, the distance indicated by l must have a sufficient size based on the extension of the depletion layer 5 due to the external reverse bias. This point is a completely different concept from the conventional high-concentration stopper method, and is also the reason why the structure according to the present invention does not hinder the increase in breakdown voltage, or in other words, does not cause a drop in breakdown voltage, as will be described later. Another condition that the electric field electrode 9 should satisfy is that the electric field electrode 9 is insulated from the circuit connection body 8a by the covering insulating film 10, and the dielectric strength of the electric field electrode 9 is at least as high as expected. must be greater than or equal to the maximum reverse bias applied. This is necessary for the electric field electrode 9 to be in ohmic connection with the bulk 1 in order to obtain a blocking state.

With the structure according to the present invention, a drop in breakdown voltage due to local breakdown that occurs in the high concentration channel stopper method does not occur. This is because, as in the case of FIG. 1, a large portion of the external reverse bias is applied to the cut end of the surface inversion layer 3 near the blocking PN junction side of the electric field electrode 9 provided in the structure according to the present invention. However, unlike the case shown in FIG. 1, the impurity concentration in that region is low, and the depletion layer 3 extends, suppressing the maximum electric field strength within the depletion layer and making local breakdown difficult to occur.

[Brief explanation of the drawing]

Figure 1 is a cross-sectional view of a semiconductor device illustrating a structure using the conventional high-concentration stopper method, and Figure 2 is an enlarged cross-section of the vicinity of the stopper in Figure 1, illustrating the breakdown voltage drop phenomenon caused by the conventional structure. It is a diagram. FIGS. 3a and 3b are a plan view and a sectional view for explaining the structure of an embodiment according to the present invention. In addition, in the figure, 1...Island, 2...P
Type diffusion layer, 3... Surface inversion layer, 4... Channel.
Stopper, 5... Depletion layer, 6... Support base, 7
... Separated island, 8a, 8b ... Connection body, 9 ... Electric field electrode (field plate), 10 ... Insulating film, 11 ... Hole 11.

Claims (1)

[Claims] 1. A semiconductor device having a plurality of semiconductor island regions of one conductivity type surrounded by an insulating region in a supporting base, and in which circuit elements formed in each semiconductor island region are connected by a connecting body, wherein the semiconductor The island region includes a region of another conductivity type, and the connection body is provided on the island region between the other conductivity type region and the insulating region with an insulating film interposed therebetween, and the connection body is provided under the connection body. A semiconductor device characterized in that an electric field electrode formed of a conductive layer fixed to the potential of the semiconductor island region is provided in an insulating film.