JPS622385B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a PCM recording/playback device, and its purpose is to enable a PCM signal and a time code signal to always be read in a constant relative relationship during playback, regardless of jitter caused by the magnetic tape running system. It is in. To edit a magnetic tape recorded with a conventional fixed-head PCM recording/playback device, the tape is cut with scissors and reconnected, a process called splice editing. For this reason, in capstan servo type devices that use magnetic tape playback signals to apply the servo, the servo may be disturbed at the splice editing point, resulting in errors in the audio signal, or dropouts may occur due to dirt on the splice tape or hands. There was a problem that this caused errors in the audio signal. To avoid this problem, cut the tape,
Electronic editing without the need for connectivity is desired. Generally, when performing electronic editing, an absolute address is first encoded and the code signal is recorded as a time code signal on a track extending in the longitudinal direction of the tape. Then, the editing point is detected by monitoring the playback PCM signal, reading the time code signal when the editing point is reached, and detecting the absolute address of the editing point.
Electronic editing is performed based on this address signal. However, while the playback PCM signal is played back after correcting the time axis fluctuations caused by the running system, the playback time code signal is played back without time axis correction. Since the relative position between the signal and the signal is shifted, it is difficult to perform highly accurate electronic editing. for example,
As shown in FIG. 1, absolute addresses are given to several frames of the PCM signal, these absolute addresses are encoded, and the code signals are extended in the longitudinal direction of the tape. That is, recording is performed on an auxiliary track T _Q parallel to the PCM signal track T _P. A specific example of this is SMPTE time code. This is 1 as shown in Figure 2.
A frame consists of 80 bits. That is, the bit frequency is 2.4KHz, and of these 80 bits, 32 bits are used as a time code, 32 bits are used as free bits for the user, and 16 bits are used as a sync word. A 32-bit time code consists of a frame code, a second code, and an hour code, and is designed to indicate what hour, minute, and second frame it is in. Each time code is divided into two parts of 4 bits each. 4 user bits between each
It is structured so that bits can be entered one by one. The 16-bit sync word indicates that the tape is running in the forward direction.
A configuration that can identify whether the SMPTE time code signal is read out in the direction indicated by arrow F, or whether the tape is run in the opposite direction and the SMPTE time code signal is read out in the direction indicated by arrow R. This allows the time code to be read without error when the tape is running in any direction. Note that this code signal is [1],

The information [0] is a so-called biphasic signal expressed by a difference in inverted phase as shown in the figure. The present invention uses the SMPTE time code signal (hereinafter referred to as time code signal) described above to maintain a constant PCM regardless of the wah and jitter in the running system.
This allows the absolute address of a signal to be detected. An embodiment of the present invention will be described below with reference to the drawings from FIG. 3 onwards. In Figures 3 and 4,
The analog input signal input to the input terminal Tin is
Low pass filter 1 to prevent aliasing noise
After passing through, the signal is input to an analog/digital conversion circuit, so-called A/D conversion circuit 2. Here, the input signal is sampled and held, and the sampled and held signal is A/D converted and quantized.
The crystal oscillator circuit 3 generates a clock that serves as a reference signal, and the clock output from this circuit is as follows:
The signals are input to a PCM synchronization signal generation circuit 4 and a PCM frame synchronization signal generation circuit 5, where respective synchronization signals _A and _B of 30Hz are created. The output waveform of the PCM frame synchronization signal generation circuit 5 is shown in FIG. 4A. The synchronization signal addition circuit 6 adds the respective synchronization signals (see FIG. 4B) to the signal quantized by the A/D conversion circuit 2, and also includes an error detection and correction code addition circuit 7. In this method, an error correction code is added to the quantized signal in order to prevent dropouts and code errors that occur during reproduction. The modulation circuit 8 modulates the output signal of the error detection and correction code addition circuit 7 using the reference clock from the crystal oscillation circuit 3 in a manner convenient for recording and reproduction. The amplified signal is amplified by the PCM recording head Hd1, the PCM signal recorded on the magnetic tape 10 is reproduced by the PCM reproducing head Hd2, the reproduced signal is amplified by the reproducing amplifier circuit 11, and this amplified signal is amplified by the demodulating circuit 12. demodulated. The read/write memory circuit 13 absorbs the running system jitter contained in the demodulated signal. The output of this memory circuit 13 is
The signal is input to the PCM synchronization signal detection circuit 14, where the synchronization signal is detected, and then input to the error detection/correction correction circuit 15, where errors caused by dropout of the PCM signal are corrected. This corrected signal is processed by a digital/analog conversion circuit called D/A.
The signal is converted into an analog signal by the A conversion circuit 16, and further band-limited by the low-pass filter 17, and the analog signal is output from the output terminal Tout. Therefore, if the time code signal is to be recorded after the PCM signal is recorded on the magnetic tape 10 by the PCM recording head Hd1, the signal from the read/write memory circuit 13 is input to the PCM frame synchronization signal detection circuit 18, as shown in FIG. PCM shown in C
Frame synchronization signal _B (30Hz) is detected and delayed by 1/2 _B (approximately 16.7ms) by the delay circuit 19 as shown in FIG. The time code generation circuit 20 uses the delayed signal as a clock to generate the time code signal shown in FIG. , is recorded on the magnetic tape 10 from the recording side contact of the switch _S1 via the time code recording/reproducing head Hd3. When reproducing a time code signal, the switch _S1 is set to the reproducing side, and the time code signal reproduced by the time code recording/reproducing head Hd3 is inputted to the reproducing amplifier circuit 23 via the switch _S1 and amplified. This amplified time code signal is demodulated by the time code demodulation circuit 24, and the time code detection circuit 25
is input. Examples of the above demodulated signals are shown in FIGS. The counter 26 counts the signal from the read/write memory circuit 13 as a clock, and is configured to be reset by the frequency _B (30 Hz) detected by the PCM frame synchronization signal detection circuit 18 (see FIG. 4C). . The contents of this counter 26 are determined by the time code detection circuit 25.
is input. This time code detection circuit 25
reads the time code signal demodulated by the time code demodulation circuit 24 at the timing of frequency _B (30 Hz) detected by the PCM frame synchronization signal detection circuit 18. This time code signal is shown in FIG. The capstan motor control circuit 27 uses the oscillation frequency of the crystal oscillation circuit 3 as a reference clock to control the capstan motor _M1.
control. Next, when recording the PCM signal and time code signal simultaneously, _the signal _B (30Hz) from the PCM frame synchronization signal generation circuit 5 shown in FIG. delay. The delayed signal is shown in FIG. 4D. Thereafter, time code signals are detected in the same manner as described above. Further, as shown in FIG. 6, the signal _B (30Hz) from the PCM frame synchronization signal generation circuit 5 (see FIG. 7A) is input to the time code generation circuit 20 (the output waveform is shown in FIG. 7C). PCM signals and time code signals are recorded on the magnetic tape 10 in the same manner as described above. During reproduction, the time code signal demodulated by the time code demodulation circuit 24 in the same manner as described above (see FIG. 7, F and G) is sent to the time code detection circuit 2.
Enter 5. Further, the PCM frame synchronization signal detection circuit 18 detects the PCM frame synchronization signal _B (30
Hz), is delayed by 1/2 _B (approximately 16.7 ms) (see FIG. 7E) by the delay circuit 19, and is input to the time code detection circuit 25. Time code detection circuit 2
5 (the output of which is shown in FIG. 7H) reads the time code signal demodulated by the time code demodulation circuit 24 at the timing delayed by the delay circuit 19 in the same manner as described above. Furthermore, as shown in FIG. 8, the signal _B (30Hz) of the PCM frame synchronization signal generation circuit 5 (see FIG. 9A) is input to the time code generation circuit 20 (see FIG. 9D for output) at the same time. Delay circuit 19
The delay circuit 19 delays _{the B} signal by 1/2 _B (approximately 16.7 ms) as shown in Figure 9, and uses that signal as a PCM frame synchronization signal to the synchronization signal addition circuit 6 (see Figure 9C for output). ) and added to the PCM signal, and the PCM signal and time code signal are respectively recorded on the magnetic tape 10 in the same manner as described above. At the time of reproduction, time code signals such as those shown in FIG. Further, the PCM frame synchronization detection circuit 18 detects a PCM synchronization signal frame _B (30 Hz) shown in FIG. The time code detection circuit 25 detects the time code signal demodulated by the time code demodulation circuit 24 (see FIG. 9 H) based on the timing of the PCM synchronization signal frame _B (30 Hz) and the rise of the waveform shown in FIG. 9 E. Read. As explained above, according to this embodiment, a frequency that is the same as or higher than the frequency (time code frame) that is the minimum unit of a time code signal is added to the PCM signal as a frame synchronization signal, and the PCM signal is A memory circuit that reads and writes signals absorbs jitter that occurs in the running system, a PCM frame synchronization signal detection circuit detects a PCM frame synchronization signal, and reads the reproduced and demodulated time code signal at a frequency related to that signal. By configuring as follows, the fourth
As shown in Figures 7 and 9 and F and G in each figure, even if the time code signal has phase fluctuations due to wow, jitter, etc. in the running system, the time code signal read by the time code detection circuit always has no phase fluctuation and is a PCM signal. It corresponds to Further, the counter 26 is a counter that counts the number of reproduced PCM clocks in a time code frame. When performing electronic editing, the time code signal from the time code detection circuit 25,
By detecting the count number of the counter 26
Edit points can be detected in units of PCM clocks. As described above, according to the PCM recording and playback device of the present invention, even if time axis fluctuations occur due to wow, jitter, etc. in the running system, the reproduced PCM signal and the reproduced time code signal always have a constant relationship regardless of this. This enables advanced editing point detection and highly accurate editing.

[Brief explanation of the drawing]

Fig. 1 is a diagram showing the recording pattern of a magnetic tape on which a time code signal is recorded, Fig. 2 is a diagram for explaining the structure of the time code signal, and Fig. 3 is a diagram showing PCM recording in the first embodiment of the present invention. A block diagram of the playback device, FIGS. 4-1 are waveform diagrams of the main parts of FIG. 3, FIGS. 5 and 6 are block diagrams showing the second and third embodiments of the present invention, and FIGS. FIG. 8 is a block diagram showing the fourth embodiment of the present invention, and FIGS. 9A to 9H are waveform diagrams of the main parts of FIG. 4...PCM synchronization signal generation circuit, 5...PCM frame synchronization signal generation circuit, 6...Synchronization signal addition circuit, 13...Read/write memory circuit, 18
...PCM frame same detection signal detection circuit, 19...
Delay circuit, 20... Time code generation circuit, 25
...Time code detection circuit, 26...Counter.

Claims (1)

[Claims] 1. Converting an analog signal into a digital signal using the PCM method, compressing the time axis of this digital signal to form data missing periods at fixed intervals, and inserting a synchronization signal into these data missing periods. The time axis of the reproduced signal extracted from the recording medium is absorbed by a memory circuit, and the time axis of the reproduced signal is expanded by detecting the synchronization signal during the data missing period. and demodulate the digital signal to obtain an analog signal, and at the same time modulate a time code signal with an absolute address in relation to the synchronization signal and write it to the recording medium. A PCM recording/playback device configured to record, demodulate a playback signal extracted from this recording medium, detect an absolute address, and detect a relative position with an analog signal. 2. When recording a digital signal and a time code signal, a signal related to the synchronization signal to be inserted into the data missing period is delayed by a delay circuit, and a time code signal with an absolute address is recorded using the signal as a clock, and each of the above-mentioned 2. The PCM recording and reproducing apparatus according to claim 1, wherein the PCM recording and reproducing apparatus is configured to read the reproduced time code signal using a signal related to a synchronization signal during a data missing period of the reproduced digital signal when reproducing the signal. 3. When recording a time code signal, a delay circuit delays the signal related to the synchronization signal during the data missing period of the reproduced digital signal, uses this signal as a clock, records the time code signal with an absolute address, and reproduces it. 2. The PCM recording/playback device according to claim 1, wherein the PCM recording/playback device is configured to read the playback time code signal using the playback digital signal when the PCM recording/playback device reads the playback time code signal using the playback digital signal. 4. When recording digital signals and time code signals, a signal related to the synchronization signal inserted during the data missing period is used as the clock, and a time code signal with an absolute address is recorded, and when it is reproduced, data missing in the reproduced digital signal 2. The PCM recording and reproducing apparatus according to claim 1, wherein a signal related to a period synchronization signal is delayed by a delay circuit, and a reproduction time code signal is read using the delayed signal. 5. When recording a time code signal, a signal related to the synchronization signal during the data missing period of the reproduced digital signal is used as the clock, and when recording a time code signal with an absolute address and reproducing it, the data missing period of the reproduced digital signal 2. The PCM recording and reproducing apparatus according to claim 1, wherein a signal related to a period synchronization signal is delayed by a delay circuit, and a reproduction time code signal is read using the delayed signal.