JPS6225250B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for forming an amorphous semiconductor layer, particularly a low resistivity amorphous silicon thin film.

According to the RF glow discharge method, a method in which a gas discharge is performed using high radio frequency waves and a thin film is deposited on a substrate by the decomposition reaction, for example, monosilane (SiH ₄ ) gas is decomposed by discharge and deposited on a glass substrate. A thin film of amorphous silicon can be deposited. Compared to silicon thin films made by vapor deposition methods, this silicon thin film has a higher concentration of localized levels in the forbidden band (localized energy levels caused by irregularities in atomic arrangement and broken bonds between atoms). current state)
As with crystalline silicon, the height of the Fermi level can be easily changed by adding impurities. This is because when amorphous silicon is formed by vapor deposition, atoms that have lost most of their energy when attached to the substrate or clusters of these atoms reach the substrate, whereas RF
- In the case of the glow discharge method, the atoms decomposed by the energy of the high-frequency electric field can reach the substrate in a higher energy state, so that the chemical bonds between atoms in the substrate are completely formed, resulting in dangling. This is thought to be because defects such as ring bonds (dangling bonds) are less likely to occur.

Making amorphous silicon using this method is
The ability to form relatively high-quality films at low temperatures (~300°C) on substrates with low melting points, such as glass, opens the way to new device applications.For example, with conventional methods using crystalline materials, P-type or Diffusion is generally used to create an N-type region, but
Since this method is carried out at high temperatures, the state of the PN boundary is left to its natural course, and there is also contamination due to the inclusion of impurities. If amorphous silicon could be made into a material with the same high mobility and sufficient carrier concentration as crystalline silicon, it would be possible to create diodes and transistors that could only be made with crystalline silicon at low temperatures, but with glass. It can be made using less materials and labor on inexpensive substrates such as

However, when amorphous silicon is formed on a glass substrate using the conventional method, atoms in the substrate tend to be sputtered and knocked out during discharge and mix into the _amorphous side. Even if a glow discharge is performed using a mixed gas, the resistivity of amorphous silicon does not decrease, and low resistance cannot be obtained.

Furthermore, Japanese Patent Application Laid-Open No. 16990/1983 describes a solar cell in which a high-resistance intrinsic layer and a low-resistance doped layer are sequentially laminated on a substrate by vapor phase growth using discharge energy. Are listed. However, the above publication does not mention anything about making the resistivity of the doped layer as small as possible compared to the amount of doping into the doped layer.

The present invention was invented in view of the above-mentioned circumstances, and involves forming a high resistivity layer made of an amorphous semiconductor on a substrate by vapor phase growth using discharge energy, and then depositing the high resistivity layer on the substrate. In a method for forming an amorphous semiconductor layer in which a low resistivity layer made of an amorphous semiconductor is formed on a resistance layer by vapor phase growth using discharge energy, the amount of doping to the low resistivity layer is The purpose is to obtain an amorphous layer with a low specific resistance with a low doping amount by reducing the specific resistance of the low specific resistance layer as a lever as much as possible. In order to achieve this object, according to the present invention, in the method for forming an amorphous semiconductor layer as described above, the discharge energy for vapor phase growth of the high resistivity layer is used to grow the low resistivity layer. The discharge energy is set to be 1/2 or less of the discharge energy for vapor phase growth.

According to the present invention configured as described above, the discharge energy for vapor phase growth of the low resistivity layer is reduced.
Due to the presence of the high resistivity layer formed by vapor phase growth with 1/2 or less discharge energy, atoms from the substrate are mixed into the low resistivity layer due to sputtering during discharge ( In other words, the influence of the substrate on the low resistivity amorphous layer is extremely effectively prevented. Therefore, since the above-mentioned high resistivity layer acts as a so-called buffer layer, the RF electric field when creating the low resistivity layer has an ideal distribution, and even if the amount of impurity supply gas is small, a low resistivity, e.g. It is possible to easily and accurately obtain p<0.1·Ω·cm. This high resistivity layer may be made of intrinsic amorphous silicon without doping with impurities, and may be formed using the same equipment used to vapor phase grow the low resistivity amorphous semiconductor layer described above. desirable.

In this case, it is desirable to form the high resistivity layer with an RF power that is 1/3 to 1/2 of the RF power used when forming the low resistivity amorphous semiconductor layer.

Furthermore, the buffer layer described above has a resistivity of 10 ⁶
It may consist of a high specific resistance amorphous amorphous layer of Ω·cm or more and/or an intrinsic amorphous amorphous layer not doped with impurities. That is, if the resistivity is less than 10 ⁶ Ω·cm, the buffering effect will be poor and the insulation effect when the element is manufactured will also be weak.
In order to perform these functions well, it is desirable that the specific resistance of the buffer layer is 10 ⁹ to ^{10 12} Ω·cm or more. The thickness of this buffer layer also has a desirable range, and it is preferably 200 Å or more in consideration of the buffering effect and insulation properties. In addition, the structure of the buffer layer can be modified depending on the purpose. For example, by first forming the above-mentioned high resistivity amorphous layer on the substrate surface, and then forming an intrinsic amorphous layer without doping any impurities thereon,
The buffer layer can also have a double structure.

Next, the present invention will be explained in more detail with reference to examples.

FIG. 1 shows the equipment used in the RF-glow discharge method. The substrate 1 is placed on a stand placed in a quartz reaction tube 2, and can be set at any temperature up to 500° C. using a heater 3. SiH ₄ gas and doping PH ₃ (or B ₂ H ₆ ) gas are mixed in the upper conduit 4 of the reaction tube and fed into the reaction tube 2 . These gases are mixed with Ar to facilitate discharge. Also, around the quartz reaction tube 2, there is an RF
A coil 5 is wound around it to create an electric field for excitation of the gas. The pressure inside the container 2 is reduced by a vacuum pump, and the degree of vacuum is measured by a vacuum gauge 6.

Using such a device and reducing the localized levels,
Sufficient RF power is required to form an amorphous silicon film with a three-dimensional tetrahedral structure. Also, unlike crystals, in order to have an irregular atomic arrangement, it is necessary to introduce an appropriate amount of H atoms to allow smooth bonding. When a small amount of PH ₃ gas is mixed under these conditions, P atoms are doped by substitution with Si atoms, and N
Amorphous silicon of the mold grows. Curve a in Figure 2
The temperature is set to 300°C using quartz glass as the substrate 1.
This figure shows the specific resistance of an amorphous silicon film when the strength of the RF power for decomposition is varied while the film is kept at ℃. The mixing ratio of PH ₃ gas and silane gas at this time is 2.5×10 ⁻⁵ in terms of volume ratio. As can be seen from this figure, the resistivity is at its minimum when the RF power is appropriate, and the value indicates that the doping effect is comparable to that obtained with crystalline silicon. In other words, when the RF power is small, the decomposition of PH ₃ may be insufficient, or the decomposed P
This is thought to be because it does not enter through substitution, or it does not take a tetrahedral structure. On the other hand, in areas where the RF power is large, it is thought that the substrate may be sputtered or the bonds in the formed film may be cut by themselves.

In this embodiment, before forming the impurity-doped amorphous silicon layer 7, an undoped amorphous silicon layer 8 is first formed on the substrate 1 as shown in FIG. Give it a 7. By doing so, it is possible to form a doped layer with a lower specific resistance than when a doped layer is directly formed on the substrate 1, even with the same amount of doping gas. Curve b in FIG. 2 shows the change in resistivity in this case with respect to RF power. According to curve b, a low resistivity can be obtained, but this is because P atoms (or B atoms) easily enter the amorphous amorphous by substitution, or Si atoms are attached to the substrate due to glow discharge. It is conceivable that the substrate can be sputtered to prevent O atoms and the like from being mixed in during the process. Furthermore, in the early stage of film formation, the strength of the RF electric field may vary depending on the type of substrate even under the same conditions.

Note that the substrate 1 may be made of not only quartz glass but also other insulators or metals, but when making an amorphous silicon device, first
Attach approximately 0.5 to 1.0μ of amorphous silicon (10 ⁶ Ω・cm). That is, as shown in FIG. 4, an undoped layer 8 is formed, and then an N-type layer 7, a P-type layer 9, etc. are formed. In this case, the conditions for forming the buffer layer to eliminate the influence of the substrate on the amorphous layer, that is, the undoped layer 8, are as follows: do not add impurities;
It is desirable to reduce the RF power by mixing in. For example, if the substrate temperature is 300℃,
SiH ₄ pressure 4×10 ^-2 Torr, RF power 40 to 60 (second
Good results were obtained when using the arbitrary scale shown in the figure). When we examine the optical absorption coefficient α of the undoped amorphous Si layer made in this way, we find that it is as shown in Figures 5A and 5B, which is due to the relationship of √ = A (hν - Eg), which is a characteristic of an amorphous semiconductor. satisfies the requirements well. In this case, Eg (optical energy gap) = 1.8eV. Such a large optical energy gap indicates that this type of amorphous semiconductor has few localized levels in the forbidden band and is of good quality. Further, the specific resistance in this case is ρ≧10 ¹⁰ Ω·cm. The specific resistance of the low-resistance amorphous layer thus formed on the undoped layer can be as small as 0.1Ω・cm or less even when using a mixed gas of PH ₃ /SiH ₄ = 2.5×10 ^-5 , for example. .

FIG. 4 shows an example of the structure of a transistor manufactured according to the method of the present invention, which allows the size of the element itself to be smaller and the degree of integration to be increased compared to devices manufactured by the conventional diffusion method. It has features such as being able to use inexpensive glass, metal, or resin as the substrate.

Although the present invention has been described above with reference to embodiments, this embodiment can be further modified based on the technical idea of the present invention. For example, amorphous semiconductors other than amorphous silicon can be used. The above-mentioned undoped layer means a layer that is not intentionally doped with impurities, but even if it contains a small amount of H, O, etc. that are inevitably mixed in during the manufacturing process, it is included in the concept of an undoped layer. It is something that can be done. Note that this high resistivity layer such as an undoped layer can also be formed by a method other than the glow discharge method. The present invention is of course applicable to various devices other than transistors and diodes.

[Brief explanation of the drawing]

The drawings show examples of the present invention, in which Fig. 1 is a cross-sectional view of a glow discharge device, and Fig. 2 shows the specific resistance and RF of an amorphous Si layer doped with P.
A graph showing the relationship with power. Figure 3 is a cross-sectional view of a state in which an impurity-doped amorphous Si layer is formed on an undoped layer. Figure 4 is a cross-sectional view of a transistor. Figures 5A and 5B are a non-doped layer. It is a graph showing light absorption characteristics of a doped layer. In addition, in the symbols used in the drawings, 1...
...Substrate, 5...RF coil, 7...Low resistivity amorphous Si layer, 8...Undoped amorphous Si
Layer 9 is a P-type amorphous Si layer.

Claims (1)

[Claims] 1. A high resistivity layer made of an amorphous semiconductor is formed on a substrate by vapor phase growth using discharge energy, and then a low resistivity layer made of an amorphous semiconductor is grown on this high resistivity layer by vapor phase growth using discharge energy. In the method of forming an amorphous semiconductor layer by phase growth, the discharge energy for vapor phase growth of the high resistivity layer is replaced by the discharge energy for vapor phase growth of the low resistivity layer. of energy
1. A method for forming an amorphous semiconductor layer, characterized in that the thickness is reduced to 1/2 or less.