JPS6226748B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to an improvement in an image processing device that can easily create a border pattern for an image.

(2) Background of the Technology, Prior Art, and Problems When processing image patterns, it is often the case that a border pattern showing the outline of the original image pattern is created, and various processes are performed using this pattern.

Conventionally, in order to create a border pattern, there were problems such as scanning the image memory and checking the boundary line between data 1 and 0, which was complicated, required a large amount of hardware, and took too long a processing time.

(3) Object of the Invention An object of the present invention is to provide a device for creating a border pattern that is simple and has a quick processing time while utilizing various conventional functions.

(4) Structure of the Invention The edging pattern creation device of the present invention includes a processing section and an image memory, and the processing section converts the original image pattern in the image memory into a first direction among predetermined bits, up, down, left, and right. a first shift unit that shifts the first image pattern by a predetermined bit in a second direction among the top, bottom, left, and right, and performs a logical sum with the original image pattern to output a first image pattern; a second shift unit that performs a logical OR with an image pattern and outputs a second image pattern; a third shift unit that performs a logical OR with the third image pattern and outputs a third image pattern; a fourth shift unit that calculates a sum and outputs a fourth image pattern; and a fourth shift unit that calculates an exclusive OR of the fourth image pattern and the original image pattern and outputs a border pattern.
It is characterized by being equipped with EOR.

(5) Embodiments of the Invention FIG. 1 shows a schematic configuration diagram of a border pattern creation device of the present invention, in which a central processing unit 10 that performs various processes, a processing unit 1, and an image memory 2 are connected to a data bus,
They are connected by an address bus 6. 3 is an MT in which original image patterns are stored and created image patterns are stored, and 4 is a disk. 5 is a plotter that outputs a desired image.

FIG. 2 is a schematic block diagram of the processing section 1, and FIG. 3 is a diagram showing image patterns of each section A to F in FIG. In this embodiment, a case will be explained in which a 1-bit border pattern for an image "1,000" is created.

First, the data input unit 11 registers the original image pattern from the MT 3 on the disk 4, and develops the original image pattern from the disk 4 into the image memory 2.
A in the figure is the original image pattern.

Next, the upper shift unit 12 takes out the original image pattern A in the image memory 2, shifts it upward by 1 bit, and performs a logical OR with the original image pattern A in the OR unit 13 to output the first image pattern B. .

Next, the right shift section 14 shifts the first pattern B to 1
The bits are shifted to the right side, and the logical OR with the first image pattern B is performed in the OR section 15 to output the second image pattern C.

Next, the second image pattern C is transferred to the lower shift section 16.
is shifted downward by one bit, and the logical OR with the second image pattern C is taken by the OR section 17 to output the third image pattern D.

Next, the left shift section 18 selects the third image pattern D.
is shifted to the left by one bit, and the OR section 19 performs a logical sum with the third image pattern D to output the fourth image pattern E.

Further, the EOR section 20 calculates the exclusive OR of the fourth image pattern E and the original image pattern A, and outputs the border pattern F. This edging pattern F is stored on a disk at the output section 21.

In general image processing devices, horizontal shifts of the image pattern can be processed using commands such as "SLL" and "SRL", and vertical shifts can be specified by shifting a predetermined address from the console. This can be done more easily. Therefore, the method of this embodiment can be carried out without adding almost any new functions to a conventional general processing device. Further, in this embodiment, the shift is performed in the order of top, right, bottom, and left, but any order is possible.

(6) Effects of the Invention As explained above, according to the present invention, it is possible to easily and simply create a border pattern.

[Brief explanation of the drawing]

FIG. 1 is a schematic block diagram of a production apparatus according to an embodiment of the present invention, FIG. 2 is a schematic block diagram of a processing section, and FIG. 3 is a diagram of each image pattern. In the figure, 1 is a processing section, 2 is an image memory, 12 is an upward shift section, 14 is a right shift section, 16 is a downward shift section, 18 is a left shift section, and 20 is an EOR section.

Claims (1)

[Scope of Claims] 1. A processing unit and an image memory, wherein the processing unit shifts the original image pattern in the image memory by a predetermined bit in a first direction of up, down, left, and right, and performs logic matching with the original image pattern. a first shift unit that calculates a sum and outputs a first image pattern; and a first shift unit that shifts the first image pattern by a predetermined bit in a second direction among up, down, left, and right, and calculates a logical sum with the first image pattern. a second shift unit that outputs a second image pattern; and a second shift unit that shifts the second image pattern by a predetermined bit in a third direction among the top, bottom, right, and left, and calculates a logical sum with the second image pattern and generates a third image pattern. a third shift unit that outputs an image pattern; and a third shift unit that shifts the third image pattern by a predetermined bit in a fourth direction among up, down, left, and right, and calculates a logical sum with the third image pattern to obtain a fourth image pattern. A fourth shift section to output, performs an exclusive OR of the fourth image pattern and the original image pattern, and outputs a border pattern.
An edging pattern creation device characterized by comprising an EOR section.