JPS622734B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a wireless communication device, and particularly to a wireless communication device in which the function of a local oscillator is expanded.

Conventionally, in wireless communication devices such as transceivers, local oscillators (hereinafter referred to as internal oscillators)
VFO) and a variable frequency oscillator separately provided externally (hereinafter referred to as external VFO), for example, connect the internal VFO for reception and the external VFO for transmission. This enables so-called cross-crossing operation in which one set of transceivers is used as if it were two transceivers.

There were also devices that transferred the oscillation frequency of the internal VFO to an external VFO, or transferred the oscillation frequency of the external VFO to the internal VFO.

However, in conventional communication devices such as those mentioned above, internal
There was nothing that could swap frequencies between the VFO and an external VFO.

The present invention was conceived in view of the above,
With a single local oscillator made up of a PLL frequency synthesizer, it can essentially act in the same way as the internal VFO and external VFO, and the oscillation frequencies of the internal VFO and external VFO can be exchanged, making it easier to perform so-called cross-crossing operations. The purpose is to provide a wireless communication device.

The present invention will be explained below with reference to Examples.

FIG. 1 is a block diagram of essential parts of an embodiment of the present invention.

In Fig. 1, reference numeral 1 denotes a frequency synthesizer configured with a PLL circuit, and the frequency synthesizer 1 is configured so that its output frequency is set by a frequency division signal value supplied to a programmable divider from the outside. is input to the transceiver mixing circuit in place of the local oscillator output. Reference numeral 2 denotes a readable and writable storage device in which a frequency synthesizer 1 generates a predetermined frequency, for example, 1 MHz.
The frequency division ratio of the programmable divider that outputs is stored. 3 is a rotary encoder fixed to the axis of the VFO dial provided on the panel surface of the transceiver, and emits a pulse output corresponding to the rotation angle and rotation direction of the VFO dial. 4
is a writable/readable storage device having a plurality of storage capacities, and stores in advance the frequency division ratio of the frequency synthesizer 1 corresponding to frequencies frequently used for transmission and reception of the transceiver.

Reference numeral 5 denotes a control circuit in which a frequency division ratio setting signal outputted from the control circuit 5 to the programmable divider of the frequency synthesizer 1 by a binary signal applied to the output selection signal input terminal 6 is stored in the storage device 2; The signal applied to the terminal 10 sets the storage contents of the specified memory channel of the storage device 4, and when the switch 7 is turned on, the storage contents of the storage device 2 are specified by the signal applied to the terminal 10. (MIN function), and when the switch 8 is on, the memory contents of the memory channel in the storage device 4 specified by the signal applied to the terminal 10 are stored in the storage device 2. (MR function), when the switch 9 is turned on, the memory contents of the memory channel in the memory device 4 specified by the signal applied to the terminal 10 and the memory contents of the memory device 2 are provided in the control circuit 5, for example. Configure to exchange via buffer register (CHENG function).

Control circuit 5 and storage devices 2 and 4 can be realized by a microcomputer. In this case, the memory channels of storage devices 2 and 4 may be separated and configured into one storage device.

In this embodiment configured as described above, first, a high potential input is applied to the terminal 6, and the stored contents of the storage device 2 are output to the frequency synthesizer 1. In the programmable divider of the frequency synthesizer 1, the division ratio setting signal outputted from the control circuit 5 is set in accordance with the number of output pulses that changes by rotating the rotary encoder 3.

Now, when the VFO dial is rotated, the number of output pulses of the rotary encoder 3 corresponding to the rotation angle of the VFO dial is added to the memory contents of the storage device 2 according to the rotation direction of the VFO dial, or Reduced.

When a high potential input is applied to the terminal 6, the contents stored in the storage device 2 are outputted to the frequency synthesizer 1, and the frequency division ratio of the programmable divider of the frequency synthesizer 1 is set. Therefore, the frequency synthesizer 1 outputs a local oscillation frequency corresponding to this frequency division ratio. Furthermore, if the VFO dial is rotated while applying a high potential input to the terminal 6, the frequency division ratio of the programmable divider will change in accordance with the rotation angle.

This change increases or decreases depending on the direction of rotation of the VFO dial.

If terminal 6 is switched to low voltage input, terminal 10
The stored contents in the memory channel of the storage device 4 set by the input signal are input to the frequency synthesizer 1, and the frequency division ratio of the programmable divider is set. Further, when the switch 7 is turned on, the memory contents of the memory circuit 2 are stored in the memory channel of the memory device 4 specified by the input at the terminal 10. Also, if switch 8 is turned on, terminal 1
The storage contents stored in the memory channel of the storage device 4 specified by the input of 0 are stored in the storage device 2. Further, when the switch 9 is turned on, the storage contents in the memory channel designated by the input at the terminal 10 and the storage contents of the storage device 2 are exchanged.

Here, the operation of the transceiver provided with this embodiment will be explained.

Now, when the transceiver is in reception operation at a certain frequency according to the storage contents of the storage device 2 and an attempt is made to perform cross-crossing operation, first, the division ratio of the programmable divider corresponding to the frequency in operation, that is, the storage in the storage device 2 is determined. The contents are stored in the storage device 4 by turning on the switch 7, and then the contents stored in the storage device 2 are changed by operating the VFO dial to set the frequency division ratio corresponding to the transmission frequency. After that, by turning on the switch 9, the contents of the storage device 2 and the contents of the storage device 2 stored in the storage device 4 are exchanged. Therefore, by switching the signal input to the terminal 6, reception is performed at the division ratio of the storage contents of the storage device 2, and transmission is performed at the division ratio of the storage contents of the replaced storage device 4, so that reception is performed at the original operating frequency. However, it is also possible to transmit at a frequency corresponding to the newly set frequency division ratio. Furthermore, when the above exchange is not performed, reception can be performed at a frequency corresponding to the newly stored frequency division ratio in the storage device 4, and transmission can be performed at a frequency corresponding to the newly set frequency division ratio in the storage device 2. However, normally, the storage device 2 side is often set to receive.

Further, when outputting the storage contents of the storage device 4 for transmission or reception, the storage device 4 side may be output from the control circuit 5 through the terminal 6. In this case, if you want to set a frequency division ratio that is slightly different from the frequency division ratio stored in the storage device 4, turn on the switch 8, transfer the stored contents of the storage device 4 to the storage device 2, and then All you have to do is change the memory contents of 2 by a predetermined value using the VFO dial and send or receive.
In this case, the previous storage contents of the storage device 2 are destroyed, but the storage contents of the storage device 4 can be preserved.

In addition, if you want to change to operation by the storage device 4 while transmitting or receiving using the division ratio of the storage contents of the storage device 2, turn on the switch 9.
It is only necessary to exchange the storage contents of the storage device 2 and the storage contents of the storage device 4, and the storage contents of the storage device 2 can be left in the storage device 4 for operation.

Furthermore, when a method is provided to protect the storage contents of a specific memory channel of the storage device 4 without changing them (this method is also called a priority method), normal storage contents A and priority storage contents M are If you want to protect memory content A by replacing it, release the priority and protect memory content A.
If the contents of the storage device 2 are exchanged with the contents of the storage device 2, then the contents of the storage device 2 are exchanged with the storage contents M, and then the contents of the storage device 2 are exchanged with the contents placed in the storage contents A position, the storage The contents of the device 2 remain as they were, the stored contents A and M are exchanged, and the priority is added again.

As is clear from the above description, according to this embodiment, the frequency synthesizer 1 consisting of a PLL circuit is
It is possible to perform exactly the same operation as in the case where there are two conventional VFOs, an internal VFO and an external VFO. Further, in this case, by using the operations of the three switches 7, 8, and 9 in combination in this embodiment, frequency control can be quickly performed over multiple functions.

Next, other embodiments of the present invention will be described.

FIG. 2 is a block diagram of the main parts of another embodiment of the present invention. In Figure 2, for simplicity,
Bus lines consisting of multiple conductors are also displayed as a single line.
This is indicated by diagonal lines.

Reference numeral 11 denotes a changeover switch 11-1 for selecting the so-called cross-over operation, and a changeover switch 11-1 for selecting the so-called cross-crossing operation;
Switches 11-2 and 11 for switching reception
-3, and 12 is a register whose contents increase or decrease according to the output of the rotary encoder 3.
This corresponds to the storage device 2 of the embodiment shown in FIG. 14-
4, 14-2...14-n are registers, and the first
The switch 19 corresponds to the storage device 4 in the illustrated embodiment.
one of them is selected. 15 and 16 are the contents of register 12, register 14-i (i
are latches that temporarily store the contents of 1, 2, . . . be.

Note that 1 is a frequency synthesizer, and each register 12, 14-1, 14-2...14-n has a first
As shown in the figure, setting data of the frequency division ratio of the programmable divider of each predetermined frequency synthesizer 1 is stored.

Now, when the common contact of the changeover switch 11-1 is in contact with the contact A, the division ratio is set by the contents of the register 14-i selected by the changeover switch 19 regardless of whether it is transmitting or receiving, and the frequency division ratio is set at the contact D. Similarly, the frequency division ratio is set based on the contents of the register 12 regardless of whether it is transmitting or receiving. In addition, the changeover switches 11-2 and 11-3 are set so that their common contacts contact the E and G sides during transmission.
During reception, the switch is switched so that the F and H sides are in contact.

When the common contact of the changeover switch 11-1 is in contact with contact B, in the register 12 at the time of transmission,
When receiving, the division ratio is set by the contents of register 14-i, and when contact C is in contact, the division ratio is set by the contents of register 14-i when transmitting, and by the contents of register 12 when receiving. be done.

Therefore, the output timing of registers 12 and 14-i is controlled by timing signals to each register, and the contents of register 12 and register 14-i are
Transfer and exchange of the contents is performed by controlling timing signals applied to the I, J, K, and L terminals of latches 15, 16 and tristate gates 17, 18.

Therefore, since the operation in this embodiment can be performed in the same manner as in the case shown in FIG. 1, a detailed explanation thereof will be omitted.

As explained above, according to the present invention, there is provided a first memory that stores frequency division ratio setting data of a program divider of a PLL frequency synthesizer and is capable of changing the data by an external setting means; and a plurality of second memories storing frequency ratio setting data, selectively outputting the stored contents of the first memory or the stored contents of the selected second memory to the program divider, and the first memory. The oscillation frequency of the PLL frequency synthesizer can be changed by transferring and exchanging the memory contents between the memory contents of the memory and the memory contents of the selected second memory, so it is possible to change to memory operation while operating with VFO. If desired, by exchanging the memory contents of the first memory and the second memory, you can leave the division ratio used for VFO operation in the second memory to enable memory operation, or Even if a priority is assigned to the VFO, it is possible to exchange the normal storage content in the second memory with the priority storage content while keeping the frequency division ratio during operation of the VFO unchanged. becomes. In addition, a single local oscillator can perform multi-functional operations such as so-called cross-over operation, which conventionally required two VFOs.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of essential parts of an embodiment of the present invention. FIG. 2 is a block diagram of the main parts of another embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Frequency synthesizer, 2 and 4... Storage device, 3... Rotary encoder, 5... Control circuit, 1
1 and 19...changeover switch, 12, 14-1,
14-2,...14-n...Register, 15 and 1
6... Latch, 17 and 18... Tri-state gate.

Claims (1)

[Claims] A PLL frequency synthesizer constituting a local oscillator of a wireless communication device, a first memory storing division ratio setting data of a programmable divider of the PLL frequency synthesizer, and a first memory storing division ratio setting data of the programmable divider. A plurality of second memories and the data stored in the first memory are changed by an external setting means, and the data stored in the first memory are selectively changed.
outputting the data stored in the memory or the data stored in the set second memory to the programmable divider, and exchanging the data stored in the first memory with the data stored in the selected second memory, and A wireless communication device comprising: a control means for transferring stored data to and from a second memory.