JPS6228630B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a video detection circuit using fully synchronous detection.

Conventionally, the system shown in FIG. 1 is known as a video detection circuit using completely synchronous detection. In Figure 1, A is a signal input terminal, B is a signal output terminal,
1 is a mixing circuit, 2 is a filter/amplifier section, 3 is a synchronous detection circuit, 4 is an external fixed oscillator, and 5 is π/2
6 is a phase detection circuit, 7 is a low-pass filter, and 8 is a local oscillation circuit. Now, when an input signal is input from terminal A, it is mixed with the signal from the local oscillation circuit 8 in the mixing circuit 1, converted to a video intermediate frequency of a constant frequency, and then sent to the filter amplifier section 2 as a signal with band characteristics and gain. Output.
The output is divided into two parts, one output is synchronously detected by one output of an external fixed oscillator 4 in a synchronous detection circuit 3, and a mixed video signal is output from an output terminal B. The other output of this external fixed oscillator 4 passes through a π/2 (rad) phase shift circuit 5, phase detects the output of the filter amplifier section 2 in a phase detection circuit 6, and the output passes through a low pass filter 7. After that, it is supplied to the frequency adjustment terminal of the local oscillation circuit 8, and the output frequency of the local oscillation circuit 8 is finely adjusted so that the frequency and phase difference between the output of the external fixed oscillator 4 and the output of the filter amplifier section 2 match. works. C is a tuning voltage, which is used when presetting a channel. In this configuration, when setting a channel using this tuning voltage C, the AFC loop must be set because the intermediate frequency signal phase and the detection signal phase are always in phase in a receiver that does not use a fully synchronous detection method. Since the screen was visible even when removed, it was possible to make selections while looking at the screen. however,
In the method shown in Figure 1, an external fixed oscillator 4, π/2
(rad) When the control of the automatic frequency phase control circuit (AFPC) including the phase shift circuit 5, phase detection circuit 6, low-pass filter 7 and local oscillation circuit 8 is removed, the correlation between the phase of the fixed oscillator and the phase of the intermediate frequency signal is The problem was that the screen could not be displayed and the B _T (tuning voltage) could not be selected.
For this reason, when this AFPC is closed loop and the tuning voltage B _T is selected, the voltage at both ends of the pull-in range of the circuit is selected, so the next time the switch is turned on or the channel is switched, a slight frequency Even with drift, there was a drawback that the circuit's pull-in range was exceeded.

In order to eliminate the drawbacks of the above-mentioned conventional example, the present invention provides a circuit for controlling the gain of the phase detection output between the phase detection circuit and the low-pass filter, and when adjusting the tuning voltage applied to the local oscillation circuit, the phase An object of the present invention is to provide a video detection circuit in which the drawback of out of pull-in range is alleviated by varying the gain of the detection output using an external control function so as to reduce the gain. Hereinafter, embodiments will be described in detail with reference to the drawings.

FIG. 2 shows one embodiment of the present invention.
The same reference numerals as in FIG. 1 indicate the same elements, but this embodiment differs in that a variable gain control circuit 9 is inserted between the phase detection circuit 6 and the low-pass filter 7.

Next, the principle operation of this embodiment will be explained. first,
The hold range in the pull circuit is as follows, assuming that the control sensitivity of the phase circuit is β (V/rad), the transmission relationship of the low-pass filter is F (S), and the sensitivity of the voltage controlled oscillator circuit is μ (Hz/V). The hold frequency W _L is expressed as |W _L |=F(0)μ·β (1). If a lag lead filter as shown in Fig. 3 is used as this low-pass filter, the pull-in range W _C is, as is well known, |W _C |=|W _L |×√2− ² =F(0) μ·β√2− ² ………(2) However, m=R ₂ /R ₁ +R ₂ ≦1.

In the present invention, when selecting a channel,
This is done with the AFPC loop closed, but if you make the pull-in range narrower than the normal loop and expand it again after selecting the channel, the disadvantage is that it will deviate from this pull-in range even due to a slight frequency drift. is reduced. This pull-in range is expressed by equation (2), and in the present invention, β(V/V/
This pull-in range is changed by changing the gain control voltage D applied to the variable gain control circuit to reduce the gain of the phase detection output.

Next, FIGS. 4 and 5 show specific examples of the phase detection circuit 6 and variable gain control circuit 9 shown in FIG. 2, and the transistors Q ₁ to _{Q 3} are three-stone differential amplifiers. The output of the filter/amplifier section 2 is input to the input terminal IN1, the output of the phase shift circuit 5 is input to the input terminal IN2, and the output terminals OUT1,
Output is obtained from OUT2, and V _A , V
_B is the bias power supply.

Further, FIG. 5 shows a double-balanced differential amplifier consisting of four transistors _Q1 to _Q4 , and the output terminals OUT1 and OUT2 of FIG. 4 are connected to the input terminals IN1 and IN2, respectively. This input terminal IN
1 and IN2 are at the same potential, so the resistors R ₃ and R ₄ are selected to have the same value, and the currents flowing through the transistors Q ₅ and Q ₆ are made constant. Furthermore, since the bases of transistors Q ₁ and Q ₄ and the bases of Q ₂ and Q ₃ are connected, reference potential V _C is applied to the bases of transistors Q ₁ and Q ₄ through resistor R ₆ , and the bases of transistors Q ₂ and Q 4 are connected to each other. A potential V _cpot is applied to the base of Q ₃ through a resistor R ₅ . Further, the collectors of transistors Q ₁ and Q ₃ are connected to the power supply V _CC through a resistor R ₁ , and the collectors of transistors Q ₂ and Q ₄ are connected to the power supply V _CC through a resistor R ₂ . Therefore, if the potential V _cpot is made larger than the reference voltage V _C , the output terminal OUT1
The gain of the output terminal OUT increases, and if it is decreased, the output terminal OUT
The gain of 1 decreases. Note that the output of the circuit shown in FIG.
It is connected to the input terminal shown in the figure, and its output terminal is directly connected to the local oscillator 8.

As explained above, the present invention provides a variable gain control circuit that controls the gain of the control voltage applied from the phase detection circuit to the variable local oscillation circuit, and when adjusting the tuning voltage externally applied to the variable local oscillation circuit. in order to reduce the gain
Since the AFPC loop gain is lowered, even if the tuning voltage is adjusted while the AFPC loop is closed, the center frequency can be adjusted to a frequency that is close enough to the center frequency, and by increasing the gain after adjustment, the tuning voltage can be adjusted to a frequency that is close enough to the center frequency. , it is possible to reliably pull in a predetermined frequency when switching channels, etc., and it is also possible to prevent AFPC operation from deviating even if there is a drift in the operating point due to voltage fluctuations or temperature fluctuations. Therefore, according to the present invention, channel selection becomes easy, the pull-in range is not deviated from, and a stable screen can be obtained.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a conventional example, Fig. 2 is a block diagram of an embodiment of the present invention, Fig. 3 is a specific circuit diagram of a low-pass filter, and Fig. 4 is a specific diagram of a phase detection circuit. The circuit diagram, FIG. 5, is a specific circuit diagram of the variable gain control circuit. 1...Mixing circuit, 2...Filter/amplifier section,
3... Synchronous detection circuit, 4... External fixed oscillator, 5
...π/2 (rad) phase shift circuit, 6... Phase detection circuit, 7... Low pass filter, 8... Local oscillation circuit, 9... Variable gain control circuit.

Claims (1)

[Claims] 1 The input signal is passed through a mixing circuit that mixes it with the output of a frequency variable local oscillation circuit, and this mixed output is passed through an amplifier circuit that has a filter function with bandwidth characteristics and an amplification function to divide it into two systems, one of which is synchronously detected with the output of the fixed oscillator to obtain an output video signal, and the other output signal of the amplifier circuit having a filter function and amplification function and a signal obtained by shifting the phase of the output of the fixed oscillator are passed through a circuit for phase detection. , after passing the phase detection output through a low-pass filter,
In a circuit connected to a terminal for finely adjusting the frequency of the local oscillation circuit, a circuit for controlling the gain of the phase detection output is provided between the phase detection circuit and the local oscillation circuit, and the gain is applied to the local oscillation circuit. A video detection circuit characterized in that when adjusting a tuning voltage, the gain of the phase detection output is varied by an external control function so as to reduce the gain.