JPS6228882B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to an oscillation circuit using piezoelectric elements. Conventional crystal oscillation circuits for watches using, for example, crystal as a piezoelectric element use a Pierce PG oscillation circuit, which is a modification of the Colpitts LC oscillation circuit, as shown in FIG. In this circuit, a self-biasing resistor _R1 is installed between the input and output of an inverting amplifier (hereinafter referred to as an inverter) 1, and a series circuit of a resistor _R2 and a crystal 2 is inserted between the input and output as a feedback circuit. Capacitors C ₁ and C ₂ for frequency adjustment are added to the input and output terminals of this crystal, respectively. Such an oscillation circuit has good oscillation start characteristics and oscillation maintenance characteristics, and is easily integrated into an integrated circuit. However, it is difficult to mass-produce crystal oscillators used in oscillation circuits that have the same oscillation frequency, and each crystal oscillator usually has variations in oscillation frequency. On the other hand, quartz watches that are often used these days require high precision, especially
The problem is even down to the 1/1,000,000th of a second. In this case, variations in the oscillation frequency of the crystal resonator cannot be ignored. Therefore, a means for correcting this variation is provided, and this is capacitors C ₁ and C ₂ connected in parallel to crystal 2. By adjusting these and changing the input and output capacitance, the oscillation frequency can be corrected. is being carried out. Considering the impedance near the oscillation frequency of the crystal oscillator based on the equivalent circuit in Figure 2, the impedance Z is Then, ω ² L _x −1/C _x = 0

[Formula] Minimum when ω ² L _x −1/C _x 1/C _p

[Formula] Maximum. It becomes an inductance between these two frequencies and constitutes an oscillation circuit. Here, since the capacitors C ₁ and C ₂ connected to both ends of the crystal are naturally included in C ₀ , the oscillation frequency of the crystal resonator can be changed by changing the ratio of these C ₁ and C ₂ . The current common method is to change C ₁ to perform the correction. However, the feedback rate of this oscillation circuit is: output terminal voltage: V ₀ , crystal output capacitance:
C ₂ , input capacitance C ₁ , input terminal voltage: Vi, Vi
=C ₁ /C ₂ V ₀ . FIG. 3 shows a schematic diagram of the feedback circuit. As the value of the capacitor C ₁ is changed to approach 0, the amount of feedback decreases rapidly, and the apparent gain of the amplifier 1 can be reduced. Oscillators used in watches are required to have low power consumption, so the capacitance is
C ₁ is chosen as small as possible, thereby reducing the gain. Against this background, manufacturers are increasing the oscillation frequency of crystal resonators by capacitance.
Although C ₁ is adjusted and set to a predetermined frequency before shipping, some crystal resonators require capacitance C ₁ to be extremely small. In this case, when replacing the battery after purchasing the watch, the capacity
The drawback was that _C1 was too small to satisfy the oscillation conditions. That is, it becomes impossible to obtain the input applied voltage necessary to start oscillation, and the clock becomes unable to oscillate. In order to solve this problem,
It is necessary to select and use a crystal oscillator whose capacitance C ₁ has a relatively large value and whose oscillation frequency can be adjusted. However, such sorting is extremely disadvantageous for mass production and limits the types of crystal that can be used, resulting in many economical disadvantages. The present invention has been made in view of the above points, and it is an object of the present invention to provide an oscillation circuit that can stably start oscillation without having to select crystal oscillators and is highly suitable for mass production. The oscillation circuit of the present invention includes an inverting amplifier, a piezoelectric element inserted between its input and output, a bias resistor connected in parallel to the inverting amplifier, and provided at the input and output ends of the piezoelectric element, respectively. and a third capacitor means connected in parallel with the first capacitor means. During a predetermined period for starting oscillation, the third capacitor is connected to the first capacitor means. and switching means electrically connected to the first capacitor and electrically disconnected from the first capacitor during the oscillation continuation period. As a result, at the start of oscillation, the third capacitance means operates to create a large oscillation start voltage, and in a stable oscillation state, this is disconnected and oscillation operation can be performed with the gain determined by the first capacitance means. Therefore, even if a small capacitance value is selected as the first capacitor means, a large oscillation starting voltage can be obtained at the start of oscillation due to the influence of the third capacitor. Therefore, even if the first capacitor means is set to a capacitance value such that an oscillation start voltage cannot be obtained, oscillation can be reliably started. In other words, even piezoelectric elements with large variations can be put to practical use without having to select piezoelectric elements as in the past, and mass productivity is greatly improved. Further, the third capacitor is used only at the start of oscillation and is disconnected thereafter, so that power consumption does not increase. An embodiment of the present invention will be described below with reference to the drawings. Figure 4 is an example of an oscillation circuit using a high Q crystal resonator 3, where the crystal resonator 3 is a P channel.
MOS FET P ₁ and N-channel MOS FET N ₁ are each inserted in parallel into a complementary MOS inverter (C-MOS inverter) 4 connected in series.
A self-biasing resistor _R10 is connected between the input and output of the C-MOS inverter 4, and a crystal oscillator is connected between the output of the C-MOS inverter 4 and the crystal resonator 3 during low frequency oscillation (for example, 32kHz). An auxiliary resistor _R20 is added to stabilize the impedance of the vibrator. A capacitor C ₂₀ (20PF) with one end grounded is connected between this auxiliary resistor R ₂₀ and the crystal oscillator 3.
Between the crystal oscillator 3 and the input of the C-MOS inverter 4 is a variable capacitor C ₁₀ whose one end is also grounded.
(3 to 20PF) are connected. Furthermore, this capacity C ₁₀
is an N-channel type control MOS in which the capacitance C ₃₀ (3 to 4 PF) is gate-controlled by the clock φ in parallel with the
It is added with FET5. In this example, the circuit is configured as described above, and the control MOS is supplied with the clock φ only at the start of oscillation.
Make FET5 conductive and change the capacitance C ₃₀ electrically to the capacitance C ₁₀
After the oscillation starts, the control MOS FET 5 is cut off to electrically disconnect the capacitor C ₃₀ from the capacitor C ₁₀ for use. In FIG. 4, the capacitors C ₁₀ and C ₂₀ are used to finely adjust the oscillation frequency of the crystal resonator by selecting the ratio thereof. In the oscillation circuit shown in FIG. 4, since the Q of the crystal resonator is high, the oscillation start voltage must be selected to be sufficiently larger than the oscillation sustaining voltage. Now, if we change the variable capacitor C ₁₀ and set the value to, for example, 3PF in order to obtain the desired oscillation frequency depending on the characteristics of the crystal resonator, the value of the capacitor C ₁₀ will be too small and the gain will be low when the battery is replaced. If the voltage becomes too high, the oscillation condition (obtaining a predetermined oscillation starting voltage) cannot be satisfied, and oscillation becomes impossible. However, at this time the capacity C ₃₀
(3~4PF) to electrically connect to the capacitance C ₁₀ ,
By inputting the clock signal φ and making the control MOS FET 5 conductive, the apparent capacitance value can be increased, and the gain of the circuit at the time of starting oscillation can be increased. As a result, a sufficient oscillation starting voltage can be obtained, and oscillation can be reliably started. Furthermore, once oscillation occurs, by stopping the clock φ and disconnecting the capacitor C ₃₀ , the voltage applied to the input of the inverter 4 becomes low enough to maintain oscillation, allowing stable oscillation without increasing power consumption. can be sustained. Here, the clock φ may be controlled by using a clock circuit reset signal generated when the power supply voltage is supplied to supply the clock for a period sufficient to make the control MOS FET 5 conductive. Also, as shown in Figure 5, at the start of oscillation, P-
1 consisting of FET (P ₈ , P ₉ ) and N-FET (N ₈ , N ₉ )
Using stage inverter 7, after the oscillation reaches a stable state, P-FET (P ₄ , P ₅ , P ₆ , P ₇ ), N-FET
It is even more effective when applied to an oscillation circuit that switches to a three-stage inverter 6 (N ₄ , N ₅ , N ₆ , N ₇ ). In FIG. 5, parts with the same reference numerals as in FIG. 4 have the same functions as those in FIG. 4. In this case, the circuits for starting oscillation and maintaining oscillation can be easily switched using only the clock φ, and when switching to the single-stage inverter 7, the capacitance C _{30 is reliably changed to the capacitance C 30} .
Electrically connected to C ₁₀ . Even in this case, even if the gain is reduced due to the reduction of the capacitance _C10 on the input side due to frequency compensation, a voltage sufficient to start oscillation can be generated at the start of oscillation. Furthermore, when the oscillation stabilizes and switches to the 3-stage inverter 6, the capacitor C ₃₀ is disconnected by clock control, but since the gain of the 3-stage inverter 6 is larger than that of the 1-stage inverter 6, oscillation is maintained more stably. do. In Figure 4, an N-channel MOS FET is used as the clock control means, and in Figure 5, a complementary type MOS FET is used.
Although we have shown the case where MOS FETs are used, either method may be selected depending on the circuit configuration. Furthermore, the control capacitor C ₃₀ may be provided in parallel with the capacitor C ₂₀ . Furthermore, the gate oxide film capacitance of a MOS FET can also be used as the capacitor _C30 used at the start of oscillation. Furthermore, the present invention can be fully used not only as an oscillation circuit for watches but also as an oscillation circuit for calculators.

[Brief explanation of the drawing]

Figure 1 is a conventional crystal oscillation circuit diagram, Figure 2 is an equivalent circuit diagram of a crystal, Figure 3 is a schematic diagram of a feedback circuit, and Figure 4 is a diagram of a conventional crystal oscillation circuit.
The figure shows an oscillation circuit diagram showing one embodiment of the invention, and FIG. 5 shows an oscillation circuit diagram according to another embodiment of the invention. R ₁ , R ₂ ... Resistance, C ₁ , C ₂ , C ₁₀ , C ₂₀ ... Crystal load capacitance, 2, 4 ... Crystal oscillator, CoCx ...
Capacitance component inside the crystal, r _x ... resistance component inside the crystal, L _x ... inductance component inside the crystal,
N _1~9 ...N channel MOS FET, _P1 , _3~9 ...
...P channel MOS FET, 1, 3...Inverter, 5...Control FET, C ₃₀ ...Control capacity.

Claims (1)

[Claims] 1. an inverting amplifier, a series circuit of an oscillation element and a resistor connected between input and output terminals of the inverting amplifier, a first capacitive element connected between one end of the oscillation element and ground, and a series circuit of the oscillation element and a resistor; In an oscillation circuit having a second capacitive element connected between the other end and ground,
The capacitance value of the first capacitive element is reduced, and the capacitance value is equal to or greater than the capacitance of the first capacitive element between the one end of the oscillation element and the ground in parallel with the first capacitive element. A small third capacitive element and a switching element are connected in series, and the switching element is turned on only when oscillation starts to start oscillation using both the first and third capacitive elements, and thereafter the switching element is turned on. An oscillation circuit characterized by being turned off.