JPS6229989B2 - - Google Patents
Info
- Publication number
- JPS6229989B2 JPS6229989B2 JP21103881A JP21103881A JPS6229989B2 JP S6229989 B2 JPS6229989 B2 JP S6229989B2 JP 21103881 A JP21103881 A JP 21103881A JP 21103881 A JP21103881 A JP 21103881A JP S6229989 B2 JPS6229989 B2 JP S6229989B2
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- transformer
- input
- terminal
- diode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000010355 oscillation Effects 0.000 claims description 8
- 238000010586 diagram Methods 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 1
- 239000000284 extract Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/22—Conversion of DC power input into DC power output with intermediate conversion into AC
- H02M3/24—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
- H02M3/28—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
- H02M3/325—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Description
【発明の詳細な説明】
この発明は、２つの入力端子に互いに逆極性の
関係にあるプラスとマイナスの電圧を加え、出力
にはプラスかまたはマイナスの高圧を取り出す高
圧発生回路についてのものである。[Detailed Description of the Invention] This invention relates to a high voltage generation circuit that applies positive and negative voltages with opposite polarities to two input terminals and outputs a positive or negative high voltage as an output. .
低圧の直流電源から高圧を発生させるには、
DC―DCコンバータなどを利用する。 To generate high voltage from a low voltage DC power supply,
Use a DC-DC converter, etc.
この発明はDC―DCコンバータの原理を応用し
たもので、２つの昇圧トランスをもつ自励発振回
路を互いに逆極性の関係にある２つの入力電圧で
制御し、入力電圧の極性に対応してプラスかまた
はマイナスの高圧を取り出すものである。 This invention is an application of the principle of a DC-DC converter, in which a self-excited oscillation circuit with two step-up transformers is controlled by two input voltages with opposite polarities, and the voltage is increased depending on the polarity of the input voltage. or extracts negative high pressure.
以下、図面によりこの発明を詳細に説明する。 Hereinafter, this invention will be explained in detail with reference to the drawings.
まず、この発明による実施例の構成図を第１図
に示す。図で、１と２は入力端子、３は出力端
子、４と５は昇圧用のトランス、６と７はトラン
ジスタ、８〜１３はダイオードであり、２つのト
ランス４，５と２つのトランジスタ６，７が主要
部を構成する。 First, a block diagram of an embodiment according to the present invention is shown in FIG. In the figure, 1 and 2 are input terminals, 3 is an output terminal, 4 and 5 are step-up transformers, 6 and 7 are transistors, 8 to 13 are diodes, two transformers 4 and 5, two transistors 6, 7 constitutes the main part.
入力端子１，２には互いに逆の関係にあるプラ
スまたはマイナスの電圧を加える。例えば入力端
子１に＋20Vを加えたときは、入力端子２には−
20Vを加える。入力端子１，２に加える電圧は連
続して可変することができ、両方を同時に0Vに
してもよい。 Positive or negative voltages having an opposite relationship to each other are applied to input terminals 1 and 2. For example, when +20V is applied to input terminal 1, -
Add 20V. The voltages applied to input terminals 1 and 2 can be varied continuously, and both may be set to 0V at the same time.
入力端子１，２はそれぞれトランス４，５の入
力側の中点４０，５０に接続される。 Input terminals 1 and 2 are connected to midpoints 40 and 50 on the input sides of transformers 4 and 5, respectively.
トランジスタ６，７は互いのコレクタとベース
をそれぞれ抵抗１４，１５を介して「たすきが
け」状に接続される。 The transistors 6 and 7 have their collectors and bases connected to each other in a "cross-over" manner via resistors 14 and 15, respectively.
ダイオード８〜１１は、入力端子１，２に加え
る電圧が両方同時に0Vでないときに、トランス
４，５の端子４０→４１、４０→４２および５０
→５１、５０→５２を通して流れる電流を阻止
し、入力端子１，２に加える電圧の大きさに比例
するスイツチング電圧をトランス４，５にそれぞ
れ独立に供給するためのものである。 Diodes 8 to 11 connect terminals 40 to 41, 40 to 42 and 50 of transformers 4 and 5 when the voltages applied to input terminals 1 and 2 are not 0V at the same time.
This is for blocking the current flowing through →51, 50→52 and supplying switching voltages proportional to the magnitude of the voltages applied to input terminals 1 and 2 to transformers 4 and 5 independently.
ダイオード１２，１３はトランス４，５の出力
整流用で、互いの極性が逆になるようにして端子
４３，５４に接続する。 The diodes 12 and 13 are for output rectification of the transformers 4 and 5, and are connected to the terminals 43 and 54 so that their polarities are opposite to each other.
また、抵抗１６，１７はトランジスタ６，７の
コレクタ遮断電流の吸収用、抵抗１８，１９はダ
イオード１２，１３からの互いに逆極性の整流電
圧を合成して出力端子３に供給するためのもので
ある。 Further, resistors 16 and 17 are for absorbing the collector cut-off current of transistors 6 and 7, and resistors 18 and 19 are for combining rectified voltages of opposite polarity from diodes 12 and 13 and supplying the result to output terminal 3. be.
トランス４，５の出力端子４４，５３は接続さ
れ、トランジスタ６，７のエミツタにはＶEの電
圧が供給される。 The output terminals 44 and 53 of the transformers 4 and 5 are connected, and the emitters of the transistors 6 and 7 are supplied with the voltage V E .
第１図は、トランジスタ６，７をトランス４，
５に並列に接続した自励発振回路を構成してお
り、ＶEの電圧に対する入力端子１，２の電圧で
トランス４，５の出力電圧を制御するものであ
る。発振周波数はトランス４，５のインダクタン
スと線間容量で決まり、通常は数十ｋHzである。 In FIG. 1, transistors 6 and 7 are connected to a transformer 4,
A self-excited oscillation circuit is constructed by connecting the transformers 4 and 5 in parallel, and the output voltages of the transformers 4 and 5 are controlled by the voltages of the input terminals 1 and 2 relative to the voltage of V E . The oscillation frequency is determined by the inductance and line capacitance of the transformers 4 and 5, and is usually several tens of kHz.
なお、出力電圧は端子３と端子２０の間から取
り出す。 Note that the output voltage is taken out between the terminal 3 and the terminal 20.
次に、第１図の動作を説明する。 Next, the operation shown in FIG. 1 will be explained.
入力端子１の電圧をE1、入力端子２の電圧を
E2、トランス４の入力端子４０，４１間および
４０，４２間の電圧をV1、トランス５の入力端
子５０，５１間および５０，５２間の電圧をV2
とする。 The voltage at input terminal 1 is E 1 and the voltage at input terminal 2 is
E 2 , the voltage between the input terminals 40, 41 and 40, 42 of the transformer 4 is V 1 , and the voltage between the input terminals 50, 51 and 50, 52 of the transformer 5 is V 2
shall be.
また、トランス４の出力端子４３の電圧を
E3、トランス５の出力端子５４の電圧をE4、出
力端子３の電圧をE0とする。 Also, the voltage at the output terminal 43 of the transformer 4 is
E 3 , the voltage at the output terminal 54 of the transformer 5 is E 4 , and the voltage at the output terminal 3 is E 0 .
第１図から各電圧の間には次の関係が成立す
る。 From FIG. 1, the following relationship holds between each voltage.
V1＝E1−ＶE ……(1)
V2＝E2−ＶE ……(2)
E0＝（E3−E4）／２ ……(3)
いま、ＶE＝−20V、E1＝＋20V、E2＝−20Vと
すれば、式(1)，(2)から、V1＝40V、V2＝0Vとな
る。 V 1 = E 1 − V E ……(1) V 2 = E 2 − V E ……(2) E 0 = (E 3 − E 4 )/2…(3) Now, V E = −20V , E 1 = +20V, E 2 = -20V, then from equations (1) and (2), V 1 = 40V and V 2 = 0V.
したがつて、発振はトランス４とトランジスタ
６，７の間で行われ、トランス４にはプラスの出
力電圧E3が出るが、トランス５の出力電圧E4＝
０である。そして、出力端子３の電圧E0は式(3)
からE3／２になる。 Therefore, oscillation occurs between the transformer 4 and the transistors 6 and 7, and a positive output voltage E 3 is output from the transformer 4, but the output voltage E 4 of the transformer 5 =
It is 0. Then, the voltage E 0 of output terminal 3 is calculated by formula (3)
becomes E 3 /2.
逆に、E1＝−20V、E2＝＋20Vにすれば、V1＝
０、V2＝＋40Vになり、発振はトランス５とトラ
ンジスタ６，７間で行われ、出力電圧E0＝−
E4／２になる。 Conversely, if E 1 = -20V and E 2 = +20V, V 1 =
0, V 2 = +40V, oscillation occurs between transformer 5 and transistors 6 and 7, and output voltage E 0 = -
E 4 /2.
E1，E2のどちらか片方または両方がＶEと異な
る電圧で、V1＞０、V2＞０のどちらか１つ以上
を満足するときにトランス４，５とトランジスタ
６，７の間で発振が行われる。 When one or both of E 1 and E 2 is at a voltage different from V E and satisfies one or more of V 1 > 0 and V 2 > 0, between transformers 4 and 5 and transistors 6 and 7. oscillation occurs.
したがつて、E1，E2を連続的に変化させてい
けば、E0をプラスとマイナスの間で連続的に変
えていくことができる。 Therefore, if E 1 and E 2 are continuously changed, E 0 can be continuously changed between plus and minus.
出力電圧E0の値はトランス４，５の昇圧比で
決まるが、通常2000〜3000Vは容易に得られる。 The value of the output voltage E 0 is determined by the step-up ratio of the transformers 4 and 5, and usually 2000 to 3000V can be easily obtained.
なお、例としてＶE＝−20Vの場合を説明した
が、ＶE＝＋20Vにすることもできる。この場合
は、トランジスタ６，７をNPNからPNPに変え
るとともに、ダイオード８〜１１の極性を逆にす
ればよい。 Although the case where V E =-20V has been described as an example, it is also possible to set V E =+20V. In this case, the transistors 6 and 7 may be changed from NPN to PNP, and the polarities of the diodes 8 to 11 may be reversed.
以上のようにこの発明によれば、２つのトラン
スをもつ自励発振回路の出力を入力電圧で制御す
るので、プラスまたはマイナスの高圧を連続的に
取り出すことができる。 As described above, according to the present invention, since the output of the self-excited oscillation circuit having two transformers is controlled by the input voltage, positive or negative high voltage can be continuously extracted.
第１図はこの発明による実施例の構成図。
１，２…入力端子、３…出力端子、４，５…ト
ランス、６，７…トランジスタ、８〜１３…ダイ
オード、１４〜１９…抵抗、４０〜４４…トラン
ス４の端子、５０〜５４…トランス５の端子、２
０…出力端子。
FIG. 1 is a configuration diagram of an embodiment according to the present invention. 1, 2... Input terminal, 3... Output terminal, 4, 5... Transformer, 6, 7... Transistor, 8-13... Diode, 14-19... Resistor, 40-44... Terminal of transformer 4, 50-54... Transformer 5 terminals, 2
0...Output terminal.
Claims (1)
子１と、 入力端子１の電圧と極性が逆の関係にあるマイ
ナスまたはプラスの電圧を加える入力端子２と、 入力端子１の電圧を入力側の中点４０に接続す
るトランス４と、 入力端子２の電圧を入力側の中点５０に接続す
るトランス５と、 コレクタとベースを相互に抵抗を介して接続す
るトランジスタ６，７と、 トランス４の入力端子４１とトランジスタ６の
間に接続するダイオード８と、 トランス５の入力端子５１とトランジスタ６の
間に接続するダイオード９と、 トランス４の入力端子４２とトランジスタ７の
間に接続するダイオード１０と、 トランス５の入力端子５２とトランジスタ７の
間に接続するダイオード１１と、 トランス４の出力端子４３と出力端子３の間に
直列に接続するダイオード１２と抵抗１８と、 トランス５の出力端子５４と出力端子３の間に
ダイオード１２と極性が逆になるように直列に接
続するダイオード１３と抵抗１９とを備え、 トランス４の出力端子４４とトランス５の出力
端子５３を接続し、 トランジスタ６，７のエミツタにＶEの電圧を
加え、 トランス４，５、トランジスタ６，７、ダイオ
ード８〜１１で構成する発振回路を入力端子１，
２の入力電圧で制御し、入力端子１，２の入力電
圧の極性に対応して出力端子３にプラスまたはマ
イナスの高圧を取り出すことを特徴とする高圧発
生回路。[Claims] 1. An input terminal 1 to which a positive or negative voltage is applied, an input terminal 2 to which a negative or positive voltage whose polarity is opposite to that of the voltage at the input terminal 1 is applied, and a voltage at the input terminal 1. A transformer 4 connected to a midpoint 40 on the input side, a transformer 5 connecting the voltage of the input terminal 2 to a midpoint 50 on the input side, and transistors 6 and 7 connecting the collector and base to each other via a resistor. A diode 8 is connected between the input terminal 41 of the transformer 4 and the transistor 6, a diode 9 is connected between the input terminal 51 of the transformer 5 and the transistor 6, and a diode 9 is connected between the input terminal 42 of the transformer 4 and the transistor 7. A diode 10, a diode 11 connected between the input terminal 52 of the transformer 5 and the transistor 7, a diode 12 and a resistor 18 connected in series between the output terminal 43 of the transformer 4 and the output terminal 3, and the output of the transformer 5. A diode 13 and a resistor 19 are connected in series between the terminal 54 and the output terminal 3 so that the polarity is opposite to that of the diode 12, and the output terminal 44 of the transformer 4 and the output terminal 53 of the transformer 5 are connected. A voltage of V E is applied to the emitters 6 and 7, and an oscillation circuit consisting of transformers 4 and 5, transistors 6 and 7, and diodes 8 to 11 is connected to input terminals 1 and 7.
1. A high voltage generating circuit that is controlled by an input voltage of 2 and outputs a positive or negative high voltage to an output terminal 3 in accordance with the polarity of the input voltages of input terminals 1 and 2.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21103881A JPS58116069A (en) | 1981-12-28 | 1981-12-28 | High voltage generator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21103881A JPS58116069A (en) | 1981-12-28 | 1981-12-28 | High voltage generator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58116069A JPS58116069A (en) | 1983-07-11 |
| JPS6229989B2 true JPS6229989B2 (en) | 1987-06-30 |
Family
ID=16599333
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP21103881A Granted JPS58116069A (en) | 1981-12-28 | 1981-12-28 | High voltage generator |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58116069A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0847251A (en) * | 1994-07-29 | 1996-02-16 | Internatl Business Mach Corp <Ibm> | Switching regulator,information processor and its control method |
-
1981
- 1981-12-28 JP JP21103881A patent/JPS58116069A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58116069A (en) | 1983-07-11 |
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