JPS6230407B2 - - Google Patents
Info
- Publication number
- JPS6230407B2 JPS6230407B2 JP9806678A JP9806678A JPS6230407B2 JP S6230407 B2 JPS6230407 B2 JP S6230407B2 JP 9806678 A JP9806678 A JP 9806678A JP 9806678 A JP9806678 A JP 9806678A JP S6230407 B2 JPS6230407 B2 JP S6230407B2
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- scanning
- state
- rectangular wave
- display
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004973 liquid crystal related substance Substances 0.000 claims description 14
- 238000000034 method Methods 0.000 claims description 14
- 239000011159 matrix material Substances 0.000 claims description 8
- 230000003098 cholesteric effect Effects 0.000 claims description 5
- 230000007704 transition Effects 0.000 description 7
- 230000000694 effects Effects 0.000 description 3
- HVYWMOMLDIMFJA-DPAQBDIFSA-N cholesterol Chemical compound C1C=C2C[C@@H](O)CC[C@]2(C)[C@@H]2[C@@H]1[C@@H]1CC[C@H]([C@H](C)CCCC(C)C)[C@@]1(C)CC2 HVYWMOMLDIMFJA-DPAQBDIFSA-N 0.000 description 2
- 230000003068 static effect Effects 0.000 description 2
- 238000009825 accumulation Methods 0.000 description 1
- 235000012000 cholesterol Nutrition 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 235000015243 ice cream Nutrition 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
Landscapes
- Liquid Crystal (AREA)
- Liquid Crystal Display Device Control (AREA)
Description
【発明の詳細な説明】
本発明は、低電圧駆動が可能な、しかも書き込
み時間を短縮できる垂直配向処理が施されている
コレステリツク―ネマチツク相転移型マトリツク
ス表示液晶パネルの駆動方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for driving a cholesteric nematic phase change type matrix display liquid crystal panel that can be driven at low voltage and is subjected to vertical alignment treatment that can shorten writing time.
垂直配向処理が施されているコレステリツク―
ネマチツク相転移型の電気光学効果を利用したマ
トリツクス表示液晶パネルは、電界効果―ねじれ
ネマチツク型の電気光学効果を利用したマトリツ
クス表示液晶パネルに比べ(1)表示が蓄積される機
能を有すること、(2)走査電極数を多くとれるこ
と、(3)視角特性が良いこと、この理由で優れてい
る。前記、コレステリツク―ネマチツク相転移型
の電気光学効果について説明する。第１図は、こ
の型の電圧―透過光強度静特性を示したものであ
り、１の状態は、液晶分子が渦状ドメインを形成
し、２及び４の状態は、液晶分子がフオーカル・
コニツク配向をし、３―１及び３―２の状態は、
液晶分子が電極面に対し垂直な配向をしている。
図で、電圧ＶHは、コレステリツク相からネマチ
ツク相へ相転移型する閾値電圧である。１及び４
の状態は、表示が蓄積される状態であるが、１の
状態から４の状態へ、あるいは４の状態から１の
状態へ蓄積状態を変更する場合について述べる。
液晶伏子にＶH以上の電圧を印加して１あるいは
４の状態から３―１の状態へ移行させる。３―１
の状態で、液晶分子に印加されている電圧を数
msec〜10数msecの時間０にした後、電圧Ｖを印
加すれば、３―１の状態から２の状態へすみやか
に移行する。電圧を０にする時間は、ネマチツク
相からコレステリツク相への相転移型時間以上に
する。３―１の状態で電圧をＶに減少すれば、３
―２の状態を経て、２の状態へ移行するが、Ｖ／
ＶH0.7以上にとれば、長時間（数秒間）３―２
の状態にとどまる。３―２の状態及び２の状態で
電圧をＶから０にすれば、各々１及び４の状態へ
移行し、蓄積される。 Cholesterol ice cream with vertical alignment treatment
A matrix display liquid crystal panel that uses a nematic phase transition type electro-optic effect has the following advantages compared to a matrix display liquid crystal panel that uses a field effect-twisted nematic type electro-optic effect: 2) The number of scanning electrodes can be increased, and (3) viewing angle characteristics are good. The electro-optic effect of the cholesteric-nematic phase transition type mentioned above will be explained. Figure 1 shows the voltage-transmitted light intensity static characteristics of this type. In state 1, the liquid crystal molecules form a spiral domain, and in states 2 and 4, the liquid crystal molecules form a focal domain.
With Konik orientation, the states of 3-1 and 3-2 are
Liquid crystal molecules are oriented perpendicular to the electrode plane.
In the figure, voltage V H is a threshold voltage for phase transition from cholesteric phase to nematic phase. 1 and 4
The state shown in FIG. 1 is a state in which displays are accumulated, but the case where the accumulation state is changed from state 1 to state 4 or from state 4 to state 1 will be described.
A voltage higher than V H is applied to the liquid crystal cover to shift from state 1 or 4 to state 3-1. 3-1
The voltage applied to the liquid crystal molecules in the state of
If the voltage V is applied after setting the state to 0 for a period of msec to 10-odd msec, the state 3-1 quickly shifts to the state 2. The time for reducing the voltage to zero is set to be longer than the phase transition time from the nematic phase to the cholesteric phase. If the voltage is reduced to V in the state of 3-1, 3
-2 state and then transition to state 2, but V/
If V H is 0.7 or more, it will last for a long time (several seconds) 3-2
remain in the state of If the voltage is changed from V to 0 in state 3-2 and state 2, the voltage shifts to state 1 and 4, respectively, and is accumulated.
従来、行なわれている駆動方法につて以下に述
べる。マトリツクス表示は、列電極群と行電極群
を交叉させて、交叉部の液晶分子に電圧を印加し
て、ドツト状に表示するものである。行電極群を
線順次走査した場合、走査時の行電極上の表示ド
ツトが１の状態あるいは４の状態で蓄積されるか
によつて列電極群に印加する電圧の位相を変え
る。最初に、１の状態あるいは４の状態で蓄積さ
れている表示を消去するため、行電極群と列電極
群に、各々波高値Ｖ、デユーテイ１の交流パルス
電圧を互いに逆位相になる様に印加する。全表示
ドツトには、波高値2V、デユーテイ１の交流パ
ルス電圧が印加され、2VＶHにすることによ
り、３―１の状態へ移行する。３―１の状態で表
示の書き込みをはじめるが、この書き込む電圧を
第２図に示す。図において、５―Ｓ、５―nS、
は行電極に、６―Ｓ、６―nSは列電極に印加さ
れる電圧を示す。５―Ｓは、走査時の行電極に印
加される波高値Ｖデユーテイ１の交流パルス電圧
を２―nSは非走査時の行電極に印加される電圧
０を示す。行電極の一本当りの走査時間は、数
msec〜10数msecである。６―Ｓは、走査時の行
電極上の表示ドツトで、２の状態にするために列
電極に印加される波高値Ｖ、デユーテイ１の交流
パルス電圧を、６―nSは、走査時の行電極上の
表示ドツトで、全表示ドツトの書き込みが終了す
るまで３―２の状態を維持するために、列電極に
印加される波高値Ｖ、デユーテイ１の交流パルス
電圧を示す。表示を書き込む間、選択表示ドツト
（４の状態で蓄積されるドツト）は、走査時に電
圧７が印加され、非走査時に電圧９―１あるいは
９―２が印加される。非選択表示ドツト（１の状
態で蓄積されるドツト）は、走査時に電圧８が印
加され、非走査時に電圧９―１あるいは９―２が
印加される。書き込み終了後、行電極群及び列電
極群に印加される電圧を０にすれば、表示ドツト
は、４又は１の状態へ移行し蓄積される。波高値
Ｖは、非選択表示ドツトが、表示の書き込み時間
中３―２の状態に保つ必要から0.7≦Ｖ／ＶHに設
定される。又、表示の書き込み時間は、前述の走
査時間に対応するが、この走査時間は、走査時直
前に表示ドツトに印加される電圧Ｖが低いほど短
くなる。以上、従来の駆動手段につて記述した
が、この駆動手段では、Ｖ／ＶH≧0.7で制約をう
けるので、書き込み時間の短縮及び低電圧駆動に
は、限度がある。 Conventionally used driving methods will be described below. In matrix display, a column electrode group and a row electrode group intersect and a voltage is applied to the liquid crystal molecules at the intersection to display a dot-like image. When the row electrode group is line-sequentially scanned, the phase of the voltage applied to the column electrode group is changed depending on whether display dots on the row electrodes are accumulated in the 1 state or the 4 state during scanning. First, in order to erase the display accumulated in state 1 or state 4, AC pulse voltages with peak value V and duty 1 are applied to the row electrode group and column electrode group, respectively, so that they are in opposite phases to each other. do. An AC pulse voltage with a peak value of 2V and a duty of 1 is applied to all display dots, and by setting the voltage to 2VVH , a transition is made to the state 3-1. Writing of the display starts in the state 3-1, and the voltage for this writing is shown in FIG. In the figure, 5-S, 5-nS,
indicates the voltage applied to the row electrode, and 6-S and 6-nS indicate the voltage applied to the column electrode. 5-S indicates an AC pulse voltage of peak value V duty 1 applied to the row electrode during scanning, and 2-nS indicates voltage 0 applied to the row electrode during non-scanning. The scanning time for one row electrode is several
msec to 10-odd msec. 6-S is the display dot on the row electrode during scanning, and 6-nS is the AC pulse voltage of peak value V and duty 1 applied to the column electrode to make the state 2. 6-nS is the display dot on the row electrode during scanning. The figure shows an AC pulse voltage with peak value V and duty 1 applied to the column electrode in order to maintain the state 3-2 on the display dots on the electrodes until the writing of all display dots is completed. While writing the display, voltage 7 is applied to the selected display dots (dots accumulated in state 4) during scanning, and voltage 9-1 or 9-2 is applied during non-scanning. To non-selected display dots (dots accumulated in a state of 1), voltage 8 is applied during scanning, and voltage 9-1 or 9-2 is applied during non-scanning. After writing is completed, when the voltage applied to the row electrode group and the column electrode group is set to 0, the display dots shift to the 4 or 1 state and are accumulated. The peak value V is set to 0.7≦V/V H because it is necessary to maintain the non-selected display dots in the 3-2 state during the display writing time. The display writing time corresponds to the above-mentioned scanning time, and this scanning time becomes shorter as the voltage V applied to the display dots immediately before scanning is lower. The conventional driving means has been described above, but since this driving means is limited by V/V H ≧0.7, there is a limit to the shortening of writing time and low voltage driving.
本発明の目的は、従来の駆動方法に比べ、書き
込み時間を短縮でき、且つ、低電圧駆動ができる
マトリツクス表示液晶パネルの駆動方法を提供す
ることにある。 SUMMARY OF THE INVENTION An object of the present invention is to provide a method for driving a matrix display liquid crystal panel that can shorten writing time and drive at a lower voltage than conventional driving methods.
本発明は、垂直配向処理が施されているコレス
テリツク―ネマチツク相転移型マトリクス表示液
晶パネルの線順次走査による駆動方法において、
走査時の行電極に、第１の矩形波を印加し、非走
査時の行電極群に走査直前の20〜30msecの間、
０ボルトを印加し、20〜30msecの時間を除く、
非走査時の行電極群に、前記第１の矩形波の周波
数の３倍の周波数の第２の矩形波を印加し、列電
極群には走査時の行電極との交点が選択ドツトの
場合、前記第１の矩形波を、非選択ドツトの場
合、前記第１の矩形波にに対し位相を2/3πずら
した第３の矩形波を印加することを特徴としてい
る。 The present invention provides a method for driving a cholesteric nematic phase change type matrix display liquid crystal panel subjected to vertical alignment treatment by line sequential scanning.
The first rectangular wave is applied to the row electrodes during scanning, and the first rectangular wave is applied to the row electrode group during non-scanning for 20 to 30 msec immediately before scanning.
Apply 0 volts, except for 20 to 30 msec,
When a second rectangular wave with a frequency three times the frequency of the first rectangular wave is applied to the row electrode group during non-scanning, and the intersection with the row electrode during scanning is a selected dot to the column electrode group. , when the first rectangular wave is a non-selected dot, a third rectangular wave whose phase is shifted by 2/3π with respect to the first rectangular wave is applied.
以下、本発明について、実施例を用い詳説す
る。実施例では、交流パルス電圧による駆動方法
について述べる。最初に１の状態あるいは４の状
態で蓄積されている表示を消去するため、行電極
群と列電極群に各々波高値V1、デユーテイ１の
交流パルス電圧を互いに逆位相になる様に印加す
る。この結果全表示ドツトには、波高値2V1、デ
ユーテイ１の交流パルス電圧が印加され、2V1≧
ＶHにすることにより３―１の状態へ移行する。
３―１の状態で表示を書き込みはじめるが、この
書き込み電圧を第３図に示す。図において、１０
―Ｓ、１０―nS、１１は行電極に、１２―ｓ１
２―nSは列電極に印加される電圧である。１０
―Ｓは、走査時の行電極に印加される波高値
V1、デユーテイ１の交流パルス電圧を示し、１
０―nSは、非走査時の行電極に印加される波高
値V1、デユーテイ１周波数が１０―Ｓの３倍の
交流パルス電圧を示しているが、行電極が走査さ
れる直前の20〜30msecの一定時間１０―nSの電
圧でなく１１の電圧０をその行電極に印加する。
１２―Ｓは、走査時の行電極上の表示ドツトが、
２の状態にするために列電極に印加される波高値
V1、デユーテイ１の交流パルス電圧を、１２―
nSは、走査時の行電極上の表示ドツトが、全表
示ドツトの書き込み終了迄３―２の状態を維持す
るために列電極に印加される波高値V1、デユー
テイ１の交流パルス電圧を示す。１２―Ｓは１０
―Ｓと同位相であり、１２―nSは１０―nSに対
し2/3π位相が進んでいる。これら１０―Ｓ、１
０―nS、１１、１２―Ｓ、１２―nSを組合せた
電圧が、各表示ドツトに印加されることになる。
すなわち、表示を書き込む間、選択表示ドツト
（２の状態で蓄積されるドツト）は、走査時に電
圧１４が印加され、非走査時には、走査時直前の
20〜30msecの一定時間電圧１３―１又は１３―
２が印加され、それ以外非走査時には、電圧１６
―１又は１６―２が印加される。一方、非選択表
示ドツト（４の状態で蓄積されるドツト）は、走
査時に電圧１５が印加され、非走査時には、走査
時直前の20〜30msecの一定時間電圧１３―１又
は１３―２が印加され、それ以外の非走査時には
電圧１６―１又は１６―２が印加される。この実
施例において、V1を1/2ＶHにする。この場合、
非選択表示ドツトに印加される電圧は、走査時直
前の20〜30msecを除いて、√８３V1即ち、
0.816VHとなるので、非選択表示ドツトは、書き
込み終了迄、３―２の状態に保つことができる。
一方、選択表示ドツトは、走査時直前の20〜
30msecの間、印加電圧が0.5VHになるので、従来
の駆動方法に比べ、一本当りの走査時間が半分に
なる。（V1／ＶHが0.5と0.7では、走査時間は、倍
異なる。）
以上、本発明について、実施例を用い説明した
が従来の駆動方法では、駆動電圧が0.7VH以上で
あつたのに対し、本発明の駆動方法では、駆動電
圧が0.5VH以上であるので、従来の駆動方法に比
べ本発明の駆動方法によれば、書き込み時間が半
分に短縮でき、且つ、駆動電圧が30％低くでき
る。 Hereinafter, the present invention will be explained in detail using examples. In the embodiment, a driving method using AC pulse voltage will be described. First, in order to erase the display accumulated in state 1 or state 4, AC pulse voltages of peak value V 1 and duty 1 are applied to the row electrode group and column electrode group respectively so that they are in opposite phases to each other. . As a result, an AC pulse voltage with a peak value of 2V 1 and a duty of 1 is applied to all displayed dots, and 2V 1 ≧
By setting VH , the state shifts to 3-1.
Writing of the display starts in the state 3-1, and the writing voltage is shown in FIG. In the figure, 10
-S, 10-nS, 11 to row electrode, 12-s1
2-nS is the voltage applied to the column electrodes. 10
-S is the peak value applied to the row electrode during scanning
V 1 indicates an AC pulse voltage with a duty of 1;
0-nS indicates an AC pulse voltage with a peak value V 1 and duty 1 frequency three times that of 10-S applied to the row electrode during non-scanning, but 20-nS just before the row electrode is scanned. A voltage of 11 0 instead of a voltage of 10-nS is applied to that row electrode for a fixed period of 30 msec.
12-S, the display dots on the row electrodes during scanning are
The peak value applied to the column electrode to bring it into state 2
V 1 , duty 1 AC pulse voltage, 12-
nS indicates an AC pulse voltage with peak value V 1 and duty 1 that is applied to the column electrode in order to maintain the display dots on the row electrodes in the 3-2 state during scanning until the writing of all display dots is completed. . 12-S is 10
-S is in the same phase, and 12-nS is 2/3π phase ahead of 10-nS. These 10-S, 1
A combined voltage of 0-nS, 11-, 12-S, and 12-nS will be applied to each display dot.
That is, while writing the display, the voltage 14 is applied to the selected display dots (dots accumulated in state 2) during scanning, and during non-scanning, the voltage 14 is applied to the selected display dots (dots accumulated in state 2).
Voltage 13- 1 or 13- for a certain period of 20 to 30 msec
2 is applied, and during non-scanning, a voltage of 16
-1 or 16-2 is applied. On the other hand, for non-selected display dots (dots accumulated in state 4), voltage 15 is applied during scanning, and during non-scanning, voltage 13-1 or 13-2 is applied for a certain period of 20 to 30 msec immediately before scanning. During non-scanning, voltage 16-1 or 16-2 is applied. In this example, V 1 is made 1/2V H. in this case,
The voltage applied to the non-selected display dots is √83V 1 , that is, except for 20 to 30 msec immediately before scanning.
Since the voltage becomes 0.816V H , the non-selected display dot can be kept in the 3-2 state until the writing is completed.
On the other hand, the selected display dot is from 20 to 20 just before scanning.
Since the applied voltage is 0.5V H for 30msec, the scanning time per line is halved compared to the conventional driving method. (When V 1 /V H is 0.5 and 0.7, the scanning time is twice as different.) The present invention has been explained above using examples, but in the conventional driving method, the driving voltage was 0.7 V H or more. On the other hand, in the driving method of the present invention, since the driving voltage is 0.5V H or more, the writing time can be reduced by half compared to the conventional driving method, and the driving voltage is 30 V H. % can be lowered.
以上、本発明について、実施例により詳説した
が、実施例では、交流パルス電圧により、１３―
１、１３―２、１４、１５、１６―１、１６―２
の駆動電圧を発生させたが、別の方法でもこれら
の電圧を発生させることができる。例えば、直流
パルス電圧を行電極列電極に印加しても発生でき
る。 As above, the present invention has been explained in detail with reference to examples. In the examples, 13-
1 , 13- 2 , 14, 15, 16- 1 , 16- 2
driving voltages, but these voltages can also be generated in other ways. For example, it can be generated by applying a DC pulse voltage to the row and column electrodes.
第１図は、コレステリツク―ネマチツク相転移
型液晶パネルの電気光学特性を説明するための電
圧―透過光強度静特性を、第２図は、従来の駆動
方法が発生する電圧を第３図は、本発明を説明す
るための実施例の駆動方法が発生する電圧を示す
図。
７，８，１４，１５は走査時の表示ドツトに印
加される電圧、９―１，９―２，１３―１，１３
―２，１６―１，１６―２は、非走査時の表示ド
ツトに印加される電圧。
Figure 1 shows the voltage-transmitted light intensity static characteristics to explain the electro-optical characteristics of the cholesteric-nematic phase transition type liquid crystal panel, and Figure 2 shows the voltage generated by the conventional driving method. FIG. 3 is a diagram showing voltages generated by a driving method according to an embodiment for explaining the present invention. 7, 8, 14, 15 are voltages applied to display dots during scanning, 9-1, 9-2, 13-1, 13
-2, 16-1, 16-2 are voltages applied to display dots during non-scanning.
Claims (1)
―ネマチツク相転移型マトリクス表示液晶パネル
の線順次走査による駆動方法において、走査時の
行電極に、第１の矩形波を印加し、非走査時の行
電極群に走査直前の20〜30msecの間、０ボルト
を印加し、前記20〜30msecの時間を除く、非走
査時の行電極群に、前記第１の矩形波の周波数の
３倍の周波数の第２の矩形波を印加し、列電極群
には、走査時の行電極との交点が選択ドツトの場
合、前記第１の矩形波を、非選択ドツトの場合、
前記第１の矩形波に対し、位相を2/3πずらした
第３の矩形波を印加することを特徴とするマトリ
ツクス表示液晶パネルの駆動方法。1. In a method of driving a cholesteric nematic phase change matrix display liquid crystal panel subjected to vertical alignment treatment by line sequential scanning, a first rectangular wave is applied to the row electrodes during scanning, and the row electrodes during non-scanning are A voltage of 0 volts is applied to the group for 20 to 30 msec immediately before scanning, and a voltage of 3 times the frequency of the first rectangular wave is applied to the row electrode group during non-scanning, excluding the 20 to 30 msec period. When the intersection with the row electrode during scanning is a selected dot, the first rectangular wave is applied to the column electrode group, and when it is an unselected dot, the first rectangular wave is applied to the column electrode group.
A method for driving a matrix display liquid crystal panel, characterized in that a third rectangular wave whose phase is shifted by 2/3π with respect to the first rectangular wave is applied.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9806678A JPS5525075A (en) | 1978-08-10 | 1978-08-10 | Driving matrix display liquid crystal panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9806678A JPS5525075A (en) | 1978-08-10 | 1978-08-10 | Driving matrix display liquid crystal panel |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5525075A JPS5525075A (en) | 1980-02-22 |
| JPS6230407B2 true JPS6230407B2 (en) | 1987-07-02 |
Family
ID=14209949
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9806678A Granted JPS5525075A (en) | 1978-08-10 | 1978-08-10 | Driving matrix display liquid crystal panel |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5525075A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001138656A (en) | 1999-11-10 | 2001-05-22 | Fuji Photo Film Co Ltd | Concentrated dampening water composition for lithographic printing |
| JP2003170673A (en) | 2001-09-28 | 2003-06-17 | Fuji Photo Film Co Ltd | Dampening water composition for lithographic printing plate and method of lithographic printing |
-
1978
- 1978-08-10 JP JP9806678A patent/JPS5525075A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5525075A (en) | 1980-02-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5267065A (en) | Liquid crystal apparatus | |
| US6703995B2 (en) | Bistable chiral nematic liquid crystal display and method of driving the same | |
| JP2652886B2 (en) | Driving method of liquid crystal device | |
| JPH0352876B2 (en) | ||
| US6054973A (en) | Matrix array bistable device addressing | |
| JPH0523406B2 (en) | ||
| JPS6033535A (en) | Driving method of optical modulating element | |
| US5815130A (en) | Chiral smectic liquid crystal display and method of selectively driving the scanning and data electrodes | |
| JPH0535848B2 (en) | ||
| JPS6230407B2 (en) | ||
| JPS6230406B2 (en) | ||
| JP2003505742A (en) | Unipolar drive of bistable cholesteric liquid crystal display | |
| JPS6230405B2 (en) | ||
| JPS6230409B2 (en) | ||
| JP2578490B2 (en) | Driving method of display device | |
| JP2637517B2 (en) | Liquid crystal device | |
| CN119575722B (en) | A driving method for a color display screen | |
| KR100920378B1 (en) | LCD Display | |
| JP3205766B2 (en) | Driving method of ferroelectric liquid crystal device | |
| JP2584767B2 (en) | Driving method of liquid crystal device | |
| JPH0448367B2 (en) | ||
| TW202529085A (en) | Cholesterol liquid crystal display and driving methoid thereof | |
| JPH07248485A (en) | Liquid crystal display device and driving method thereof | |
| JPS63306424A (en) | Driving device | |
| JPH0437412B2 (en) |