JPS6230537B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a fail-safe type non-contact relay, and more specifically, it uses general electronic components such as transistors and resistors to operate logically in the same manner as conventional electromagnetic relays, and avoids dangerous failure conditions. This invention relates to a non-contact relay with a fail-safe function. General semiconductor logic elements are used in so-called fail-safe control logic circuits that need to automatically detect failures in signal safety devices, elevator control circuits, etc. and operate safely in the event of these failures. There is a problem with that. In other words, since these elements are controlled by direct current, it cannot be said that they will necessarily operate safely if a short circuit or disconnection occurs in the element. Conventionally, in signal safety devices and the like where these points are important, the reality is that electromagnetic relays are used in most cases. In other words, a fail-safe logic circuit is constructed based on the premise that the probability of fusion between contacts can be extremely minimized by using a relatively small current in a small electromagnetic relay and by increasing the contact separation force. are doing. The internal circuit of a conventional general electromagnetic relay is shown in Figure 1 and explained. In the figure, 1 and 2 are both terminals of an electromagnetic relay K. When DC voltage is applied between terminals 1 and 2, the operating contact (normally open) Contact) N is closed, and recovery contact (normally closed contact) R is opened. Now, if input voltage application is represented as "A" as a logic representation, contact closure is represented as "B", and contact open is represented as complementary "", when the input voltage applied to terminals 1 and 2 is "A",
As shown in the figure, the output voltage appearing at terminals 3 and 4 is B, and the output voltage appearing at terminals 5 and 6 is B. Furthermore, if the voltage applied to each contact N and R in FIG. 1 is C, then terminals 7, 8 and 9, 1
You can consider this voltage between 0 and logically C
The logical conditions for each contact point represent a logical product, and are as follows. B=CA,=C The logical operation representing this relationship is expressed using symbols as shown in FIG. Now, if we create a truth table including failure modes for the logic circuit shown in FIG. 2, it will be as shown in the table below.

[Table] “0” No output There are two possible failure modes here, which can be divided into safe failures and dangerous failures. If a safety failure is expressed in the case of an electromagnetic relay, it will be when excitation coil disconnection and contact failure occur simultaneously or separately. Dangerous failures correspond to cases such as fusion and short circuits between contacts, which are malignant failures that almost never occur in safety control relays. In general, signal safety devices, elevator control circuits, etc., have control logic configured up to the safe failure modes listed above to ensure a fail-safe function that automatically detects failures in a safe direction. However, although various non-contact relays of this type have been proposed, none of them are satisfactory in terms of shape, size, power consumption, etc., and the circuit configuration is complicated, making it uneconomical. Furthermore, in the case of electromagnetic relays, an essential drawback is that contact failures occur accidentally, which inevitably leads to a decrease in operational reliability.Furthermore, in circuits that require frequent repeated operations, contact wear is a problem. cannot be ignored,
In the case of a fail-safe system that automatically detects a failure in a safe direction, this is extremely inconvenient, and although a solution to this problem has been desired for a long time, there has not yet been an accurate and easy method. In view of the above points, the present invention was made to solve such problems, and it eliminates the above-mentioned conventional drawbacks, satisfies the above-mentioned truth table as an operating mode of an electromagnetic relay, and eliminates all failure modes. provides a fail-safe type non-contact relay that stays within the safe failure range of the truth table and is never in a dangerous failure state. Japanese Patent Application No. 51-037646 ``Fail-safe type non-contact relay'' related to the present invention and the same applicant is also an invention having the same purpose as the present invention, and is a fail-safe type non-contact relay using a coupling transformer and a four-terminal capacitor. However, the present invention differs in circuit configuration from that of Japanese Patent Application No. 51-037646. That is, the present invention is a depletion field effect transistor (hereinafter referred to as FET).
By utilizing the nonlinear characteristics of , a circuit can be configured without using a coupling transformer or a four-terminal capacitor, and further miniaturization becomes easy. Furthermore, by having two input terminals, one of the input terminals can be used to widen the range of applications, such as creating a priority circuit. Embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 3 is a circuit diagram showing an embodiment of the fail-safe type non-contact relay according to the present invention. A DC logic input is applied to input terminal A, and is applied to the base and collector of bipolar transistor Q _A through bias resistor R _B and load resistor R _LA , respectively. In addition, a bias resistor R _B is passed from the input terminal A, and a part of it is passed through a coupling resistor R _C to perform another switch function, the depletion type.
Applied to the gate of FETQB via Rg. Input terminal C is an alternating current logic input and provides an input signal to Q _A and Q _B via a coupling resistor R _S . R _LA , C _A and R _LB , C _B are level detection circuits for the AC outputs of Q _A and Q _B using the load resistances and coupling capacitors of Q _A and Q _B , respectively.
This leads to LdA ₂ and LdA ₁ . V _C is LdA ₁ and Q
_B , and is constantly applied as a _DC bias to LdA ₂ and QA. B, is the output of this circuit, and is the logical product of the AC signal input from C and the DC logic input A, B=C・
It is given as A,=C. Next, the operation will be explained in detail with reference to FIG.
Now, consider the case where a bias voltage V _C is applied and an AC signal is applied to the C terminal. First, if the DC logic input A is set to "0", the AC signal applied to Q _B through R _S is Since there is no DC voltage from the terminal via R _B and R _C , Q _B operates as a zero-bias FET amplifier, and an amplified AC signal appears at R _LB and is applied to LdA ₁ through C _B. The output is generated. On the other hand, since Q _A has no A terminal input, neither base bias nor collector bias is applied, so the AC signal input from R _S via R _C is loaded as Q _A does not have an amplification function. No alternating current signal is generated at resistor R _LA . Even if a small amount occurs, it will not reach the operating level of LdA ₂ , so there will be no output of B, and B="0". When logic input A becomes “1” and DC voltage is applied,
A DC bias is added to Q _A , and R _S , R _C , R _B ′
The AC signal inputted through is amplified by Q _A and a large AC output is generated at R _LA . This AC signal level is large enough to make LdA ₂ work sufficiently, and B="1". On the other hand, in this state R _B , R
Through the path called the gate of _C and Q _B , the DC voltage input to the A terminal is applied to the gate of Q _B , and the gate of Q _B becomes a positive potential compared to the source, and as soon as the current starts flowing, it has saturation characteristics. become. Therefore R
The AC signal input through _S produces only a very small output at both ends of _RLB due to the saturation phenomenon of _QB . Since this level is lower than the level that causes LdA ₁ to operate, it becomes ="0". From the above explanation of the operation, it is clear that the logic shown in FIG. 2 is satisfied. Further, even if the circuit elements are short-circuited or disconnected due to physical factors, there is a feature that the dangerous failure shown in the above truth table cannot occur, and this will be explained below. First, the resistor R _S connected to the C terminal is intended to avoid the influence of the AC signal source impedance, but this disconnection fault causes the AC input to become unreliable, and the B and output signals are connected regardless of the input to the A terminal. It is clear that is "0". If the DC logic input A is "0", the output of _QB will be "0" if there is a failure. Also, if _RLB is disconnected or short-circuited, there will be no AC signal and B will be in the "0" state. Then A=
Considering the failure of each part in the case of "1", if R _C is disconnected, the AC signal of Q _A disappears and the B output becomes "0", and the output of Q A becomes "1" as the saturation is canceled. When R _B is disconnected, the AC signal of Q _A disappears and the B output becomes "0", and the output of Q A is desaturated and becomes "1". When R _B is disconnected, the base bias of Q _A disappears, so no current flows through Q _A , and the signal input via R _C and R _B ' is not amplified and cannot reach the operating level of LdA ₂ . = “0”.
Similarly, for a disconnection fault in the sum of R _LA , R _E and R _B ', B=“0”, and in this case, B also becomes “0”. It can be seen that the above failure types are not dangerous failures as shown in the truth table, and dangerous failures do not occur. As is clear from the above description, the present invention has a simple structure without using complicated means, consumes little power, is relatively small, and does not require any mechanical contacts. Since there are no parts that wear out, the lifespan of the entire device can be significantly extended, and it can be provided at a low cost. It also eliminates the various drawbacks of electromagnetic relays, such as poor contact, reduced operational reliability, and contact wear. The practical effects are extremely large because they can be removed all at once, extending the lifespan and increasing the reliability of the system. Furthermore, it is extremely effective in that it reduces the cost by simplifying the configuration, and that all failure modes remain within the security range shown in the above truth table, never resulting in a dangerous failure. Therefore, it exhibits remarkable effects when used in various devices that require a fail-safe function, in which circuits undergo frequent repeated operations, where contact wear is a problem.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an outline of a conventional electromagnetic relay, FIG. 2 is a logic circuit diagram of FIG. 1, and FIG. 3 is a circuit diagram showing an embodiment of a fail-safe non-contact relay according to the present invention. . A...DC logic input terminal, C...AC input terminal, B,...output terminal, V _C ...DC bias voltage, Q _A ... Bipolar transistor, Q _B ...
Depression type FET, LdA ₁ , LdA ₂ ... Level detection circuit, R _B , R _B ', R _C , Rg, R _S , R _E ,
R _LA , R _LB ...Resistor, C _A , C _B ... Capacitor.

Claims (1)

[Claims] 1 It has two input terminals, an AC input signal is applied to one input terminal, and a part of this AC input signal is a depletion type for amplifying zero bias operation.
The voltage is applied to the gate of the FET, and the output of the amplifying depletion type FET is connected to a first level detection circuit that generates an output when the input signal level exceeds a certain level. One part is connected to the base of the amplifying bipolar transistor through a coupling resistor, and the other input terminal of the two input terminals is connected to the collector of the amplifying bipolar transistor through a load resistor. At the same time, the base of the amplifying bipolar transistor is connected via a base bias resistor to input a DC voltage, and a second level detection circuit is connected to the collector output of the amplifying bipolar transistor, and the DC voltage is is applied as a logic input to the gate of the amplification depletion type FET via the coupling resistor, and the two level detection circuits are complementarily activated by the saturation and unsaturation of the amplification depletion type FET. A fail-safe type non-contact relay characterized by having an output when it is activated.